Fix 32-bit overflow in parallels image support
[qemu-kvm/fedora.git] / hw / device-assignment.h
blob0be62f450d874e1638d85bff063e419be0f7cda3
1 /*
2 * Copyright (c) 2007, Neocleus Corporation.
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Data structures for storing PCI state
20 * Adapted to kvm by Qumranet
22 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
23 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
24 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
25 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
28 #ifndef __DEVICE_ASSIGNMENT_H__
29 #define __DEVICE_ASSIGNMENT_H__
31 #include <sys/mman.h>
32 #include "qemu-common.h"
33 #include "sys-queue.h"
34 #include "pci.h"
36 /* From include/linux/pci.h in the kernel sources */
37 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
39 typedef struct {
40 int type; /* Memory or port I/O */
41 int valid;
42 uint32_t base_addr;
43 uint32_t size; /* size of the region */
44 int resource_fd;
45 } PCIRegion;
47 typedef struct {
48 uint8_t bus, dev, func; /* Bus inside domain, device and function */
49 int irq; /* IRQ number */
50 uint16_t region_number; /* number of active regions */
52 /* Port I/O or MMIO Regions */
53 PCIRegion regions[PCI_NUM_REGIONS];
54 int config_fd;
55 } PCIDevRegions;
57 typedef struct {
58 target_phys_addr_t e_physbase;
59 uint32_t memory_index;
60 union {
61 void *r_virtbase; /* mmapped access address for memory regions */
62 uint32_t r_baseport; /* the base guest port for I/O regions */
63 } u;
64 int num; /* our index within v_addrs[] */
65 uint32_t e_size; /* emulated size of region in bytes */
66 uint32_t r_size; /* real size of region in bytes */
67 } AssignedDevRegion;
69 typedef struct {
70 PCIDevice dev;
71 int intpin;
72 uint8_t debug_flags;
73 AssignedDevRegion v_addrs[PCI_NUM_REGIONS];
74 PCIDevRegions real_device;
75 int run;
76 int girq;
77 unsigned char h_busnr;
78 unsigned int h_devfn;
79 int irq_requested_type;
80 int bound;
81 struct pci_dev *pdev;
82 struct {
83 #define ASSIGNED_DEVICE_CAP_MSI (1 << 0)
84 #define ASSIGNED_DEVICE_CAP_MSIX (1 << 1)
85 uint32_t available;
86 #define ASSIGNED_DEVICE_MSI_ENABLED (1 << 0)
87 #define ASSIGNED_DEVICE_MSIX_ENABLED (1 << 1)
88 #define ASSIGNED_DEVICE_MSIX_MASKED (1 << 2)
89 uint32_t state;
90 } cap;
91 int irq_entries_nr;
92 struct kvm_irq_routing_entry *entry;
93 void *msix_table_page;
94 target_phys_addr_t msix_table_addr;
95 int mmio_index;
96 int need_emulate_cmd;
97 } AssignedDevice;
99 typedef struct AssignedDevInfo AssignedDevInfo;
101 struct AssignedDevInfo {
102 char name[15];
103 int bus;
104 int dev;
105 int func;
106 AssignedDevice *assigned_dev;
107 LIST_ENTRY(AssignedDevInfo) next;
108 int disable_iommu;
111 PCIDevice *init_assigned_device(AssignedDevInfo *adev, const char *devaddr);
112 AssignedDevInfo *add_assigned_device(const char *arg);
113 void add_assigned_devices(PCIBus *bus, const char **devices, int n_devices);
114 void remove_assigned_device(AssignedDevInfo *adev);
115 AssignedDevInfo *get_assigned_device(int pcibus, int slot);
116 ram_addr_t assigned_dev_load_option_roms(ram_addr_t rom_base_offset);
117 void assigned_dev_update_irqs(void);
119 #define MAX_DEV_ASSIGN_CMDLINE 8
121 extern const char *assigned_devices[MAX_DEV_ASSIGN_CMDLINE];
122 extern int assigned_devices_index;
124 #endif /* __DEVICE_ASSIGNMENT_H__ */