hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5
   6 /* PC-style peripherals (also used by other machines).  */
   7
   8 /* serial.c */
   9
  10 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  11                          CharDriverState *chr);
  12 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  13                              qemu_irq irq, int baudbase,
  14                              CharDriverState *chr, int ioregister);
  15 uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
  16 void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value);
  17 uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr);
  18 void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value);
  19 uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr);
  20 void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value);
  21
  22 /* parallel.c */
  23
  24 typedef struct ParallelState ParallelState;
  25 ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
  26 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
  27
  28 /* i8259.c */
  29
  30 typedef struct PicState2 PicState2;
  31 extern PicState2 *isa_pic;
  32 void pic_set_irq(int irq, int level);
  33 void pic_set_irq_new(void *opaque, int irq, int level);
  34 qemu_irq *i8259_init(qemu_irq parent_irq);
  35 qemu_irq *kvm_i8259_init(qemu_irq parent_irq);
  36 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
  37                           void *alt_irq_opaque);
  38 int pic_read_irq(PicState2 *s);
  39 void pic_update_irq(PicState2 *s);
  40 uint32_t pic_intack_read(PicState2 *s);
  41 void pic_info(Monitor *mon);
  42 void irq_info(Monitor *mon);
  43
  44 /* APIC */
  45 typedef struct IOAPICState IOAPICState;
  46 void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
  47                              uint8_t delivery_mode,
  48                              uint8_t vector_num, uint8_t polarity,
  49                              uint8_t trigger_mode);
  50 int apic_init(CPUState *env);
  51 int apic_accept_pic_intr(CPUState *env);
  52 void apic_deliver_pic_intr(CPUState *env, int level);
  53 int apic_get_interrupt(CPUState *env);
  54 IOAPICState *ioapic_init(void);
  55 void ioapic_set_irq(void *opaque, int vector, int level);
  56 void apic_reset_irq_delivered(void);
  57 int apic_get_irq_delivered(void);
  58 void apic_set_irq_delivered(void);
  59
  60 /* i8254.c */
  61
  62 #define PIT_FREQ 1193182
  63
  64 typedef struct PITState PITState;
  65
  66 PITState *pit_init(int base, qemu_irq irq);
  67 void pit_set_gate(PITState *pit, int channel, int val);
  68 int pit_get_gate(PITState *pit, int channel);
  69 int pit_get_initial_count(PITState *pit, int channel);
  70 int pit_get_mode(PITState *pit, int channel);
  71 int pit_get_out(PITState *pit, int channel, int64_t current_time);
  72
  73 /* i8254-kvm.c */
  74
  75 PITState *kvm_pit_init(int base, qemu_irq irq);
  76
  77 void hpet_disable_pit(void);
  78 void hpet_enable_pit(void);
  79
  80 /* vmport.c */
  81 void vmport_init(void);
  82 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  83
  84 /* vmmouse.c */
  85 void *vmmouse_init(void *m);
  86
  87 /* pckbd.c */
  88
  89 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  90 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  91                    target_phys_addr_t base, ram_addr_t size,
  92                    target_phys_addr_t mask);
  93
  94 /* mc146818rtc.c */
  95
  96 typedef struct RTCState RTCState;
  97
  98 RTCState *rtc_init(int base, qemu_irq irq, int base_year);
  99 RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year);
 100 RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
 101                       int base_year);
 102 void rtc_set_memory(RTCState *s, int addr, int val);
 103 void rtc_set_date(RTCState *s, const struct tm *tm);
 104 void cmos_set_s3_resume(void);
 105
 106 /* pc.c */
 107 extern int fd_bootchk;
 108
 109 void ioport_set_a20(int enable);
 110 int ioport_get_a20(void);
 111 CPUState *pc_new_cpu(const char *cpu_model);
 112
 113 /* acpi.c */
 114 extern int acpi_enabled;
 115 extern char *acpi_tables;
 116 extern size_t acpi_tables_len;
 117
 118 void acpi_bios_init(void);
 119 int acpi_table_add(const char *table_desc);
 120
 121 /* acpi_piix.c */
 122 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 123                        qemu_irq sci_irq);
 124 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 125 void piix4_acpi_system_hot_add_init(const char *model);
 126
 127 /* hpet.c */
 128 extern int no_hpet;
 129
 130 /* pcspk.c */
 131 void pcspk_init(PITState *);
 132 int pcspk_audio_init(qemu_irq *pic);
 133
 134 /* piix_pci.c */
 135 /* config space register for IRQ routing */
 136 #define PIIX_CONFIG_IRQ_ROUTE 0x60
 137
 138 PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic);
 139 void i440fx_set_smm(PCIDevice *d, int val);
 140 int piix3_init(PCIBus *bus, int devfn);
 141 void i440fx_init_memory_mappings(PCIDevice *d);
 142
 143 extern PCIDevice *piix4_dev;
 144 int piix4_init(PCIBus *bus, int devfn);
 145
 146 int piix_get_irq(int pin);
 147
 148 int ipf_map_irq(PCIDevice *pci_dev, int irq_num);
 149
 150 /* vga.c */
 151 enum vga_retrace_method {
 152     VGA_RETRACE_DUMB,
 153     VGA_RETRACE_PRECISE
 154 };
 155
 156 extern enum vga_retrace_method vga_retrace_method;
 157
 158 int isa_vga_init(void);
 159 int pci_vga_init(PCIBus *bus,
 160                  unsigned long vga_bios_offset, int vga_bios_size);
 161 int isa_vga_mm_init(target_phys_addr_t vram_base,
 162                     target_phys_addr_t ctrl_base, int it_shift);
 163
 164 /* cirrus_vga.c */
 165 void pci_cirrus_vga_init(PCIBus *bus);
 166 void isa_cirrus_vga_init(void);
 167
 168 /* ide.c */
 169 void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
 170                   BlockDriverState *hd0, BlockDriverState *hd1);
 171 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
 172                          int secondary_ide_enabled);
 173 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 174                         qemu_irq *pic);
 175 void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 176                         qemu_irq *pic);
 177
 178 /* ne2000.c */
 179
 180 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
 181
 182 /* extboot.c */
 183
 184 void extboot_init(BlockDriverState *bs, int cmd);
 185
 186 int cpu_is_bsp(CPUState *env);
 187
 188 #endif