pseries: Fixes and enhancements to L1 cache properties
[qemu/agraf.git] / disas.c
blob67103e08e26bb142d87ee248e357d76310f6b63a
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "disas/bfd.h"
4 #include "elf.h"
5 #include <errno.h>
7 #include "cpu.h"
8 #include "disas/disas.h"
10 typedef struct CPUDebug {
11 struct disassemble_info info;
12 CPUArchState *env;
13 } CPUDebug;
15 /* Filled in by elfload.c. Simplistic, but will do for now. */
16 struct syminfo *syminfos = NULL;
18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
20 int
21 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
22 struct disassemble_info *info)
24 if (memaddr < info->buffer_vma
25 || memaddr + length > info->buffer_vma + info->buffer_length)
26 /* Out of bounds. Use EIO because GDB uses it. */
27 return EIO;
28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
29 return 0;
32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
34 static int
35 target_read_memory (bfd_vma memaddr,
36 bfd_byte *myaddr,
37 int length,
38 struct disassemble_info *info)
40 CPUDebug *s = container_of(info, CPUDebug, info);
42 cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);
43 return 0;
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48 void
49 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
51 if (status != EIO)
52 /* Can't happen. */
53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
54 else
55 /* Actually, address between memaddr and memaddr + len was
56 out of bounds. */
57 (*info->fprintf_func) (info->stream,
58 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
61 /* This could be in a separate file, to save minuscule amounts of space
62 in statically linked executables. */
64 /* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
66 addresses). */
68 void
69 generic_print_address (bfd_vma addr, struct disassemble_info *info)
71 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
74 /* Print address in hex, truncated to the width of a target virtual address. */
75 static void
76 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
78 uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
79 generic_print_address(addr & mask, info);
82 /* Print address in hex, truncated to the width of a host virtual address. */
83 static void
84 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
86 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
87 generic_print_address(addr & mask, info);
90 /* Just return the given address. */
92 int
93 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
95 return 1;
98 bfd_vma bfd_getl64 (const bfd_byte *addr)
100 unsigned long long v;
102 v = (unsigned long long) addr[0];
103 v |= (unsigned long long) addr[1] << 8;
104 v |= (unsigned long long) addr[2] << 16;
105 v |= (unsigned long long) addr[3] << 24;
106 v |= (unsigned long long) addr[4] << 32;
107 v |= (unsigned long long) addr[5] << 40;
108 v |= (unsigned long long) addr[6] << 48;
109 v |= (unsigned long long) addr[7] << 56;
110 return (bfd_vma) v;
113 bfd_vma bfd_getl32 (const bfd_byte *addr)
115 unsigned long v;
117 v = (unsigned long) addr[0];
118 v |= (unsigned long) addr[1] << 8;
119 v |= (unsigned long) addr[2] << 16;
120 v |= (unsigned long) addr[3] << 24;
121 return (bfd_vma) v;
124 bfd_vma bfd_getb32 (const bfd_byte *addr)
126 unsigned long v;
128 v = (unsigned long) addr[0] << 24;
129 v |= (unsigned long) addr[1] << 16;
130 v |= (unsigned long) addr[2] << 8;
131 v |= (unsigned long) addr[3];
132 return (bfd_vma) v;
135 bfd_vma bfd_getl16 (const bfd_byte *addr)
137 unsigned long v;
139 v = (unsigned long) addr[0];
140 v |= (unsigned long) addr[1] << 8;
141 return (bfd_vma) v;
144 bfd_vma bfd_getb16 (const bfd_byte *addr)
146 unsigned long v;
148 v = (unsigned long) addr[0] << 24;
149 v |= (unsigned long) addr[1] << 16;
150 return (bfd_vma) v;
153 #ifdef TARGET_ARM
154 static int
155 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
157 return print_insn_arm(pc | 1, info);
159 #endif
161 /* Disassemble this for me please... (debugging). 'flags' has the following
162 values:
163 i386 - 1 means 16 bit code, 2 means 64 bit code
164 arm - bit 0 = thumb, bit 1 = reverse endian
165 ppc - nonzero means little endian
166 other targets - unused
168 void target_disas(FILE *out, CPUArchState *env, target_ulong code,
169 target_ulong size, int flags)
171 target_ulong pc;
172 int count;
173 CPUDebug s;
174 int (*print_insn)(bfd_vma pc, disassemble_info *info);
176 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
178 s.env = env;
179 s.info.read_memory_func = target_read_memory;
180 s.info.buffer_vma = code;
181 s.info.buffer_length = size;
182 s.info.print_address_func = generic_print_target_address;
184 #ifdef TARGET_WORDS_BIGENDIAN
185 s.info.endian = BFD_ENDIAN_BIG;
186 #else
187 s.info.endian = BFD_ENDIAN_LITTLE;
188 #endif
189 #if defined(TARGET_I386)
190 if (flags == 2) {
191 s.info.mach = bfd_mach_x86_64;
192 } else if (flags == 1) {
193 s.info.mach = bfd_mach_i386_i8086;
194 } else {
195 s.info.mach = bfd_mach_i386_i386;
197 print_insn = print_insn_i386;
198 #elif defined(TARGET_ARM)
199 if (flags & 1) {
200 print_insn = print_insn_thumb1;
201 } else {
202 print_insn = print_insn_arm;
204 if (flags & 2) {
205 #ifdef TARGET_WORDS_BIGENDIAN
206 s.info.endian = BFD_ENDIAN_LITTLE;
207 #else
208 s.info.endian = BFD_ENDIAN_BIG;
209 #endif
211 #elif defined(TARGET_SPARC)
212 print_insn = print_insn_sparc;
213 #ifdef TARGET_SPARC64
214 s.info.mach = bfd_mach_sparc_v9b;
215 #endif
216 #elif defined(TARGET_PPC)
217 if (flags >> 16) {
218 s.info.endian = BFD_ENDIAN_LITTLE;
220 if (flags & 0xFFFF) {
221 /* If we have a precise definitions of the instructions set, use it */
222 s.info.mach = flags & 0xFFFF;
223 } else {
224 #ifdef TARGET_PPC64
225 s.info.mach = bfd_mach_ppc64;
226 #else
227 s.info.mach = bfd_mach_ppc;
228 #endif
230 print_insn = print_insn_ppc;
231 #elif defined(TARGET_M68K)
232 print_insn = print_insn_m68k;
233 #elif defined(TARGET_MIPS)
234 #ifdef TARGET_WORDS_BIGENDIAN
235 print_insn = print_insn_big_mips;
236 #else
237 print_insn = print_insn_little_mips;
238 #endif
239 #elif defined(TARGET_SH4)
240 s.info.mach = bfd_mach_sh4;
241 print_insn = print_insn_sh;
242 #elif defined(TARGET_ALPHA)
243 s.info.mach = bfd_mach_alpha_ev6;
244 print_insn = print_insn_alpha;
245 #elif defined(TARGET_CRIS)
246 if (flags != 32) {
247 s.info.mach = bfd_mach_cris_v0_v10;
248 print_insn = print_insn_crisv10;
249 } else {
250 s.info.mach = bfd_mach_cris_v32;
251 print_insn = print_insn_crisv32;
253 #elif defined(TARGET_S390X)
254 s.info.mach = bfd_mach_s390_64;
255 print_insn = print_insn_s390;
256 #elif defined(TARGET_MICROBLAZE)
257 s.info.mach = bfd_arch_microblaze;
258 print_insn = print_insn_microblaze;
259 #elif defined(TARGET_MOXIE)
260 s.info.mach = bfd_arch_moxie;
261 print_insn = print_insn_moxie;
262 #elif defined(TARGET_LM32)
263 s.info.mach = bfd_mach_lm32;
264 print_insn = print_insn_lm32;
265 #else
266 fprintf(out, "0x" TARGET_FMT_lx
267 ": Asm output not supported on this arch\n", code);
268 return;
269 #endif
271 for (pc = code; size > 0; pc += count, size -= count) {
272 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
273 count = print_insn(pc, &s.info);
274 #if 0
276 int i;
277 uint8_t b;
278 fprintf(out, " {");
279 for(i = 0; i < count; i++) {
280 target_read_memory(pc + i, &b, 1, &s.info);
281 fprintf(out, " %02x", b);
283 fprintf(out, " }");
285 #endif
286 fprintf(out, "\n");
287 if (count < 0)
288 break;
289 if (size < count) {
290 fprintf(out,
291 "Disassembler disagrees with translator over instruction "
292 "decoding\n"
293 "Please report this to qemu-devel@nongnu.org\n");
294 break;
299 /* Disassemble this for me please... (debugging). */
300 void disas(FILE *out, void *code, unsigned long size)
302 uintptr_t pc;
303 int count;
304 CPUDebug s;
305 int (*print_insn)(bfd_vma pc, disassemble_info *info);
307 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
308 s.info.print_address_func = generic_print_host_address;
310 s.info.buffer = code;
311 s.info.buffer_vma = (uintptr_t)code;
312 s.info.buffer_length = size;
314 #ifdef HOST_WORDS_BIGENDIAN
315 s.info.endian = BFD_ENDIAN_BIG;
316 #else
317 s.info.endian = BFD_ENDIAN_LITTLE;
318 #endif
319 #if defined(CONFIG_TCG_INTERPRETER)
320 print_insn = print_insn_tci;
321 #elif defined(__i386__)
322 s.info.mach = bfd_mach_i386_i386;
323 print_insn = print_insn_i386;
324 #elif defined(__x86_64__)
325 s.info.mach = bfd_mach_x86_64;
326 print_insn = print_insn_i386;
327 #elif defined(_ARCH_PPC)
328 s.info.disassembler_options = (char *)"any";
329 print_insn = print_insn_ppc;
330 #elif defined(__alpha__)
331 print_insn = print_insn_alpha;
332 #elif defined(__sparc__)
333 print_insn = print_insn_sparc;
334 s.info.mach = bfd_mach_sparc_v9b;
335 #elif defined(__arm__)
336 print_insn = print_insn_arm;
337 #elif defined(__MIPSEB__)
338 print_insn = print_insn_big_mips;
339 #elif defined(__MIPSEL__)
340 print_insn = print_insn_little_mips;
341 #elif defined(__m68k__)
342 print_insn = print_insn_m68k;
343 #elif defined(__s390__)
344 print_insn = print_insn_s390;
345 #elif defined(__hppa__)
346 print_insn = print_insn_hppa;
347 #elif defined(__ia64__)
348 print_insn = print_insn_ia64;
349 #else
350 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
351 (long) code);
352 return;
353 #endif
354 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
355 fprintf(out, "0x%08" PRIxPTR ": ", pc);
356 count = print_insn(pc, &s.info);
357 fprintf(out, "\n");
358 if (count < 0)
359 break;
363 /* Look up symbol for debugging purpose. Returns "" if unknown. */
364 const char *lookup_symbol(target_ulong orig_addr)
366 const char *symbol = "";
367 struct syminfo *s;
369 for (s = syminfos; s; s = s->next) {
370 symbol = s->lookup_symbol(s, orig_addr);
371 if (symbol[0] != '\0') {
372 break;
376 return symbol;
379 #if !defined(CONFIG_USER_ONLY)
381 #include "monitor/monitor.h"
383 static int monitor_disas_is_physical;
385 static int
386 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
387 struct disassemble_info *info)
389 CPUDebug *s = container_of(info, CPUDebug, info);
391 if (monitor_disas_is_physical) {
392 cpu_physical_memory_read(memaddr, myaddr, length);
393 } else {
394 cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);
396 return 0;
399 static int GCC_FMT_ATTR(2, 3)
400 monitor_fprintf(FILE *stream, const char *fmt, ...)
402 va_list ap;
403 va_start(ap, fmt);
404 monitor_vprintf((Monitor *)stream, fmt, ap);
405 va_end(ap);
406 return 0;
409 void monitor_disas(Monitor *mon, CPUArchState *env,
410 target_ulong pc, int nb_insn, int is_physical, int flags)
412 int count, i;
413 CPUDebug s;
414 int (*print_insn)(bfd_vma pc, disassemble_info *info);
416 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
418 s.env = env;
419 monitor_disas_is_physical = is_physical;
420 s.info.read_memory_func = monitor_read_memory;
421 s.info.print_address_func = generic_print_target_address;
423 s.info.buffer_vma = pc;
425 #ifdef TARGET_WORDS_BIGENDIAN
426 s.info.endian = BFD_ENDIAN_BIG;
427 #else
428 s.info.endian = BFD_ENDIAN_LITTLE;
429 #endif
430 #if defined(TARGET_I386)
431 if (flags == 2) {
432 s.info.mach = bfd_mach_x86_64;
433 } else if (flags == 1) {
434 s.info.mach = bfd_mach_i386_i8086;
435 } else {
436 s.info.mach = bfd_mach_i386_i386;
438 print_insn = print_insn_i386;
439 #elif defined(TARGET_ARM)
440 print_insn = print_insn_arm;
441 #elif defined(TARGET_ALPHA)
442 print_insn = print_insn_alpha;
443 #elif defined(TARGET_SPARC)
444 print_insn = print_insn_sparc;
445 #ifdef TARGET_SPARC64
446 s.info.mach = bfd_mach_sparc_v9b;
447 #endif
448 #elif defined(TARGET_PPC)
449 #ifdef TARGET_PPC64
450 s.info.mach = bfd_mach_ppc64;
451 #else
452 s.info.mach = bfd_mach_ppc;
453 #endif
454 print_insn = print_insn_ppc;
455 #elif defined(TARGET_M68K)
456 print_insn = print_insn_m68k;
457 #elif defined(TARGET_MIPS)
458 #ifdef TARGET_WORDS_BIGENDIAN
459 print_insn = print_insn_big_mips;
460 #else
461 print_insn = print_insn_little_mips;
462 #endif
463 #elif defined(TARGET_SH4)
464 s.info.mach = bfd_mach_sh4;
465 print_insn = print_insn_sh;
466 #elif defined(TARGET_S390X)
467 s.info.mach = bfd_mach_s390_64;
468 print_insn = print_insn_s390;
469 #elif defined(TARGET_MOXIE)
470 s.info.mach = bfd_arch_moxie;
471 print_insn = print_insn_moxie;
472 #elif defined(TARGET_LM32)
473 s.info.mach = bfd_mach_lm32;
474 print_insn = print_insn_lm32;
475 #else
476 monitor_printf(mon, "0x" TARGET_FMT_lx
477 ": Asm output not supported on this arch\n", pc);
478 return;
479 #endif
481 for(i = 0; i < nb_insn; i++) {
482 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
483 count = print_insn(pc, &s.info);
484 monitor_printf(mon, "\n");
485 if (count < 0)
486 break;
487 pc += count;
490 #endif