2 * Copyright (C) 2010-2012 Guan Xuetao
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Contributions from 2012-04-01 on are considered under GPL version 2,
9 * or (at your option) any later version.
13 #include "exec/gdbstub.h"
15 #include "qemu/host-utils.h"
16 #ifndef CONFIG_USER_ONLY
17 #include "ui/console.h"
23 #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
25 #define DPRINTF(fmt, ...) do {} while (0)
28 CPUUniCore32State
*uc32_cpu_init(const char *cpu_model
)
31 CPUUniCore32State
*env
;
34 oc
= cpu_class_by_name(TYPE_UNICORE32_CPU
, cpu_model
);
38 cpu
= UNICORE32_CPU(object_new(object_class_get_name(oc
)));
40 env
->cpu_model_str
= cpu_model
;
42 object_property_set_bool(OBJECT(cpu
), true, "realized", NULL
);
47 uint32_t HELPER(clo
)(uint32_t x
)
52 uint32_t HELPER(clz
)(uint32_t x
)
57 #ifndef CONFIG_USER_ONLY
58 void helper_cp0_set(CPUUniCore32State
*env
, uint32_t val
, uint32_t creg
,
62 * movc pp.nn, rn, #imm9
66 * 2: page table base reg.
67 * 3: data fault status reg.
68 * 4: insn fault status reg.
71 * imm9: split UCOP_IMM10 with bit5 is 0
78 env
->cp0
.c1_sys
= val
;
84 env
->cp0
.c2_base
= val
;
90 env
->cp0
.c3_faultstatus
= val
;
96 env
->cp0
.c4_faultaddr
= val
;
101 DPRINTF("Invalidate Entire I&D cache\n");
104 DPRINTF("Invalidate Entire Icache\n");
107 DPRINTF("Invalidate Entire Dcache\n");
110 DPRINTF("Clean Entire Dcache\n");
113 DPRINTF("Flush Entire Dcache\n");
116 DPRINTF("Invalidate Dcache line\n");
119 DPRINTF("Clean Dcache line\n");
122 DPRINTF("Flush Dcache line\n");
127 if ((cop
<= 6) && (cop
>= 2)) {
128 /* invalid all tlb */
138 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
142 uint32_t helper_cp0_get(CPUUniCore32State
*env
, uint32_t creg
, uint32_t cop
)
145 * movc rd, pp.nn, #imm9
148 * 0: cpuid and cachetype
149 * 1: sys control reg.
150 * 2: page table base reg.
151 * 3: data fault status reg.
152 * 4: insn fault status reg.
153 * imm9: split UCOP_IMM10 with bit5 is 0
159 return env
->cp0
.c0_cpuid
;
161 return env
->cp0
.c0_cachetype
;
166 return env
->cp0
.c1_sys
;
171 return env
->cp0
.c2_base
;
176 return env
->cp0
.c3_faultstatus
;
181 return env
->cp0
.c4_faultaddr
;
185 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
193 * 1. curses windows will be blank when switching back
194 * 2. backspace is not handled yet
196 static void putc_on_screen(unsigned char ch
)
198 static WINDOW
*localwin
;
202 /* Assume 80 * 30 screen to minimize the implementation */
203 localwin
= newwin(30, 80, 0, 0);
204 scrollok(localwin
, TRUE
);
209 wprintw(localwin
, "%c", ch
);
213 wprintw(localwin
, "%c", ch
);
216 /* If '\r' is put before '\n', the curses window will destroy the
217 * last print line. And meanwhile, '\n' implifies '\r' inside. */
219 default: /* Not handled, so just print it hex code */
220 wprintw(localwin
, "-- 0x%x --", ch
);
227 #define putc_on_screen(c) do { } while (0)
230 void helper_cp1_putc(target_ulong x
)
232 putc_on_screen((unsigned char)x
); /* Output to screen */
233 DPRINTF("%c", x
); /* Output to stdout */
237 #ifdef CONFIG_USER_ONLY
238 void switch_mode(CPUUniCore32State
*env
, int mode
)
240 if (mode
!= ASR_MODE_USER
) {
241 cpu_abort(env
, "Tried to switch out of user mode\n");
245 void do_interrupt(CPUUniCore32State
*env
)
247 cpu_abort(env
, "NO interrupt in user mode\n");
250 int uc32_cpu_handle_mmu_fault(CPUUniCore32State
*env
, target_ulong address
,
251 int access_type
, int mmu_idx
)
253 cpu_abort(env
, "NO mmu fault in user mode\n");