tests/tcg/mips/mips32-dsp/extr_s_h.c

   1 #include<stdio.h>
   2 #include<assert.h>
   3
   4 int main()
   5 {
   6     int rt, ach, acl, dsp;
   7     int result;
   8
   9     ach = 0x05;
  10     acl = 0xB4CB;
  11     result = 0x00007FFF;
  12     __asm
  13         ("mthi %2, $ac1\n\t"
  14          "mtlo %3, $ac1\n\t"
  15          "extr_s.h %0, $ac1, 0x03\n\t"
  16          "rddsp %1\n\t"
  17          : "=r"(rt), "=r"(dsp)
  18          : "r"(ach), "r"(acl)
  19         );
  20     dsp = (dsp >> 23) & 0x01;
  21     assert(dsp == 1);
  22     assert(result == rt);
  23
  24     ach = 0xffffffff;
  25     acl = 0x12344321;
  26     result = 0xFFFF8000;
  27     __asm
  28         ("mthi %2, $ac1\n\t"
  29          "mtlo %3, $ac1\n\t"
  30          "extr_s.h %0, $ac1, 0x08\n\t"
  31          "rddsp %1\n\t"
  32          : "=r"(rt), "=r"(dsp)
  33          : "r"(ach), "r"(acl)
  34         );
  35     dsp = (dsp >> 23) & 0x01;
  36     assert(dsp == 1);
  37     assert(result == rt);
  38
  39     /* Clear dsp */
  40     dsp = 0;
  41     __asm
  42         ("wrdsp %0\n\t"
  43          :
  44          : "r"(dsp)
  45         );
  46
  47     ach = 0x00;
  48     acl = 0x4321;
  49     result = 0x432;
  50     __asm
  51         ("mthi %2, $ac1\n\t"
  52          "mtlo %3, $ac1\n\t"
  53          "extr_s.h %0, $ac1, 0x04\n\t"
  54          "rddsp %1\n\t"
  55          : "=r"(rt), "=r"(dsp)
  56          : "r"(ach), "r"(acl)
  57         );
  58     dsp = (dsp >> 23) & 0x01;
  59     assert(dsp == 0);
  60     assert(result == rt);
  61
  62     /* Clear dsp */
  63     dsp = 0;
  64     __asm
  65         ("wrdsp %0\n\t"
  66          :
  67          : "r"(dsp)
  68         );
  69
  70     ach = 0x123;
  71     acl = 0x87654321;
  72     result = 0x1238;
  73     __asm
  74         ("mthi %2, $ac1\n\t"
  75          "mtlo %3, $ac1\n\t"
  76          "extr_s.h %0, $ac1, 28\n\t"
  77          "rddsp %1\n\t"
  78          : "=r"(rt), "=r"(dsp)
  79          : "r"(ach), "r"(acl)
  80         );
  81     dsp = (dsp >> 23) & 0x01;
  82     assert(dsp == 0);
  83     assert(result == rt);
  84
  85     return 0;
  86 }