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pseries: Add a routine to find a stable "default" vty and use it
[qemu/agraf.git] / memory.c
bloba7e615ad15f018fec2dbc01157801c9237d77153
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 */
13
14 #include "memory.h"
15 #include "exec-memory.h"
16 #include "ioport.h"
17 #include "bitops.h"
18 #include "kvm.h"
19 #include <assert.h>
20
21 #define WANT_EXEC_OBSOLETE
22 #include "exec-obsolete.h"
23
24 unsigned memory_region_transaction_depth = 0;
25 static bool memory_region_update_pending = false;
26
27 typedef struct AddrRange AddrRange;
28
29 /*
30 * Note using signed integers limits us to physical addresses at most
31 * 63 bits wide. They are needed for negative offsetting in aliases
32 * (large MemoryRegion::alias_offset).
33 */
34 struct AddrRange {
35 Int128 start;
36 Int128 size;
37 };
38
39 static AddrRange addrrange_make(Int128 start, Int128 size)
40 {
41 return (AddrRange) { start, size };
42 }
43
44 static bool addrrange_equal(AddrRange r1, AddrRange r2)
45 {
46 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
47 }
48
49 static Int128 addrrange_end(AddrRange r)
50 {
51 return int128_add(r.start, r.size);
52 }
53
54 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
55 {
56 int128_addto(&range.start, delta);
57 return range;
58 }
59
60 static bool addrrange_contains(AddrRange range, Int128 addr)
61 {
62 return int128_ge(addr, range.start)
63 && int128_lt(addr, addrrange_end(range));
64 }
65
66 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
67 {
68 return addrrange_contains(r1, r2.start)
69 || addrrange_contains(r2, r1.start);
70 }
71
72 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
73 {
74 Int128 start = int128_max(r1.start, r2.start);
75 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
76 return addrrange_make(start, int128_sub(end, start));
77 }
78
79 struct CoalescedMemoryRange {
80 AddrRange addr;
81 QTAILQ_ENTRY(CoalescedMemoryRange) link;
82 };
83
84 struct MemoryRegionIoeventfd {
85 AddrRange addr;
86 bool match_data;
87 uint64_t data;
88 int fd;
89 };
90
91 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
92 MemoryRegionIoeventfd b)
93 {
94 if (int128_lt(a.addr.start, b.addr.start)) {
95 return true;
96 } else if (int128_gt(a.addr.start, b.addr.start)) {
97 return false;
98 } else if (int128_lt(a.addr.size, b.addr.size)) {
99 return true;
100 } else if (int128_gt(a.addr.size, b.addr.size)) {
101 return false;
102 } else if (a.match_data < b.match_data) {
103 return true;
104 } else if (a.match_data > b.match_data) {
105 return false;
106 } else if (a.match_data) {
107 if (a.data < b.data) {
108 return true;
109 } else if (a.data > b.data) {
110 return false;
111 }
112 }
113 if (a.fd < b.fd) {
114 return true;
115 } else if (a.fd > b.fd) {
116 return false;
117 }
118 return false;
119 }
120
121 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
122 MemoryRegionIoeventfd b)
123 {
124 return !memory_region_ioeventfd_before(a, b)
125 && !memory_region_ioeventfd_before(b, a);
126 }
127
128 typedef struct FlatRange FlatRange;
129 typedef struct FlatView FlatView;
130
131 /* Range of memory in the global map. Addresses are absolute. */
132 struct FlatRange {
133 MemoryRegion *mr;
134 target_phys_addr_t offset_in_region;
135 AddrRange addr;
136 uint8_t dirty_log_mask;
137 bool readable;
138 bool readonly;
139 };
140
141 /* Flattened global view of current active memory hierarchy. Kept in sorted
142 * order.
143 */
144 struct FlatView {
145 FlatRange *ranges;
146 unsigned nr;
147 unsigned nr_allocated;
148 };
149
150 typedef struct AddressSpace AddressSpace;
151 typedef struct AddressSpaceOps AddressSpaceOps;
152
153 /* A system address space - I/O, memory, etc. */
154 struct AddressSpace {
155 const AddressSpaceOps *ops;
156 MemoryRegion *root;
157 FlatView current_map;
158 int ioeventfd_nb;
159 MemoryRegionIoeventfd *ioeventfds;
160 };
161
162 struct AddressSpaceOps {
163 void (*range_add)(AddressSpace *as, FlatRange *fr);
164 void (*range_del)(AddressSpace *as, FlatRange *fr);
165 void (*log_start)(AddressSpace *as, FlatRange *fr);
166 void (*log_stop)(AddressSpace *as, FlatRange *fr);
167 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
168 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
169 };
170
171 #define FOR_EACH_FLAT_RANGE(var, view) \
172 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
173
174 static bool flatrange_equal(FlatRange *a, FlatRange *b)
175 {
176 return a->mr == b->mr
177 && addrrange_equal(a->addr, b->addr)
178 && a->offset_in_region == b->offset_in_region
179 && a->readable == b->readable
180 && a->readonly == b->readonly;
181 }
182
183 static void flatview_init(FlatView *view)
184 {
185 view->ranges = NULL;
186 view->nr = 0;
187 view->nr_allocated = 0;
188 }
189
190 /* Insert a range into a given position. Caller is responsible for maintaining
191 * sorting order.
192 */
193 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
194 {
195 if (view->nr == view->nr_allocated) {
196 view->nr_allocated = MAX(2 * view->nr, 10);
197 view->ranges = g_realloc(view->ranges,
198 view->nr_allocated * sizeof(*view->ranges));
199 }
200 memmove(view->ranges + pos + 1, view->ranges + pos,
201 (view->nr - pos) * sizeof(FlatRange));
202 view->ranges[pos] = *range;
203 ++view->nr;
204 }
205
206 static void flatview_destroy(FlatView *view)
207 {
208 g_free(view->ranges);
209 }
210
211 static bool can_merge(FlatRange *r1, FlatRange *r2)
212 {
213 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
214 && r1->mr == r2->mr
215 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
216 r1->addr.size),
217 int128_make64(r2->offset_in_region))
218 && r1->dirty_log_mask == r2->dirty_log_mask
219 && r1->readable == r2->readable
220 && r1->readonly == r2->readonly;
221 }
222
223 /* Attempt to simplify a view by merging ajacent ranges */
224 static void flatview_simplify(FlatView *view)
225 {
226 unsigned i, j;
227
228 i = 0;
229 while (i < view->nr) {
230 j = i + 1;
231 while (j < view->nr
232 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
233 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
234 ++j;
235 }
236 ++i;
237 memmove(&view->ranges[i], &view->ranges[j],
238 (view->nr - j) * sizeof(view->ranges[j]));
239 view->nr -= j - i;
240 }
241 }
242
243 static void memory_region_read_accessor(void *opaque,
244 target_phys_addr_t addr,
245 uint64_t *value,
246 unsigned size,
247 unsigned shift,
248 uint64_t mask)
249 {
250 MemoryRegion *mr = opaque;
251 uint64_t tmp;
252
253 tmp = mr->ops->read(mr->opaque, addr, size);
254 *value |= (tmp & mask) << shift;
255 }
256
257 static void memory_region_write_accessor(void *opaque,
258 target_phys_addr_t addr,
259 uint64_t *value,
260 unsigned size,
261 unsigned shift,
262 uint64_t mask)
263 {
264 MemoryRegion *mr = opaque;
265 uint64_t tmp;
266
267 tmp = (*value >> shift) & mask;
268 mr->ops->write(mr->opaque, addr, tmp, size);
269 }
270
271 static void access_with_adjusted_size(target_phys_addr_t addr,
272 uint64_t *value,
273 unsigned size,
274 unsigned access_size_min,
275 unsigned access_size_max,
276 void (*access)(void *opaque,
277 target_phys_addr_t addr,
278 uint64_t *value,
279 unsigned size,
280 unsigned shift,
281 uint64_t mask),
282 void *opaque)
283 {
284 uint64_t access_mask;
285 unsigned access_size;
286 unsigned i;
287
288 if (!access_size_min) {
289 access_size_min = 1;
290 }
291 if (!access_size_max) {
292 access_size_max = 4;
293 }
294 access_size = MAX(MIN(size, access_size_max), access_size_min);
295 access_mask = -1ULL >> (64 - access_size * 8);
296 for (i = 0; i < size; i += access_size) {
297 /* FIXME: big-endian support */
298 access(opaque, addr + i, value, access_size, i * 8, access_mask);
299 }
300 }
301
302 static void memory_region_prepare_ram_addr(MemoryRegion *mr);
303
304 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
305 {
306 ram_addr_t phys_offset, region_offset;
307
308 memory_region_prepare_ram_addr(fr->mr);
309
310 phys_offset = fr->mr->ram_addr;
311 region_offset = fr->offset_in_region;
312 /* cpu_register_physical_memory_log() wants region_offset for
313 * mmio, but prefers offseting phys_offset for RAM. Humour it.
314 */
315 if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
316 phys_offset += region_offset;
317 region_offset = 0;
318 }
319
320 if (!fr->readable) {
321 phys_offset &= ~TARGET_PAGE_MASK & ~IO_MEM_ROMD;
322 }
323
324 if (fr->readonly) {
325 phys_offset |= IO_MEM_ROM;
326 }
327
328 cpu_register_physical_memory_log(int128_get64(fr->addr.start),
329 int128_get64(fr->addr.size),
330 phys_offset,
331 region_offset,
332 fr->dirty_log_mask);
333 }
334
335 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
336 {
337 if (fr->dirty_log_mask) {
338 Int128 end = addrrange_end(fr->addr);
339 cpu_physical_sync_dirty_bitmap(int128_get64(fr->addr.start),
340 int128_get64(end));
341 }
342 cpu_register_physical_memory(int128_get64(fr->addr.start),
343 int128_get64(fr->addr.size),
344 IO_MEM_UNASSIGNED);
345 }
346
347 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
348 {
349 cpu_physical_log_start(int128_get64(fr->addr.start),
350 int128_get64(fr->addr.size));
351 }
352
353 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
354 {
355 cpu_physical_log_stop(int128_get64(fr->addr.start),
356 int128_get64(fr->addr.size));
357 }
358
359 static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
360 {
361 int r;
362
363 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
364
365 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
366 fd->data, true);
367 if (r < 0) {
368 abort();
369 }
370 }
371
372 static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
373 {
374 int r;
375
376 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
377 fd->data, false);
378 if (r < 0) {
379 abort();
380 }
381 }
382
383 static const AddressSpaceOps address_space_ops_memory = {
384 .range_add = as_memory_range_add,
385 .range_del = as_memory_range_del,
386 .log_start = as_memory_log_start,
387 .log_stop = as_memory_log_stop,
388 .ioeventfd_add = as_memory_ioeventfd_add,
389 .ioeventfd_del = as_memory_ioeventfd_del,
390 };
391
392 static AddressSpace address_space_memory = {
393 .ops = &address_space_ops_memory,
394 };
395
396 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
397 unsigned width, bool write)
398 {
399 const MemoryRegionPortio *mrp;
400
401 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
402 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
403 && width == mrp->size
404 && (write ? (bool)mrp->write : (bool)mrp->read)) {
405 return mrp;
406 }
407 }
408 return NULL;
409 }
410
411 static void memory_region_iorange_read(IORange *iorange,
412 uint64_t offset,
413 unsigned width,
414 uint64_t *data)
415 {
416 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
417
418 if (mr->ops->old_portio) {
419 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
420
421 *data = ((uint64_t)1 << (width * 8)) - 1;
422 if (mrp) {
423 *data = mrp->read(mr->opaque, offset + mr->offset);
424 } else if (width == 2) {
425 mrp = find_portio(mr, offset, 1, false);
426 assert(mrp);
427 *data = mrp->read(mr->opaque, offset + mr->offset) |
428 (mrp->read(mr->opaque, offset + mr->offset + 1) << 8);
429 }
430 return;
431 }
432 *data = 0;
433 access_with_adjusted_size(offset + mr->offset, data, width,
434 mr->ops->impl.min_access_size,
435 mr->ops->impl.max_access_size,
436 memory_region_read_accessor, mr);
437 }
438
439 static void memory_region_iorange_write(IORange *iorange,
440 uint64_t offset,
441 unsigned width,
442 uint64_t data)
443 {
444 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
445
446 if (mr->ops->old_portio) {
447 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
448
449 if (mrp) {
450 mrp->write(mr->opaque, offset + mr->offset, data);
451 } else if (width == 2) {
452 mrp = find_portio(mr, offset, 1, false);
453 assert(mrp);
454 mrp->write(mr->opaque, offset + mr->offset, data & 0xff);
455 mrp->write(mr->opaque, offset + mr->offset + 1, data >> 8);
456 }
457 return;
458 }
459 access_with_adjusted_size(offset + mr->offset, &data, width,
460 mr->ops->impl.min_access_size,
461 mr->ops->impl.max_access_size,
462 memory_region_write_accessor, mr);
463 }
464
465 static const IORangeOps memory_region_iorange_ops = {
466 .read = memory_region_iorange_read,
467 .write = memory_region_iorange_write,
468 };
469
470 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
471 {
472 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
473 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
474 ioport_register(&fr->mr->iorange);
475 }
476
477 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
478 {
479 isa_unassign_ioport(int128_get64(fr->addr.start),
480 int128_get64(fr->addr.size));
481 }
482
483 static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
484 {
485 int r;
486
487 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
488
489 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
490 fd->data, true);
491 if (r < 0) {
492 abort();
493 }
494 }
495
496 static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
497 {
498 int r;
499
500 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
501 fd->data, false);
502 if (r < 0) {
503 abort();
504 }
505 }
506
507 static const AddressSpaceOps address_space_ops_io = {
508 .range_add = as_io_range_add,
509 .range_del = as_io_range_del,
510 .ioeventfd_add = as_io_ioeventfd_add,
511 .ioeventfd_del = as_io_ioeventfd_del,
512 };
513
514 static AddressSpace address_space_io = {
515 .ops = &address_space_ops_io,
516 };
517
518 /* Render a memory region into the global view. Ranges in @view obscure
519 * ranges in @mr.
520 */
521 static void render_memory_region(FlatView *view,
522 MemoryRegion *mr,
523 Int128 base,
524 AddrRange clip,
525 bool readonly)
526 {
527 MemoryRegion *subregion;
528 unsigned i;
529 target_phys_addr_t offset_in_region;
530 Int128 remain;
531 Int128 now;
532 FlatRange fr;
533 AddrRange tmp;
534
535 if (!mr->enabled) {
536 return;
537 }
538
539 int128_addto(&base, int128_make64(mr->addr));
540 readonly |= mr->readonly;
541
542 tmp = addrrange_make(base, mr->size);
543
544 if (!addrrange_intersects(tmp, clip)) {
545 return;
546 }
547
548 clip = addrrange_intersection(tmp, clip);
549
550 if (mr->alias) {
551 int128_subfrom(&base, int128_make64(mr->alias->addr));
552 int128_subfrom(&base, int128_make64(mr->alias_offset));
553 render_memory_region(view, mr->alias, base, clip, readonly);
554 return;
555 }
556
557 /* Render subregions in priority order. */
558 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
559 render_memory_region(view, subregion, base, clip, readonly);
560 }
561
562 if (!mr->terminates) {
563 return;
564 }
565
566 offset_in_region = int128_get64(int128_sub(clip.start, base));
567 base = clip.start;
568 remain = clip.size;
569
570 /* Render the region itself into any gaps left by the current view. */
571 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
572 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
573 continue;
574 }
575 if (int128_lt(base, view->ranges[i].addr.start)) {
576 now = int128_min(remain,
577 int128_sub(view->ranges[i].addr.start, base));
578 fr.mr = mr;
579 fr.offset_in_region = offset_in_region;
580 fr.addr = addrrange_make(base, now);
581 fr.dirty_log_mask = mr->dirty_log_mask;
582 fr.readable = mr->readable;
583 fr.readonly = readonly;
584 flatview_insert(view, i, &fr);
585 ++i;
586 int128_addto(&base, now);
587 offset_in_region += int128_get64(now);
588 int128_subfrom(&remain, now);
589 }
590 if (int128_eq(base, view->ranges[i].addr.start)) {
591 now = int128_min(remain, view->ranges[i].addr.size);
592 int128_addto(&base, now);
593 offset_in_region += int128_get64(now);
594 int128_subfrom(&remain, now);
595 }
596 }
597 if (int128_nz(remain)) {
598 fr.mr = mr;
599 fr.offset_in_region = offset_in_region;
600 fr.addr = addrrange_make(base, remain);
601 fr.dirty_log_mask = mr->dirty_log_mask;
602 fr.readable = mr->readable;
603 fr.readonly = readonly;
604 flatview_insert(view, i, &fr);
605 }
606 }
607
608 /* Render a memory topology into a list of disjoint absolute ranges. */
609 static FlatView generate_memory_topology(MemoryRegion *mr)
610 {
611 FlatView view;
612
613 flatview_init(&view);
614
615 render_memory_region(&view, mr, int128_zero(),
616 addrrange_make(int128_zero(), int128_2_64()), false);
617 flatview_simplify(&view);
618
619 return view;
620 }
621
622 static void address_space_add_del_ioeventfds(AddressSpace *as,
623 MemoryRegionIoeventfd *fds_new,
624 unsigned fds_new_nb,
625 MemoryRegionIoeventfd *fds_old,
626 unsigned fds_old_nb)
627 {
628 unsigned iold, inew;
629
630 /* Generate a symmetric difference of the old and new fd sets, adding
631 * and deleting as necessary.
632 */
633
634 iold = inew = 0;
635 while (iold < fds_old_nb || inew < fds_new_nb) {
636 if (iold < fds_old_nb
637 && (inew == fds_new_nb
638 || memory_region_ioeventfd_before(fds_old[iold],
639 fds_new[inew]))) {
640 as->ops->ioeventfd_del(as, &fds_old[iold]);
641 ++iold;
642 } else if (inew < fds_new_nb
643 && (iold == fds_old_nb
644 || memory_region_ioeventfd_before(fds_new[inew],
645 fds_old[iold]))) {
646 as->ops->ioeventfd_add(as, &fds_new[inew]);
647 ++inew;
648 } else {
649 ++iold;
650 ++inew;
651 }
652 }
653 }
654
655 static void address_space_update_ioeventfds(AddressSpace *as)
656 {
657 FlatRange *fr;
658 unsigned ioeventfd_nb = 0;
659 MemoryRegionIoeventfd *ioeventfds = NULL;
660 AddrRange tmp;
661 unsigned i;
662
663 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
664 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
665 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
666 int128_sub(fr->addr.start,
667 int128_make64(fr->offset_in_region)));
668 if (addrrange_intersects(fr->addr, tmp)) {
669 ++ioeventfd_nb;
670 ioeventfds = g_realloc(ioeventfds,
671 ioeventfd_nb * sizeof(*ioeventfds));
672 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
673 ioeventfds[ioeventfd_nb-1].addr = tmp;
674 }
675 }
676 }
677
678 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
679 as->ioeventfds, as->ioeventfd_nb);
680
681 g_free(as->ioeventfds);
682 as->ioeventfds = ioeventfds;
683 as->ioeventfd_nb = ioeventfd_nb;
684 }
685
686 static void address_space_update_topology_pass(AddressSpace *as,
687 FlatView old_view,
688 FlatView new_view,
689 bool adding)
690 {
691 unsigned iold, inew;
692 FlatRange *frold, *frnew;
693
694 /* Generate a symmetric difference of the old and new memory maps.
695 * Kill ranges in the old map, and instantiate ranges in the new map.
696 */
697 iold = inew = 0;
698 while (iold < old_view.nr || inew < new_view.nr) {
699 if (iold < old_view.nr) {
700 frold = &old_view.ranges[iold];
701 } else {
702 frold = NULL;
703 }
704 if (inew < new_view.nr) {
705 frnew = &new_view.ranges[inew];
706 } else {
707 frnew = NULL;
708 }
709
710 if (frold
711 && (!frnew
712 || int128_lt(frold->addr.start, frnew->addr.start)
713 || (int128_eq(frold->addr.start, frnew->addr.start)
714 && !flatrange_equal(frold, frnew)))) {
715 /* In old, but (not in new, or in new but attributes changed). */
716
717 if (!adding) {
718 as->ops->range_del(as, frold);
719 }
720
721 ++iold;
722 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
723 /* In both (logging may have changed) */
724
725 if (adding) {
726 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
727 as->ops->log_stop(as, frnew);
728 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
729 as->ops->log_start(as, frnew);
730 }
731 }
732
733 ++iold;
734 ++inew;
735 } else {
736 /* In new */
737
738 if (adding) {
739 as->ops->range_add(as, frnew);
740 }
741
742 ++inew;
743 }
744 }
745 }
746
747
748 static void address_space_update_topology(AddressSpace *as)
749 {
750 FlatView old_view = as->current_map;
751 FlatView new_view = generate_memory_topology(as->root);
752
753 address_space_update_topology_pass(as, old_view, new_view, false);
754 address_space_update_topology_pass(as, old_view, new_view, true);
755
756 as->current_map = new_view;
757 flatview_destroy(&old_view);
758 address_space_update_ioeventfds(as);
759 }
760
761 static void memory_region_update_topology(MemoryRegion *mr)
762 {
763 if (memory_region_transaction_depth) {
764 memory_region_update_pending |= !mr || mr->enabled;
765 return;
766 }
767
768 if (mr && !mr->enabled) {
769 return;
770 }
771
772 if (address_space_memory.root) {
773 address_space_update_topology(&address_space_memory);
774 }
775 if (address_space_io.root) {
776 address_space_update_topology(&address_space_io);
777 }
778
779 memory_region_update_pending = false;
780 }
781
782 void memory_region_transaction_begin(void)
783 {
784 ++memory_region_transaction_depth;
785 }
786
787 void memory_region_transaction_commit(void)
788 {
789 assert(memory_region_transaction_depth);
790 --memory_region_transaction_depth;
791 if (!memory_region_transaction_depth && memory_region_update_pending) {
792 memory_region_update_topology(NULL);
793 }
794 }
795
796 static void memory_region_destructor_none(MemoryRegion *mr)
797 {
798 }
799
800 static void memory_region_destructor_ram(MemoryRegion *mr)
801 {
802 qemu_ram_free(mr->ram_addr);
803 }
804
805 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
806 {
807 qemu_ram_free_from_ptr(mr->ram_addr);
808 }
809
810 static void memory_region_destructor_iomem(MemoryRegion *mr)
811 {
812 cpu_unregister_io_memory(mr->ram_addr);
813 }
814
815 static void memory_region_destructor_rom_device(MemoryRegion *mr)
816 {
817 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
818 cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
819 }
820
821 void memory_region_init(MemoryRegion *mr,
822 const char *name,
823 uint64_t size)
824 {
825 mr->ops = NULL;
826 mr->parent = NULL;
827 mr->size = int128_make64(size);
828 if (size == UINT64_MAX) {
829 mr->size = int128_2_64();
830 }
831 mr->addr = 0;
832 mr->offset = 0;
833 mr->enabled = true;
834 mr->terminates = false;
835 mr->readable = true;
836 mr->readonly = false;
837 mr->destructor = memory_region_destructor_none;
838 mr->priority = 0;
839 mr->may_overlap = false;
840 mr->alias = NULL;
841 QTAILQ_INIT(&mr->subregions);
842 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
843 QTAILQ_INIT(&mr->coalesced);
844 mr->name = g_strdup(name);
845 mr->dirty_log_mask = 0;
846 mr->ioeventfd_nb = 0;
847 mr->ioeventfds = NULL;
848 }
849
850 static bool memory_region_access_valid(MemoryRegion *mr,
851 target_phys_addr_t addr,
852 unsigned size,
853 bool is_write)
854 {
855 if (mr->ops->valid.accepts
856 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
857 return false;
858 }
859
860 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
861 return false;
862 }
863
864 /* Treat zero as compatibility all valid */
865 if (!mr->ops->valid.max_access_size) {
866 return true;
867 }
868
869 if (size > mr->ops->valid.max_access_size
870 || size < mr->ops->valid.min_access_size) {
871 return false;
872 }
873 return true;
874 }
875
876 static uint32_t memory_region_read_thunk_n(void *_mr,
877 target_phys_addr_t addr,
878 unsigned size)
879 {
880 MemoryRegion *mr = _mr;
881 uint64_t data = 0;
882
883 if (!memory_region_access_valid(mr, addr, size, false)) {
884 return -1U; /* FIXME: better signalling */
885 }
886
887 if (!mr->ops->read) {
888 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
889 }
890
891 /* FIXME: support unaligned access */
892 access_with_adjusted_size(addr + mr->offset, &data, size,
893 mr->ops->impl.min_access_size,
894 mr->ops->impl.max_access_size,
895 memory_region_read_accessor, mr);
896
897 return data;
898 }
899
900 static void memory_region_write_thunk_n(void *_mr,
901 target_phys_addr_t addr,
902 unsigned size,
903 uint64_t data)
904 {
905 MemoryRegion *mr = _mr;
906
907 if (!memory_region_access_valid(mr, addr, size, true)) {
908 return; /* FIXME: better signalling */
909 }
910
911 if (!mr->ops->write) {
912 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
913 return;
914 }
915
916 /* FIXME: support unaligned access */
917 access_with_adjusted_size(addr + mr->offset, &data, size,
918 mr->ops->impl.min_access_size,
919 mr->ops->impl.max_access_size,
920 memory_region_write_accessor, mr);
921 }
922
923 static uint32_t memory_region_read_thunk_b(void *mr, target_phys_addr_t addr)
924 {
925 return memory_region_read_thunk_n(mr, addr, 1);
926 }
927
928 static uint32_t memory_region_read_thunk_w(void *mr, target_phys_addr_t addr)
929 {
930 return memory_region_read_thunk_n(mr, addr, 2);
931 }
932
933 static uint32_t memory_region_read_thunk_l(void *mr, target_phys_addr_t addr)
934 {
935 return memory_region_read_thunk_n(mr, addr, 4);
936 }
937
938 static void memory_region_write_thunk_b(void *mr, target_phys_addr_t addr,
939 uint32_t data)
940 {
941 memory_region_write_thunk_n(mr, addr, 1, data);
942 }
943
944 static void memory_region_write_thunk_w(void *mr, target_phys_addr_t addr,
945 uint32_t data)
946 {
947 memory_region_write_thunk_n(mr, addr, 2, data);
948 }
949
950 static void memory_region_write_thunk_l(void *mr, target_phys_addr_t addr,
951 uint32_t data)
952 {
953 memory_region_write_thunk_n(mr, addr, 4, data);
954 }
955
956 static CPUReadMemoryFunc * const memory_region_read_thunk[] = {
957 memory_region_read_thunk_b,
958 memory_region_read_thunk_w,
959 memory_region_read_thunk_l,
960 };
961
962 static CPUWriteMemoryFunc * const memory_region_write_thunk[] = {
963 memory_region_write_thunk_b,
964 memory_region_write_thunk_w,
965 memory_region_write_thunk_l,
966 };
967
968 static void memory_region_prepare_ram_addr(MemoryRegion *mr)
969 {
970 if (mr->backend_registered) {
971 return;
972 }
973
974 mr->destructor = memory_region_destructor_iomem;
975 mr->ram_addr = cpu_register_io_memory(memory_region_read_thunk,
976 memory_region_write_thunk,
977 mr,
978 mr->ops->endianness);
979 mr->backend_registered = true;
980 }
981
982 void memory_region_init_io(MemoryRegion *mr,
983 const MemoryRegionOps *ops,
984 void *opaque,
985 const char *name,
986 uint64_t size)
987 {
988 memory_region_init(mr, name, size);
989 mr->ops = ops;
990 mr->opaque = opaque;
991 mr->terminates = true;
992 mr->backend_registered = false;
993 }
994
995 void memory_region_init_ram(MemoryRegion *mr,
996 DeviceState *dev,
997 const char *name,
998 uint64_t size)
999 {
1000 memory_region_init(mr, name, size);
1001 mr->terminates = true;
1002 mr->destructor = memory_region_destructor_ram;
1003 mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
1004 mr->backend_registered = true;
1005 }
1006
1007 void memory_region_init_ram_ptr(MemoryRegion *mr,
1008 DeviceState *dev,
1009 const char *name,
1010 uint64_t size,
1011 void *ptr)
1012 {
1013 memory_region_init(mr, name, size);
1014 mr->terminates = true;
1015 mr->destructor = memory_region_destructor_ram_from_ptr;
1016 mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr, mr);
1017 mr->backend_registered = true;
1018 }
1019
1020 void memory_region_init_alias(MemoryRegion *mr,
1021 const char *name,
1022 MemoryRegion *orig,
1023 target_phys_addr_t offset,
1024 uint64_t size)
1025 {
1026 memory_region_init(mr, name, size);
1027 mr->alias = orig;
1028 mr->alias_offset = offset;
1029 }
1030
1031 void memory_region_init_rom_device(MemoryRegion *mr,
1032 const MemoryRegionOps *ops,
1033 void *opaque,
1034 DeviceState *dev,
1035 const char *name,
1036 uint64_t size)
1037 {
1038 memory_region_init(mr, name, size);
1039 mr->ops = ops;
1040 mr->opaque = opaque;
1041 mr->terminates = true;
1042 mr->destructor = memory_region_destructor_rom_device;
1043 mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
1044 mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk,
1045 memory_region_write_thunk,
1046 mr,
1047 mr->ops->endianness);
1048 mr->ram_addr |= IO_MEM_ROMD;
1049 mr->backend_registered = true;
1050 }
1051
1052 void memory_region_destroy(MemoryRegion *mr)
1053 {
1054 assert(QTAILQ_EMPTY(&mr->subregions));
1055 mr->destructor(mr);
1056 memory_region_clear_coalescing(mr);
1057 g_free((char *)mr->name);
1058 g_free(mr->ioeventfds);
1059 }
1060
1061 uint64_t memory_region_size(MemoryRegion *mr)
1062 {
1063 if (int128_eq(mr->size, int128_2_64())) {
1064 return UINT64_MAX;
1065 }
1066 return int128_get64(mr->size);
1067 }
1068
1069 void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
1070 {
1071 mr->offset = offset;
1072 }
1073
1074 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1075 {
1076 uint8_t mask = 1 << client;
1077
1078 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1079 memory_region_update_topology(mr);
1080 }
1081
1082 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1083 unsigned client)
1084 {
1085 assert(mr->terminates);
1086 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client);
1087 }
1088
1089 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
1090 {
1091 assert(mr->terminates);
1092 return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
1093 }
1094
1095 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1096 {
1097 FlatRange *fr;
1098
1099 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1100 if (fr->mr == mr) {
1101 cpu_physical_sync_dirty_bitmap(int128_get64(fr->addr.start),
1102 int128_get64(addrrange_end(fr->addr)));
1103 }
1104 }
1105 }
1106
1107 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1108 {
1109 if (mr->readonly != readonly) {
1110 mr->readonly = readonly;
1111 memory_region_update_topology(mr);
1112 }
1113 }
1114
1115 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1116 {
1117 if (mr->readable != readable) {
1118 mr->readable = readable;
1119 memory_region_update_topology(mr);
1120 }
1121 }
1122
1123 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1124 target_phys_addr_t size, unsigned client)
1125 {
1126 assert(mr->terminates);
1127 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1128 mr->ram_addr + addr + size,
1129 1 << client);
1130 }
1131
1132 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1133 {
1134 if (mr->alias) {
1135 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1136 }
1137
1138 assert(mr->terminates);
1139
1140 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1141 }
1142
1143 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1144 {
1145 FlatRange *fr;
1146 CoalescedMemoryRange *cmr;
1147 AddrRange tmp;
1148
1149 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1150 if (fr->mr == mr) {
1151 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1152 int128_get64(fr->addr.size));
1153 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1154 tmp = addrrange_shift(cmr->addr,
1155 int128_sub(fr->addr.start,
1156 int128_make64(fr->offset_in_region)));
1157 if (!addrrange_intersects(tmp, fr->addr)) {
1158 continue;
1159 }
1160 tmp = addrrange_intersection(tmp, fr->addr);
1161 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1162 int128_get64(tmp.size));
1163 }
1164 }
1165 }
1166 }
1167
1168 void memory_region_set_coalescing(MemoryRegion *mr)
1169 {
1170 memory_region_clear_coalescing(mr);
1171 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1172 }
1173
1174 void memory_region_add_coalescing(MemoryRegion *mr,
1175 target_phys_addr_t offset,
1176 uint64_t size)
1177 {
1178 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1179
1180 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1181 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1182 memory_region_update_coalesced_range(mr);
1183 }
1184
1185 void memory_region_clear_coalescing(MemoryRegion *mr)
1186 {
1187 CoalescedMemoryRange *cmr;
1188
1189 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1190 cmr = QTAILQ_FIRST(&mr->coalesced);
1191 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1192 g_free(cmr);
1193 }
1194 memory_region_update_coalesced_range(mr);
1195 }
1196
1197 void memory_region_add_eventfd(MemoryRegion *mr,
1198 target_phys_addr_t addr,
1199 unsigned size,
1200 bool match_data,
1201 uint64_t data,
1202 int fd)
1203 {
1204 MemoryRegionIoeventfd mrfd = {
1205 .addr.start = int128_make64(addr),
1206 .addr.size = int128_make64(size),
1207 .match_data = match_data,
1208 .data = data,
1209 .fd = fd,
1210 };
1211 unsigned i;
1212
1213 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1214 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1215 break;
1216 }
1217 }
1218 ++mr->ioeventfd_nb;
1219 mr->ioeventfds = g_realloc(mr->ioeventfds,
1220 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1221 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1222 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1223 mr->ioeventfds[i] = mrfd;
1224 memory_region_update_topology(mr);
1225 }
1226
1227 void memory_region_del_eventfd(MemoryRegion *mr,
1228 target_phys_addr_t addr,
1229 unsigned size,
1230 bool match_data,
1231 uint64_t data,
1232 int fd)
1233 {
1234 MemoryRegionIoeventfd mrfd = {
1235 .addr.start = int128_make64(addr),
1236 .addr.size = int128_make64(size),
1237 .match_data = match_data,
1238 .data = data,
1239 .fd = fd,
1240 };
1241 unsigned i;
1242
1243 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1244 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1245 break;
1246 }
1247 }
1248 assert(i != mr->ioeventfd_nb);
1249 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1250 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1251 --mr->ioeventfd_nb;
1252 mr->ioeventfds = g_realloc(mr->ioeventfds,
1253 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1254 memory_region_update_topology(mr);
1255 }
1256
1257 static void memory_region_add_subregion_common(MemoryRegion *mr,
1258 target_phys_addr_t offset,
1259 MemoryRegion *subregion)
1260 {
1261 MemoryRegion *other;
1262
1263 assert(!subregion->parent);
1264 subregion->parent = mr;
1265 subregion->addr = offset;
1266 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1267 if (subregion->may_overlap || other->may_overlap) {
1268 continue;
1269 }
1270 if (int128_gt(int128_make64(offset),
1271 int128_add(int128_make64(other->addr), other->size))
1272 || int128_le(int128_add(int128_make64(offset), subregion->size),
1273 int128_make64(other->addr))) {
1274 continue;
1275 }
1276 #if 0
1277 printf("warning: subregion collision %llx/%llx (%s) "
1278 "vs %llx/%llx (%s)\n",
1279 (unsigned long long)offset,
1280 (unsigned long long)int128_get64(subregion->size),
1281 subregion->name,
1282 (unsigned long long)other->addr,
1283 (unsigned long long)int128_get64(other->size),
1284 other->name);
1285 #endif
1286 }
1287 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1288 if (subregion->priority >= other->priority) {
1289 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1290 goto done;
1291 }
1292 }
1293 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1294 done:
1295 memory_region_update_topology(mr);
1296 }
1297
1298
1299 void memory_region_add_subregion(MemoryRegion *mr,
1300 target_phys_addr_t offset,
1301 MemoryRegion *subregion)
1302 {
1303 subregion->may_overlap = false;
1304 subregion->priority = 0;
1305 memory_region_add_subregion_common(mr, offset, subregion);
1306 }
1307
1308 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1309 target_phys_addr_t offset,
1310 MemoryRegion *subregion,
1311 unsigned priority)
1312 {
1313 subregion->may_overlap = true;
1314 subregion->priority = priority;
1315 memory_region_add_subregion_common(mr, offset, subregion);
1316 }
1317
1318 void memory_region_del_subregion(MemoryRegion *mr,
1319 MemoryRegion *subregion)
1320 {
1321 assert(subregion->parent == mr);
1322 subregion->parent = NULL;
1323 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1324 memory_region_update_topology(mr);
1325 }
1326
1327 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1328 {
1329 if (enabled == mr->enabled) {
1330 return;
1331 }
1332 mr->enabled = enabled;
1333 memory_region_update_topology(NULL);
1334 }
1335
1336 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1337 {
1338 MemoryRegion *parent = mr->parent;
1339 unsigned priority = mr->priority;
1340 bool may_overlap = mr->may_overlap;
1341
1342 if (addr == mr->addr || !parent) {
1343 mr->addr = addr;
1344 return;
1345 }
1346
1347 memory_region_transaction_begin();
1348 memory_region_del_subregion(parent, mr);
1349 if (may_overlap) {
1350 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1351 } else {
1352 memory_region_add_subregion(parent, addr, mr);
1353 }
1354 memory_region_transaction_commit();
1355 }
1356
1357 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1358 {
1359 target_phys_addr_t old_offset = mr->alias_offset;
1360
1361 assert(mr->alias);
1362 mr->alias_offset = offset;
1363
1364 if (offset == old_offset || !mr->parent) {
1365 return;
1366 }
1367
1368 memory_region_update_topology(mr);
1369 }
1370
1371 void set_system_memory_map(MemoryRegion *mr)
1372 {
1373 address_space_memory.root = mr;
1374 memory_region_update_topology(NULL);
1375 }
1376
1377 void set_system_io_map(MemoryRegion *mr)
1378 {
1379 address_space_io.root = mr;
1380 memory_region_update_topology(NULL);
1381 }
1382
1383 typedef struct MemoryRegionList MemoryRegionList;
1384
1385 struct MemoryRegionList {
1386 const MemoryRegion *mr;
1387 bool printed;
1388 QTAILQ_ENTRY(MemoryRegionList) queue;
1389 };
1390
1391 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1392
1393 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1394 const MemoryRegion *mr, unsigned int level,
1395 target_phys_addr_t base,
1396 MemoryRegionListHead *alias_print_queue)
1397 {
1398 MemoryRegionList *new_ml, *ml, *next_ml;
1399 MemoryRegionListHead submr_print_queue;
1400 const MemoryRegion *submr;
1401 unsigned int i;
1402
1403 if (!mr) {
1404 return;
1405 }
1406
1407 for (i = 0; i < level; i++) {
1408 mon_printf(f, " ");
1409 }
1410
1411 if (mr->alias) {
1412 MemoryRegionList *ml;
1413 bool found = false;
1414
1415 /* check if the alias is already in the queue */
1416 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1417 if (ml->mr == mr->alias && !ml->printed) {
1418 found = true;
1419 }
1420 }
1421
1422 if (!found) {
1423 ml = g_new(MemoryRegionList, 1);
1424 ml->mr = mr->alias;
1425 ml->printed = false;
1426 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1427 }
1428 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): alias %s @%s "
1429 TARGET_FMT_plx "-" TARGET_FMT_plx "\n",
1430 base + mr->addr,
1431 base + mr->addr
1432 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1433 mr->priority,
1434 mr->name,
1435 mr->alias->name,
1436 mr->alias_offset,
1437 mr->alias_offset
1438 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1439 } else {
1440 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): %s\n",
1441 base + mr->addr,
1442 base + mr->addr
1443 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1444 mr->priority,
1445 mr->name);
1446 }
1447
1448 QTAILQ_INIT(&submr_print_queue);
1449
1450 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1451 new_ml = g_new(MemoryRegionList, 1);
1452 new_ml->mr = submr;
1453 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1454 if (new_ml->mr->addr < ml->mr->addr ||
1455 (new_ml->mr->addr == ml->mr->addr &&
1456 new_ml->mr->priority > ml->mr->priority)) {
1457 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1458 new_ml = NULL;
1459 break;
1460 }
1461 }
1462 if (new_ml) {
1463 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1464 }
1465 }
1466
1467 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1468 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1469 alias_print_queue);
1470 }
1471
1472 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1473 g_free(ml);
1474 }
1475 }
1476
1477 void mtree_info(fprintf_function mon_printf, void *f)
1478 {
1479 MemoryRegionListHead ml_head;
1480 MemoryRegionList *ml, *ml2;
1481
1482 QTAILQ_INIT(&ml_head);
1483
1484 mon_printf(f, "memory\n");
1485 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1486
1487 /* print aliased regions */
1488 QTAILQ_FOREACH(ml, &ml_head, queue) {
1489 if (!ml->printed) {
1490 mon_printf(f, "%s\n", ml->mr->name);
1491 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1492 }
1493 }
1494
1495 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1496 g_free(ml);
1497 }
1498
1499 if (address_space_io.root &&
1500 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1501 QTAILQ_INIT(&ml_head);
1502 mon_printf(f, "I/O\n");
1503 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1504 }
1505 }
Qemu with PowerPC KVM improvements