hw/i2c/versatile_i2c.c

   1 /*
   2  * ARM Versatile I2C controller
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
   6  *
   7  * This file is derived from hw/realview.c by Paul Brook
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version 2
  12  * of the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  21  *
  22  */
  23
  24 #include "hw/sysbus.h"
  25 #include "bitbang_i2c.h"
  26
  27 typedef struct {
  28     SysBusDevice busdev;
  29     MemoryRegion iomem;
  30     bitbang_i2c_interface *bitbang;
  31     int out;
  32     int in;
  33 } VersatileI2CState;
  34
  35 static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
  36                                    unsigned size)
  37 {
  38     VersatileI2CState *s = (VersatileI2CState *)opaque;
  39
  40     if (offset == 0) {
  41         return (s->out & 1) | (s->in << 1);
  42     } else {
  43         qemu_log_mask(LOG_GUEST_ERROR,
  44                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
  45         return -1;
  46     }
  47 }
  48
  49 static void versatile_i2c_write(void *opaque, hwaddr offset,
  50                                 uint64_t value, unsigned size)
  51 {
  52     VersatileI2CState *s = (VersatileI2CState *)opaque;
  53
  54     switch (offset) {
  55     case 0:
  56         s->out |= value & 3;
  57         break;
  58     case 4:
  59         s->out &= ~value;
  60         break;
  61     default:
  62         qemu_log_mask(LOG_GUEST_ERROR,
  63                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
  64     }
  65     bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
  66     s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
  67 }
  68
  69 static const MemoryRegionOps versatile_i2c_ops = {
  70     .read = versatile_i2c_read,
  71     .write = versatile_i2c_write,
  72     .endianness = DEVICE_NATIVE_ENDIAN,
  73 };
  74
  75 static int versatile_i2c_init(SysBusDevice *dev)
  76 {
  77     VersatileI2CState *s = FROM_SYSBUS(VersatileI2CState, dev);
  78     i2c_bus *bus;
  79
  80     bus = i2c_init_bus(&dev->qdev, "i2c");
  81     s->bitbang = bitbang_i2c_init(bus);
  82     memory_region_init_io(&s->iomem, &versatile_i2c_ops, s,
  83                           "versatile_i2c", 0x1000);
  84     sysbus_init_mmio(dev, &s->iomem);
  85     return 0;
  86 }
  87
  88 static void versatile_i2c_class_init(ObjectClass *klass, void *data)
  89 {
  90     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
  91
  92     k->init = versatile_i2c_init;
  93 }
  94
  95 static const TypeInfo versatile_i2c_info = {
  96     .name          = "versatile_i2c",
  97     .parent        = TYPE_SYS_BUS_DEVICE,
  98     .instance_size = sizeof(VersatileI2CState),
  99     .class_init    = versatile_i2c_class_init,
 100 };
 101
 102 static void versatile_i2c_register_types(void)
 103 {
 104     type_register_static(&versatile_i2c_info);
 105 }
 106
 107 type_init(versatile_i2c_register_types)