PPC: Add MMU type for 2.06 with AMR but no TB pages
[qemu/agraf.git] / hw / misc / omap_l4.c
blobac8251f7367150ed851ddb96e96a977c2ddbdd99
1 /*
2 * TI OMAP L4 interconnect emulation.
4 * Copyright (C) 2007-2009 Nokia Corporation
5 * Written by Andrzej Zaborowski <andrew@openedhand.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 or
10 * (at your option) any later version of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "hw/hw.h"
21 #include "hw/arm/omap.h"
23 struct omap_l4_s {
24 MemoryRegion *address_space;
25 hwaddr base;
26 int ta_num;
27 struct omap_target_agent_s ta[0];
30 struct omap_l4_s *omap_l4_init(MemoryRegion *address_space,
31 hwaddr base, int ta_num)
33 struct omap_l4_s *bus = g_malloc0(
34 sizeof(*bus) + ta_num * sizeof(*bus->ta));
36 bus->address_space = address_space;
37 bus->ta_num = ta_num;
38 bus->base = base;
40 return bus;
43 hwaddr omap_l4_region_base(struct omap_target_agent_s *ta,
44 int region)
46 return ta->bus->base + ta->start[region].offset;
49 hwaddr omap_l4_region_size(struct omap_target_agent_s *ta,
50 int region)
52 return ta->start[region].size;
55 static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
56 unsigned size)
58 struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
60 if (size != 2) {
61 return omap_badwidth_read16(opaque, addr);
64 switch (addr) {
65 case 0x00: /* COMPONENT */
66 return s->component;
68 case 0x20: /* AGENT_CONTROL */
69 return s->control;
71 case 0x28: /* AGENT_STATUS */
72 return s->status;
75 OMAP_BAD_REG(addr);
76 return 0;
79 static void omap_l4ta_write(void *opaque, hwaddr addr,
80 uint64_t value, unsigned size)
82 struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
84 if (size != 4) {
85 return omap_badwidth_write32(opaque, addr, value);
88 switch (addr) {
89 case 0x00: /* COMPONENT */
90 case 0x28: /* AGENT_STATUS */
91 OMAP_RO_REG(addr);
92 break;
94 case 0x20: /* AGENT_CONTROL */
95 s->control = value & 0x01000700;
96 if (value & 1) /* OCP_RESET */
97 s->status &= ~1; /* REQ_TIMEOUT */
98 break;
100 default:
101 OMAP_BAD_REG(addr);
105 static const MemoryRegionOps omap_l4ta_ops = {
106 .read = omap_l4ta_read,
107 .write = omap_l4ta_write,
108 .endianness = DEVICE_NATIVE_ENDIAN,
111 struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
112 const struct omap_l4_region_s *regions,
113 const struct omap_l4_agent_info_s *agents,
114 int cs)
116 int i;
117 struct omap_target_agent_s *ta = NULL;
118 const struct omap_l4_agent_info_s *info = NULL;
120 for (i = 0; i < bus->ta_num; i ++)
121 if (agents[i].ta == cs) {
122 ta = &bus->ta[i];
123 info = &agents[i];
124 break;
126 if (!ta) {
127 fprintf(stderr, "%s: bad target agent (%i)\n", __FUNCTION__, cs);
128 exit(-1);
131 ta->bus = bus;
132 ta->start = &regions[info->region];
133 ta->regions = info->regions;
135 ta->component = ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
136 ta->status = 0x00000000;
137 ta->control = 0x00000200; /* XXX 01000200 for L4TAO */
139 memory_region_init_io(&ta->iomem, &omap_l4ta_ops, ta, "omap.l4ta",
140 omap_l4_region_size(ta, info->ta_region));
141 omap_l4_attach(ta, info->ta_region, &ta->iomem);
143 return ta;
146 hwaddr omap_l4_attach(struct omap_target_agent_s *ta,
147 int region, MemoryRegion *mr)
149 hwaddr base;
151 if (region < 0 || region >= ta->regions) {
152 fprintf(stderr, "%s: bad io region (%i)\n", __FUNCTION__, region);
153 exit(-1);
156 base = ta->bus->base + ta->start[region].offset;
157 if (mr) {
158 memory_region_add_subregion(ta->bus->address_space, base, mr);
161 return base;