stubs: Add a vmstate_dummy struct for CONFIG_USER_ONLY
[qemu/agraf.git] / hw / acpi.h
blobc3628d070dbe7e3bc52bbd1104f72dc265b008b9
1 #ifndef QEMU_HW_ACPI_H
2 #define QEMU_HW_ACPI_H
3 /*
4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see
19 * <http://www.gnu.org/licenses/>.
22 /* from linux include/acpi/actype.h */
23 /* Default ACPI register widths */
25 #define ACPI_GPE_REGISTER_WIDTH 8
26 #define ACPI_PM1_REGISTER_WIDTH 16
27 #define ACPI_PM2_REGISTER_WIDTH 8
28 #define ACPI_PM_TIMER_WIDTH 32
30 /* PM Timer ticks per second (HZ) */
31 #define PM_TIMER_FREQUENCY 3579545
34 /* ACPI fixed hardware registers */
36 /* from linux/drivers/acpi/acpica/aclocal.h */
37 /* Masks used to access the bit_registers */
39 /* PM1x_STS */
40 #define ACPI_BITMASK_TIMER_STATUS 0x0001
41 #define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
42 #define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
43 #define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
44 #define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
45 #define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
46 #define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
47 #define ACPI_BITMASK_WAKE_STATUS 0x8000
49 #define ACPI_BITMASK_ALL_FIXED_STATUS (\
50 ACPI_BITMASK_TIMER_STATUS | \
51 ACPI_BITMASK_BUS_MASTER_STATUS | \
52 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
53 ACPI_BITMASK_POWER_BUTTON_STATUS | \
54 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
55 ACPI_BITMASK_RT_CLOCK_STATUS | \
56 ACPI_BITMASK_WAKE_STATUS)
58 /* PM1x_EN */
59 #define ACPI_BITMASK_TIMER_ENABLE 0x0001
60 #define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
61 #define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
62 #define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
63 #define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
64 #define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */
66 /* PM1x_CNT */
67 #define ACPI_BITMASK_SCI_ENABLE 0x0001
68 #define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
69 #define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
70 #define ACPI_BITMASK_SLEEP_TYPE 0x1C00
71 #define ACPI_BITMASK_SLEEP_ENABLE 0x2000
73 /* PM2_CNT */
74 #define ACPI_BITMASK_ARB_DISABLE 0x0001
76 /* structs */
77 typedef struct ACPIPMTimer ACPIPMTimer;
78 typedef struct ACPIPM1EVT ACPIPM1EVT;
79 typedef struct ACPIPM1CNT ACPIPM1CNT;
80 typedef struct ACPIGPE ACPIGPE;
81 typedef struct ACPIREGS ACPIREGS;
83 typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
85 struct ACPIPMTimer {
86 QEMUTimer *timer;
87 MemoryRegion io;
88 int64_t overflow_time;
90 acpi_update_sci_fn update_sci;
93 struct ACPIPM1EVT {
94 MemoryRegion io;
95 uint16_t sts;
96 uint16_t en;
97 acpi_update_sci_fn update_sci;
100 struct ACPIPM1CNT {
101 MemoryRegion io;
102 uint16_t cnt;
103 uint8_t s4_val;
106 struct ACPIGPE {
107 uint8_t len;
109 uint8_t *sts;
110 uint8_t *en;
113 struct ACPIREGS {
114 ACPIPMTimer tmr;
115 ACPIGPE gpe;
116 struct {
117 ACPIPM1EVT evt;
118 ACPIPM1CNT cnt;
119 } pm1;
120 Notifier wakeup;
123 /* PM_TMR */
124 void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
125 void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
126 void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
127 MemoryRegion *parent);
128 void acpi_pm_tmr_reset(ACPIREGS *ar);
130 #include "qemu/timer.h"
131 static inline int64_t acpi_pm_tmr_get_clock(void)
133 return muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY,
134 get_ticks_per_sec());
137 /* PM1a_EVT: piix and ich9 don't implement PM1b. */
138 uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
139 void acpi_pm1_evt_power_down(ACPIREGS *ar);
140 void acpi_pm1_evt_reset(ACPIREGS *ar);
141 void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
142 MemoryRegion *parent);
144 /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
145 void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent);
146 void acpi_pm1_cnt_update(ACPIREGS *ar,
147 bool sci_enable, bool sci_disable);
148 void acpi_pm1_cnt_reset(ACPIREGS *ar);
150 /* GPE0 */
151 void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
152 void acpi_gpe_reset(ACPIREGS *ar);
154 void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
155 uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
157 #endif /* !QEMU_HW_ACPI_H */