bad merge resolution in hw/escc.c
[qemu/aliguori.git] / hw / mips.h
blobcae5f4c8044f5775bc7911457af8f863932bdfa4
1 #ifndef HW_MIPS_H
2 #define HW_MIPS_H
3 /* Definitions for mips board emulation. */
5 /* gt64xxx.c */
6 PCIBus *gt64120_register(qemu_irq *pic);
8 /* bonito.c */
9 PCIBus *bonito_init(qemu_irq *pic);
11 /* g364fb.c */
12 int g364fb_mm_init(target_phys_addr_t vram_base,
13 target_phys_addr_t ctrl_base, int it_shift,
14 qemu_irq irq);
16 /* mipsnet.c */
17 void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
19 /* jazz_led.c */
20 void jazz_led_init(target_phys_addr_t base);
22 /* rc4030.c */
23 typedef struct rc4030DMAState *rc4030_dma;
24 void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
25 void rc4030_dma_read(void *dma, uint8_t *buf, int len);
26 void rc4030_dma_write(void *dma, uint8_t *buf, int len);
28 void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
29 qemu_irq **irqs, rc4030_dma **dmas);
31 /* dp8393x.c */
32 void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
33 qemu_irq irq, void* mem_opaque,
34 void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write));
36 #endif