hw/pxa.h

   1 /*
   2  * Intel XScale PXA255/270 processor support.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  */
   9 #ifndef PXA_H
  10 # define PXA_H                  "pxa.h"
  11
  12 /* Interrupt numbers */
  13 # define PXA2XX_PIC_SSP3        0
  14 # define PXA2XX_PIC_USBH2       2
  15 # define PXA2XX_PIC_USBH1       3
  16 # define PXA2XX_PIC_KEYPAD      4
  17 # define PXA2XX_PIC_PWRI2C      6
  18 # define PXA25X_PIC_HWUART      7
  19 # define PXA27X_PIC_OST_4_11    7
  20 # define PXA2XX_PIC_GPIO_0      8
  21 # define PXA2XX_PIC_GPIO_1      9
  22 # define PXA2XX_PIC_GPIO_X      10
  23 # define PXA2XX_PIC_I2S         13
  24 # define PXA26X_PIC_ASSP        15
  25 # define PXA25X_PIC_NSSP        16
  26 # define PXA27X_PIC_SSP2        16
  27 # define PXA2XX_PIC_LCD         17
  28 # define PXA2XX_PIC_I2C         18
  29 # define PXA2XX_PIC_ICP         19
  30 # define PXA2XX_PIC_STUART      20
  31 # define PXA2XX_PIC_BTUART      21
  32 # define PXA2XX_PIC_FFUART      22
  33 # define PXA2XX_PIC_MMC         23
  34 # define PXA2XX_PIC_SSP         24
  35 # define PXA2XX_PIC_DMA         25
  36 # define PXA2XX_PIC_OST_0       26
  37 # define PXA2XX_PIC_RTC1HZ      30
  38 # define PXA2XX_PIC_RTCALARM    31
  39
  40 /* DMA requests */
  41 # define PXA2XX_RX_RQ_I2S       2
  42 # define PXA2XX_TX_RQ_I2S       3
  43 # define PXA2XX_RX_RQ_BTUART    4
  44 # define PXA2XX_TX_RQ_BTUART    5
  45 # define PXA2XX_RX_RQ_FFUART    6
  46 # define PXA2XX_TX_RQ_FFUART    7
  47 # define PXA2XX_RX_RQ_SSP1      13
  48 # define PXA2XX_TX_RQ_SSP1      14
  49 # define PXA2XX_RX_RQ_SSP2      15
  50 # define PXA2XX_TX_RQ_SSP2      16
  51 # define PXA2XX_RX_RQ_ICP       17
  52 # define PXA2XX_TX_RQ_ICP       18
  53 # define PXA2XX_RX_RQ_STUART    19
  54 # define PXA2XX_TX_RQ_STUART    20
  55 # define PXA2XX_RX_RQ_MMCI      21
  56 # define PXA2XX_TX_RQ_MMCI      22
  57 # define PXA2XX_USB_RQ(x)       ((x) + 24)
  58 # define PXA2XX_RX_RQ_SSP3      66
  59 # define PXA2XX_TX_RQ_SSP3      67
  60
  61 # define PXA2XX_SDRAM_BASE      0xa0000000
  62 # define PXA2XX_INTERNAL_BASE   0x5c000000
  63 # define PXA2XX_INTERNAL_SIZE   0x40000
  64
  65 /* pxa2xx_pic.c */
  66 DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env);
  67
  68 /* pxa2xx_gpio.c */
  69 DeviceState *pxa2xx_gpio_init(target_phys_addr_t base,
  70                 CPUState *env, DeviceState *pic, int lines);
  71 void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler);
  72
  73 /* pxa2xx_dma.c */
  74 DeviceState *pxa255_dma_init(target_phys_addr_t base, qemu_irq irq);
  75 DeviceState *pxa27x_dma_init(target_phys_addr_t base, qemu_irq irq);
  76
  77 /* pxa2xx_lcd.c */
  78 typedef struct PXA2xxLCDState PXA2xxLCDState;
  79 PXA2xxLCDState *pxa2xx_lcdc_init(target_phys_addr_t base,
  80                 qemu_irq irq);
  81 void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler);
  82 void pxa2xx_lcdc_oritentation(void *opaque, int angle);
  83
  84 /* pxa2xx_mmci.c */
  85 typedef struct PXA2xxMMCIState PXA2xxMMCIState;
  86 PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
  87                 BlockDriverState *bd, qemu_irq irq,
  88                 qemu_irq rx_dma, qemu_irq tx_dma);
  89 void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly,
  90                 qemu_irq coverswitch);
  91
  92 /* pxa2xx_pcmcia.c */
  93 typedef struct PXA2xxPCMCIAState PXA2xxPCMCIAState;
  94 PXA2xxPCMCIAState *pxa2xx_pcmcia_init(target_phys_addr_t base);
  95 int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card);
  96 int pxa2xx_pcmcia_dettach(void *opaque);
  97 void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq);
  98
  99 /* pxa2xx_keypad.c */
 100 struct  keymap {
 101     int column;
 102     int row;
 103 };
 104 typedef struct PXA2xxKeyPadState PXA2xxKeyPadState;
 105 PXA2xxKeyPadState *pxa27x_keypad_init(target_phys_addr_t base,
 106                 qemu_irq irq);
 107 void pxa27x_register_keypad(PXA2xxKeyPadState *kp, struct keymap *map,
 108                 int size);
 109
 110 /* pxa2xx.c */
 111 typedef struct PXA2xxI2CState PXA2xxI2CState;
 112 PXA2xxI2CState *pxa2xx_i2c_init(target_phys_addr_t base,
 113                 qemu_irq irq, uint32_t page_size);
 114 i2c_bus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
 115
 116 typedef struct PXA2xxI2SState PXA2xxI2SState;
 117 typedef struct PXA2xxFIrState PXA2xxFIrState;
 118
 119 typedef struct {
 120     CPUState *env;
 121     DeviceState *pic;
 122     qemu_irq reset;
 123     DeviceState *dma;
 124     DeviceState *gpio;
 125     PXA2xxLCDState *lcd;
 126     SSIBus **ssp;
 127     PXA2xxI2CState *i2c[2];
 128     PXA2xxMMCIState *mmc;
 129     PXA2xxPCMCIAState *pcmcia[2];
 130     PXA2xxI2SState *i2s;
 131     PXA2xxFIrState *fir;
 132     PXA2xxKeyPadState *kp;
 133
 134     /* Power management */
 135     target_phys_addr_t pm_base;
 136     uint32_t pm_regs[0x40];
 137
 138     /* Clock management */
 139     target_phys_addr_t cm_base;
 140     uint32_t cm_regs[4];
 141     uint32_t clkcfg;
 142
 143     /* Memory management */
 144     target_phys_addr_t mm_base;
 145     uint32_t mm_regs[0x1a];
 146
 147     /* Performance monitoring */
 148     uint32_t pmnc;
 149 } PXA2xxState;
 150
 151 struct PXA2xxI2SState {
 152     qemu_irq irq;
 153     qemu_irq rx_dma;
 154     qemu_irq tx_dma;
 155     void (*data_req)(void *, int, int);
 156
 157     uint32_t control[2];
 158     uint32_t status;
 159     uint32_t mask;
 160     uint32_t clk;
 161
 162     int enable;
 163     int rx_len;
 164     int tx_len;
 165     void (*codec_out)(void *, uint32_t);
 166     uint32_t (*codec_in)(void *);
 167     void *opaque;
 168
 169     int fifo_len;
 170     uint32_t fifo[16];
 171 };
 172
 173 # define PA_FMT                 "0x%08lx"
 174 # define REG_FMT                "0x" TARGET_FMT_plx
 175
 176 PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision);
 177 PXA2xxState *pxa255_init(unsigned int sdram_size);
 178
 179 #endif  /* PXA_H */