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qapi: Improve specificity of type/member descriptions
[qemu/armbru.git] / hw / m68k / virt.c
blob731205b215b26b9424e6b1da8731293114ebb59b
1 /*
2 * SPDX-License-Identifier: GPL-2.0-or-later
3 *
4 * QEMU Vitual M68K Machine
5 *
6 * (c) 2020 Laurent Vivier <laurent@vivier.eu>
7 *
8 */
9
10 #include "qemu/osdep.h"
11 #include "qemu/units.h"
12 #include "qemu/guest-random.h"
13 #include "sysemu/sysemu.h"
14 #include "cpu.h"
15 #include "hw/boards.h"
16 #include "hw/qdev-properties.h"
17 #include "elf.h"
18 #include "hw/loader.h"
19 #include "ui/console.h"
20 #include "hw/sysbus.h"
21 #include "standard-headers/asm-m68k/bootinfo.h"
22 #include "standard-headers/asm-m68k/bootinfo-virt.h"
23 #include "bootinfo.h"
24 #include "net/net.h"
25 #include "qapi/error.h"
26 #include "qemu/error-report.h"
27 #include "sysemu/qtest.h"
28 #include "sysemu/runstate.h"
29 #include "sysemu/reset.h"
30
31 #include "hw/intc/m68k_irqc.h"
32 #include "hw/misc/virt_ctrl.h"
33 #include "hw/char/goldfish_tty.h"
34 #include "hw/rtc/goldfish_rtc.h"
35 #include "hw/intc/goldfish_pic.h"
36 #include "hw/virtio/virtio-mmio.h"
37 #include "hw/virtio/virtio-blk.h"
38
39 /*
40 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
41 * CPU IRQ #1 -> PIC #1
42 * IRQ #1 to IRQ #31 -> unused
43 * IRQ #32 -> goldfish-tty
44 * CPU IRQ #2 -> PIC #2
45 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
46 * CPU IRQ #3 -> PIC #3
47 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
48 * CPU IRQ #4 -> PIC #4
49 * IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
50 * CPU IRQ #5 -> PIC #5
51 * IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
52 * CPU IRQ #6 -> PIC #6
53 * IRQ #1 -> goldfish-rtc
54 * IRQ #2 to IRQ #32 -> unused
55 * CPU IRQ #7 -> NMI
56 */
57
58 #define PIC_IRQ_BASE(num) (8 + (num - 1) * 32)
59 #define PIC_IRQ(num, irq) (PIC_IRQ_BASE(num) + irq - 1)
60 #define PIC_GPIO(pic_irq) (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \
61 (pic_irq - 8) % 32))
62
63 #define VIRT_GF_PIC_MMIO_BASE 0xff000000 /* MMIO: 0xff000000 - 0xff005fff */
64 #define VIRT_GF_PIC_IRQ_BASE 1 /* IRQ: #1 -> #6 */
65 #define VIRT_GF_PIC_NB 6
66
67 /* 2 goldfish-rtc (and timer) */
68 #define VIRT_GF_RTC_MMIO_BASE 0xff006000 /* MMIO: 0xff006000 - 0xff007fff */
69 #define VIRT_GF_RTC_IRQ_BASE PIC_IRQ(6, 1) /* PIC: #6, IRQ: #1 */
70 #define VIRT_GF_RTC_NB 2
71
72 /* 1 goldfish-tty */
73 #define VIRT_GF_TTY_MMIO_BASE 0xff008000 /* MMIO: 0xff008000 - 0xff008fff */
74 #define VIRT_GF_TTY_IRQ_BASE PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */
75
76 /* 1 virt-ctrl */
77 #define VIRT_CTRL_MMIO_BASE 0xff009000 /* MMIO: 0xff009000 - 0xff009fff */
78 #define VIRT_CTRL_IRQ_BASE PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */
79
80 /*
81 * virtio-mmio size is 0x200 bytes
82 * we use 4 goldfish-pic to attach them,
83 * we can attach 32 virtio devices / goldfish-pic
84 * -> we can manage 32 * 4 = 128 virtio devices
85 */
86 #define VIRT_VIRTIO_MMIO_BASE 0xff010000 /* MMIO: 0xff010000 - 0xff01ffff */
87 #define VIRT_VIRTIO_IRQ_BASE PIC_IRQ(2, 1) /* PIC: 2, 3, 4, 5, IRQ: ALL */
88
89 typedef struct {
90 M68kCPU *cpu;
91 hwaddr initial_pc;
92 hwaddr initial_stack;
93 } ResetInfo;
94
95 static void main_cpu_reset(void *opaque)
96 {
97 ResetInfo *reset_info = opaque;
98 M68kCPU *cpu = reset_info->cpu;
99 CPUState *cs = CPU(cpu);
100
101 cpu_reset(cs);
102 cpu->env.aregs[7] = reset_info->initial_stack;
103 cpu->env.pc = reset_info->initial_pc;
104 }
105
106 static void rerandomize_rng_seed(void *opaque)
107 {
108 struct bi_record *rng_seed = opaque;
109 qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
110 be16_to_cpu(*(uint16_t *)rng_seed->data));
111 }
112
113 static void virt_init(MachineState *machine)
114 {
115 M68kCPU *cpu = NULL;
116 int32_t kernel_size;
117 uint64_t elf_entry;
118 ram_addr_t initrd_base;
119 int32_t initrd_size;
120 ram_addr_t ram_size = machine->ram_size;
121 const char *kernel_filename = machine->kernel_filename;
122 const char *initrd_filename = machine->initrd_filename;
123 const char *kernel_cmdline = machine->kernel_cmdline;
124 hwaddr parameters_base;
125 DeviceState *dev;
126 DeviceState *irqc_dev;
127 DeviceState *pic_dev[VIRT_GF_PIC_NB];
128 SysBusDevice *sysbus;
129 hwaddr io_base;
130 int i;
131 ResetInfo *reset_info;
132 uint8_t rng_seed[32];
133
134 if (ram_size > 3399672 * KiB) {
135 /*
136 * The physical memory can be up to 4 GiB - 16 MiB, but linux
137 * kernel crashes after this limit (~ 3.2 GiB)
138 */
139 error_report("Too much memory for this machine: %" PRId64 " KiB, "
140 "maximum 3399672 KiB", ram_size / KiB);
141 exit(1);
142 }
143
144 reset_info = g_new0(ResetInfo, 1);
145
146 /* init CPUs */
147 cpu = M68K_CPU(cpu_create(machine->cpu_type));
148
149 reset_info->cpu = cpu;
150 qemu_register_reset(main_cpu_reset, reset_info);
151
152 /* RAM */
153 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
154
155 /* IRQ Controller */
156
157 irqc_dev = qdev_new(TYPE_M68K_IRQC);
158 sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
159
160 /*
161 * 6 goldfish-pic
162 *
163 * map: 0xff000000 - 0xff006fff = 28 KiB
164 * IRQ: #1 (lower priority) -> #6 (higher priority)
165 *
166 */
167 io_base = VIRT_GF_PIC_MMIO_BASE;
168 for (i = 0; i < VIRT_GF_PIC_NB; i++) {
169 pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC);
170 sysbus = SYS_BUS_DEVICE(pic_dev[i]);
171 qdev_prop_set_uint8(pic_dev[i], "index", i);
172 sysbus_realize_and_unref(sysbus, &error_fatal);
173
174 sysbus_mmio_map(sysbus, 0, io_base);
175 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i));
176
177 io_base += 0x1000;
178 }
179
180 /* goldfish-rtc */
181 io_base = VIRT_GF_RTC_MMIO_BASE;
182 for (i = 0; i < VIRT_GF_RTC_NB; i++) {
183 dev = qdev_new(TYPE_GOLDFISH_RTC);
184 qdev_prop_set_bit(dev, "big-endian", true);
185 sysbus = SYS_BUS_DEVICE(dev);
186 sysbus_realize_and_unref(sysbus, &error_fatal);
187 sysbus_mmio_map(sysbus, 0, io_base);
188 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i));
189
190 io_base += 0x1000;
191 }
192
193 /* goldfish-tty */
194 dev = qdev_new(TYPE_GOLDFISH_TTY);
195 sysbus = SYS_BUS_DEVICE(dev);
196 qdev_prop_set_chr(dev, "chardev", serial_hd(0));
197 sysbus_realize_and_unref(sysbus, &error_fatal);
198 sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE);
199 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE));
200
201 /* virt controller */
202 dev = qdev_new(TYPE_VIRT_CTRL);
203 sysbus = SYS_BUS_DEVICE(dev);
204 sysbus_realize_and_unref(sysbus, &error_fatal);
205 sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE);
206 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE));
207
208 /* virtio-mmio */
209 io_base = VIRT_VIRTIO_MMIO_BASE;
210 for (i = 0; i < 128; i++) {
211 dev = qdev_new(TYPE_VIRTIO_MMIO);
212 qdev_prop_set_bit(dev, "force-legacy", false);
213 sysbus = SYS_BUS_DEVICE(dev);
214 sysbus_realize_and_unref(sysbus, &error_fatal);
215 sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i));
216 sysbus_mmio_map(sysbus, 0, io_base);
217 io_base += 0x200;
218 }
219
220 if (kernel_filename) {
221 CPUState *cs = CPU(cpu);
222 uint64_t high;
223 void *param_blob, *param_ptr, *param_rng_seed;
224
225 if (kernel_cmdline) {
226 param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
227 } else {
228 param_blob = g_malloc(1024);
229 }
230
231 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
232 &elf_entry, NULL, &high, NULL, 1,
233 EM_68K, 0, 0);
234 if (kernel_size < 0) {
235 error_report("could not load kernel '%s'", kernel_filename);
236 exit(1);
237 }
238 reset_info->initial_pc = elf_entry;
239 parameters_base = (high + 1) & ~1;
240 param_ptr = param_blob;
241
242 BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_VIRT);
243 BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
244 BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
245 BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
246 BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
247
248 BOOTINFO1(param_ptr, BI_VIRT_QEMU_VERSION,
249 ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) |
250 (QEMU_VERSION_MICRO << 8)));
251 BOOTINFO2(param_ptr, BI_VIRT_GF_PIC_BASE,
252 VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE);
253 BOOTINFO2(param_ptr, BI_VIRT_GF_RTC_BASE,
254 VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE);
255 BOOTINFO2(param_ptr, BI_VIRT_GF_TTY_BASE,
256 VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE);
257 BOOTINFO2(param_ptr, BI_VIRT_CTRL_BASE,
258 VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE);
259 BOOTINFO2(param_ptr, BI_VIRT_VIRTIO_BASE,
260 VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE);
261
262 if (kernel_cmdline) {
263 BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
264 kernel_cmdline);
265 }
266
267 /* Pass seed to RNG. */
268 param_rng_seed = param_ptr;
269 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
270 BOOTINFODATA(param_ptr, BI_RNG_SEED,
271 rng_seed, sizeof(rng_seed));
272
273 /* load initrd */
274 if (initrd_filename) {
275 initrd_size = get_image_size(initrd_filename);
276 if (initrd_size < 0) {
277 error_report("could not load initial ram disk '%s'",
278 initrd_filename);
279 exit(1);
280 }
281
282 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
283 load_image_targphys(initrd_filename, initrd_base,
284 ram_size - initrd_base);
285 BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
286 initrd_size);
287 } else {
288 initrd_base = 0;
289 initrd_size = 0;
290 }
291 BOOTINFO0(param_ptr, BI_LAST);
292 rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
293 parameters_base, cs->as);
294 qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
295 rom_ptr_for_as(cs->as, parameters_base,
296 param_ptr - param_blob) +
297 (param_rng_seed - param_blob));
298 g_free(param_blob);
299 }
300 }
301
302 static void virt_machine_class_init(ObjectClass *oc, void *data)
303 {
304 MachineClass *mc = MACHINE_CLASS(oc);
305 mc->desc = "QEMU M68K Virtual Machine";
306 mc->init = virt_init;
307 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
308 mc->max_cpus = 1;
309 mc->no_floppy = 1;
310 mc->no_parallel = 1;
311 mc->default_ram_id = "m68k_virt.ram";
312 }
313
314 static const TypeInfo virt_machine_info = {
315 .name = MACHINE_TYPE_NAME("virt"),
316 .parent = TYPE_MACHINE,
317 .abstract = true,
318 .class_init = virt_machine_class_init,
319 };
320
321 static void virt_machine_register_types(void)
322 {
323 type_register_static(&virt_machine_info);
324 }
325
326 type_init(virt_machine_register_types)
327
328 #define DEFINE_VIRT_MACHINE(major, minor, latest) \
329 static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
330 void *data) \
331 { \
332 MachineClass *mc = MACHINE_CLASS(oc); \
333 virt_machine_##major##_##minor##_options(mc); \
334 mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \
335 if (latest) { \
336 mc->alias = "virt"; \
337 } \
338 } \
339 static const TypeInfo machvirt_##major##_##minor##_info = { \
340 .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \
341 .parent = MACHINE_TYPE_NAME("virt"), \
342 .class_init = virt_##major##_##minor##_class_init, \
343 }; \
344 static void machvirt_machine_##major##_##minor##_init(void) \
345 { \
346 type_register_static(&machvirt_##major##_##minor##_info); \
347 } \
348 type_init(machvirt_machine_##major##_##minor##_init);
349
350 static void virt_machine_8_1_options(MachineClass *mc)
351 {
352 }
353 DEFINE_VIRT_MACHINE(8, 1, true)
354
355 static void virt_machine_8_0_options(MachineClass *mc)
356 {
357 virt_machine_8_1_options(mc);
358 compat_props_add(mc->compat_props, hw_compat_8_0, hw_compat_8_0_len);
359 }
360 DEFINE_VIRT_MACHINE(8, 0, false)
361
362 static void virt_machine_7_2_options(MachineClass *mc)
363 {
364 virt_machine_8_0_options(mc);
365 compat_props_add(mc->compat_props, hw_compat_7_2, hw_compat_7_2_len);
366 }
367 DEFINE_VIRT_MACHINE(7, 2, false)
368
369 static void virt_machine_7_1_options(MachineClass *mc)
370 {
371 virt_machine_7_2_options(mc);
372 compat_props_add(mc->compat_props, hw_compat_7_1, hw_compat_7_1_len);
373 }
374 DEFINE_VIRT_MACHINE(7, 1, false)
375
376 static void virt_machine_7_0_options(MachineClass *mc)
377 {
378 virt_machine_7_1_options(mc);
379 compat_props_add(mc->compat_props, hw_compat_7_0, hw_compat_7_0_len);
380 }
381 DEFINE_VIRT_MACHINE(7, 0, false)
382
383 static void virt_machine_6_2_options(MachineClass *mc)
384 {
385 virt_machine_7_0_options(mc);
386 compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len);
387 }
388 DEFINE_VIRT_MACHINE(6, 2, false)
389
390 static void virt_machine_6_1_options(MachineClass *mc)
391 {
392 virt_machine_6_2_options(mc);
393 compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
394 }
395 DEFINE_VIRT_MACHINE(6, 1, false)
396
397 static void virt_machine_6_0_options(MachineClass *mc)
398 {
399 virt_machine_6_1_options(mc);
400 compat_props_add(mc->compat_props, hw_compat_6_0, hw_compat_6_0_len);
401 }
402 DEFINE_VIRT_MACHINE(6, 0, false)
armbru's QEMU hackery