hw/misc/macio/macio.c

   1 /*
   2  * PowerMac MacIO device emulation
   3  *
   4  * Copyright (c) 2005-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "qapi/error.h"
  28 #include "qemu/module.h"
  29 #include "hw/ppc/mac.h"
  30 #include "hw/misc/macio/cuda.h"
  31 #include "hw/pci/pci.h"
  32 #include "hw/ppc/mac_dbdma.h"
  33 #include "hw/qdev-properties.h"
  34 #include "migration/vmstate.h"
  35 #include "hw/char/escc.h"
  36 #include "hw/misc/macio/macio.h"
  37 #include "hw/intc/heathrow_pic.h"
  38 #include "sysemu/sysemu.h"
  39 #include "trace.h"
  40
  41 /* Note: this code is strongly inspirated from the corresponding code
  42  * in PearPC */
  43
  44 /*
  45  * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
  46  * while the other one is the normal, current ESCC interface.
  47  *
  48  * The magic below creates memory aliases to spawn the escc-legacy device
  49  * purely by rerouting the respective registers to our escc region. This
  50  * works because the only difference between the two memory regions is the
  51  * register layout, not their semantics.
  52  *
  53  * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
  54  */
  55 static void macio_escc_legacy_setup(MacIOState *s)
  56 {
  57     ESCCState *escc = ESCC(&s->escc);
  58     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
  59     MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
  60     MemoryRegion *bar = &s->bar;
  61     int i;
  62     static const int maps[] = {
  63         0x00, 0x00, /* Command B */
  64         0x02, 0x20, /* Command A */
  65         0x04, 0x10, /* Data B */
  66         0x06, 0x30, /* Data A */
  67         0x08, 0x40, /* Enhancement B */
  68         0x0A, 0x50, /* Enhancement A */
  69         0x80, 0x80, /* Recovery count */
  70         0x90, 0x90, /* Start A */
  71         0xa0, 0xa0, /* Start B */
  72         0xb0, 0xb0, /* Detect AB */
  73     };
  74
  75     memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
  76     for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
  77         MemoryRegion *port = g_new(MemoryRegion, 1);
  78         memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
  79                                  sysbus_mmio_get_region(sbd, 0),
  80                                  maps[i + 1], 0x2);
  81         memory_region_add_subregion(escc_legacy, maps[i], port);
  82     }
  83
  84     memory_region_add_subregion(bar, 0x12000, escc_legacy);
  85 }
  86
  87 static void macio_bar_setup(MacIOState *s)
  88 {
  89     ESCCState *escc = ESCC(&s->escc);
  90     SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
  91     MemoryRegion *bar = &s->bar;
  92
  93     memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
  94     macio_escc_legacy_setup(s);
  95 }
  96
  97 static void macio_common_realize(PCIDevice *d, Error **errp)
  98 {
  99     MacIOState *s = MACIO(d);
 100     SysBusDevice *sysbus_dev;
 101
 102     if (!qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), errp)) {
 103         return;
 104     }
 105     sysbus_dev = SYS_BUS_DEVICE(&s->dbdma);
 106     memory_region_add_subregion(&s->bar, 0x08000,
 107                                 sysbus_mmio_get_region(sysbus_dev, 0));
 108
 109     qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
 110     qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
 111     qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
 112     qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0));
 113     qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1));
 114     qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
 115     qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
 116     if (!qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), errp)) {
 117         return;
 118     }
 119
 120     macio_bar_setup(s);
 121     pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
 122 }
 123
 124 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
 125                               qemu_irq irq0, qemu_irq irq1, int dmaid,
 126                               Error **errp)
 127 {
 128     SysBusDevice *sysbus_dev;
 129
 130     sysbus_dev = SYS_BUS_DEVICE(ide);
 131     sysbus_connect_irq(sysbus_dev, 0, irq0);
 132     sysbus_connect_irq(sysbus_dev, 1, irq1);
 133     qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
 134     object_property_set_link(OBJECT(ide), "dbdma", OBJECT(&s->dbdma),
 135                              &error_abort);
 136     macio_ide_register_dma(ide);
 137
 138     qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp);
 139 }
 140
 141 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
 142 {
 143     MacIOState *s = MACIO(d);
 144     OldWorldMacIOState *os = OLDWORLD_MACIO(d);
 145     DeviceState *pic_dev = DEVICE(os->pic);
 146     Error *err = NULL;
 147     SysBusDevice *sysbus_dev;
 148
 149     macio_common_realize(d, &err);
 150     if (err) {
 151         error_propagate(errp, err);
 152         return;
 153     }
 154
 155     qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
 156                          s->frequency);
 157     if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) {
 158         return;
 159     }
 160     sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
 161     memory_region_add_subregion(&s->bar, 0x16000,
 162                                 sysbus_mmio_get_region(sysbus_dev, 0));
 163     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
 164                                                        OLDWORLD_CUDA_IRQ));
 165
 166     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
 167     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
 168                                                        OLDWORLD_ESCCB_IRQ));
 169     sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
 170                                                        OLDWORLD_ESCCA_IRQ));
 171
 172     if (!qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), errp)) {
 173         return;
 174     }
 175     sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
 176     memory_region_add_subregion(&s->bar, 0x60000,
 177                                 sysbus_mmio_get_region(sysbus_dev, 0));
 178     pmac_format_nvram_partition(&os->nvram, os->nvram.size);
 179
 180     /* Heathrow PIC */
 181     sysbus_dev = SYS_BUS_DEVICE(os->pic);
 182     memory_region_add_subregion(&s->bar, 0x0,
 183                                 sysbus_mmio_get_region(sysbus_dev, 0));
 184
 185     /* IDE buses */
 186     macio_realize_ide(s, &os->ide[0],
 187                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ),
 188                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ),
 189                       0x16, &err);
 190     if (err) {
 191         error_propagate(errp, err);
 192         return;
 193     }
 194
 195     macio_realize_ide(s, &os->ide[1],
 196                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ),
 197                       qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ),
 198                       0x1a, &err);
 199     if (err) {
 200         error_propagate(errp, err);
 201         return;
 202     }
 203 }
 204
 205 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index)
 206 {
 207     gchar *name = g_strdup_printf("ide[%i]", index);
 208     uint32_t addr = 0x1f000 + ((index + 1) * 0x1000);
 209
 210     object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE);
 211     qdev_prop_set_uint32(DEVICE(ide), "addr", addr);
 212     memory_region_add_subregion(&s->bar, addr, &ide->mem);
 213     g_free(name);
 214 }
 215
 216 static void macio_oldworld_init(Object *obj)
 217 {
 218     MacIOState *s = MACIO(obj);
 219     OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
 220     DeviceState *dev;
 221     int i;
 222
 223     object_property_add_link(obj, "pic", TYPE_HEATHROW,
 224                              (Object **) &os->pic,
 225                              qdev_prop_allow_set_link_before_realize,
 226                              0);
 227
 228     object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA);
 229
 230     object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVRAM);
 231     dev = DEVICE(&os->nvram);
 232     qdev_prop_set_uint32(dev, "size", 0x2000);
 233     qdev_prop_set_uint32(dev, "it_shift", 4);
 234
 235     for (i = 0; i < 2; i++) {
 236         macio_init_ide(s, &os->ide[i], i);
 237     }
 238 }
 239
 240 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
 241                        unsigned size)
 242 {
 243     trace_macio_timer_write(addr, size, value);
 244 }
 245
 246 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
 247 {
 248     uint32_t value = 0;
 249     uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 250     uint64_t kltime;
 251
 252     kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
 253     kltime = muldiv64(kltime, 18432000, 1048575);
 254
 255     switch (addr) {
 256     case 0x38:
 257         value = kltime;
 258         break;
 259     case 0x3c:
 260         value = kltime >> 32;
 261         break;
 262     }
 263
 264     trace_macio_timer_read(addr, size, value);
 265     return value;
 266 }
 267
 268 static const MemoryRegionOps timer_ops = {
 269     .read = timer_read,
 270     .write = timer_write,
 271     .endianness = DEVICE_LITTLE_ENDIAN,
 272 };
 273
 274 static void macio_newworld_realize(PCIDevice *d, Error **errp)
 275 {
 276     MacIOState *s = MACIO(d);
 277     NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
 278     DeviceState *pic_dev = DEVICE(ns->pic);
 279     Error *err = NULL;
 280     SysBusDevice *sysbus_dev;
 281     MemoryRegion *timer_memory = NULL;
 282
 283     macio_common_realize(d, &err);
 284     if (err) {
 285         error_propagate(errp, err);
 286         return;
 287     }
 288
 289     sysbus_dev = SYS_BUS_DEVICE(&s->escc);
 290     sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
 291                                                        NEWWORLD_ESCCB_IRQ));
 292     sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
 293                                                        NEWWORLD_ESCCA_IRQ));
 294
 295     /* OpenPIC */
 296     sysbus_dev = SYS_BUS_DEVICE(ns->pic);
 297     memory_region_add_subregion(&s->bar, 0x40000,
 298                                 sysbus_mmio_get_region(sysbus_dev, 0));
 299
 300     /* IDE buses */
 301     macio_realize_ide(s, &ns->ide[0],
 302                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
 303                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
 304                       0x16, &err);
 305     if (err) {
 306         error_propagate(errp, err);
 307         return;
 308     }
 309
 310     macio_realize_ide(s, &ns->ide[1],
 311                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
 312                       qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
 313                       0x1a, &err);
 314     if (err) {
 315         error_propagate(errp, err);
 316         return;
 317     }
 318
 319     /* Timer */
 320     timer_memory = g_new(MemoryRegion, 1);
 321     memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
 322                           0x1000);
 323     memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
 324
 325     if (ns->has_pmu) {
 326         /* GPIOs */
 327         sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
 328         object_property_set_link(OBJECT(&ns->gpio), "pic", OBJECT(pic_dev),
 329                                  &error_abort);
 330         memory_region_add_subregion(&s->bar, 0x50,
 331                                     sysbus_mmio_get_region(sysbus_dev, 0));
 332         if (!qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), errp)) {
 333             return;
 334         }
 335
 336         /* PMU */
 337         object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU);
 338         object_property_set_link(OBJECT(&s->pmu), "gpio", OBJECT(sysbus_dev),
 339                                  &error_abort);
 340         qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
 341         if (!qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), errp)) {
 342             return;
 343         }
 344         sysbus_dev = SYS_BUS_DEVICE(&s->pmu);
 345         sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
 346                                                            NEWWORLD_PMU_IRQ));
 347         memory_region_add_subregion(&s->bar, 0x16000,
 348                                     sysbus_mmio_get_region(sysbus_dev, 0));
 349     } else {
 350         object_unparent(OBJECT(&ns->gpio));
 351
 352         /* CUDA */
 353         object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA);
 354         qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
 355                              s->frequency);
 356
 357         if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) {
 358             return;
 359         }
 360         sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
 361         sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
 362                                                            NEWWORLD_CUDA_IRQ));
 363         memory_region_add_subregion(&s->bar, 0x16000,
 364                                     sysbus_mmio_get_region(sysbus_dev, 0));
 365     }
 366 }
 367
 368 static void macio_newworld_init(Object *obj)
 369 {
 370     MacIOState *s = MACIO(obj);
 371     NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
 372     int i;
 373
 374     object_property_add_link(obj, "pic", TYPE_OPENPIC,
 375                              (Object **) &ns->pic,
 376                              qdev_prop_allow_set_link_before_realize,
 377                              0);
 378
 379     object_initialize_child(OBJECT(s), "gpio", &ns->gpio, TYPE_MACIO_GPIO);
 380
 381     for (i = 0; i < 2; i++) {
 382         macio_init_ide(s, &ns->ide[i], i);
 383     }
 384 }
 385
 386 static void macio_instance_init(Object *obj)
 387 {
 388     MacIOState *s = MACIO(obj);
 389
 390     memory_region_init(&s->bar, obj, "macio", 0x80000);
 391
 392     qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS,
 393                         DEVICE(obj), "macio.0");
 394
 395     object_initialize_child(OBJECT(s), "dbdma", &s->dbdma, TYPE_MAC_DBDMA);
 396
 397     object_initialize_child(OBJECT(s), "escc", &s->escc, TYPE_ESCC);
 398 }
 399
 400 static const VMStateDescription vmstate_macio_oldworld = {
 401     .name = "macio-oldworld",
 402     .version_id = 0,
 403     .minimum_version_id = 0,
 404     .fields = (VMStateField[]) {
 405         VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
 406         VMSTATE_END_OF_LIST()
 407     }
 408 };
 409
 410 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
 411 {
 412     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
 413     DeviceClass *dc = DEVICE_CLASS(oc);
 414
 415     pdc->realize = macio_oldworld_realize;
 416     pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
 417     dc->vmsd = &vmstate_macio_oldworld;
 418 }
 419
 420 static const VMStateDescription vmstate_macio_newworld = {
 421     .name = "macio-newworld",
 422     .version_id = 0,
 423     .minimum_version_id = 0,
 424     .fields = (VMStateField[]) {
 425         VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
 426         VMSTATE_END_OF_LIST()
 427     }
 428 };
 429
 430 static Property macio_newworld_properties[] = {
 431     DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
 432     DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
 433     DEFINE_PROP_END_OF_LIST()
 434 };
 435
 436 static void macio_newworld_class_init(ObjectClass *oc, void *data)
 437 {
 438     PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
 439     DeviceClass *dc = DEVICE_CLASS(oc);
 440
 441     pdc->realize = macio_newworld_realize;
 442     pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
 443     dc->vmsd = &vmstate_macio_newworld;
 444     device_class_set_props(dc, macio_newworld_properties);
 445 }
 446
 447 static Property macio_properties[] = {
 448     DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
 449     DEFINE_PROP_END_OF_LIST()
 450 };
 451
 452 static void macio_class_init(ObjectClass *klass, void *data)
 453 {
 454     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 455     DeviceClass *dc = DEVICE_CLASS(klass);
 456
 457     k->vendor_id = PCI_VENDOR_ID_APPLE;
 458     k->class_id = PCI_CLASS_OTHERS << 8;
 459     device_class_set_props(dc, macio_properties);
 460     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 461     /* Reason: Uses serial_hds in macio_instance_init */
 462     dc->user_creatable = false;
 463 }
 464
 465 static const TypeInfo macio_bus_info = {
 466     .name = TYPE_MACIO_BUS,
 467     .parent = TYPE_SYSTEM_BUS,
 468     .instance_size = sizeof(MacIOBusState),
 469 };
 470
 471 static const TypeInfo macio_oldworld_type_info = {
 472     .name          = TYPE_OLDWORLD_MACIO,
 473     .parent        = TYPE_MACIO,
 474     .instance_size = sizeof(OldWorldMacIOState),
 475     .instance_init = macio_oldworld_init,
 476     .class_init    = macio_oldworld_class_init,
 477 };
 478
 479 static const TypeInfo macio_newworld_type_info = {
 480     .name          = TYPE_NEWWORLD_MACIO,
 481     .parent        = TYPE_MACIO,
 482     .instance_size = sizeof(NewWorldMacIOState),
 483     .instance_init = macio_newworld_init,
 484     .class_init    = macio_newworld_class_init,
 485 };
 486
 487 static const TypeInfo macio_type_info = {
 488     .name          = TYPE_MACIO,
 489     .parent        = TYPE_PCI_DEVICE,
 490     .instance_size = sizeof(MacIOState),
 491     .instance_init = macio_instance_init,
 492     .abstract      = true,
 493     .class_init    = macio_class_init,
 494     .interfaces = (InterfaceInfo[]) {
 495         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
 496         { },
 497     },
 498 };
 499
 500 static void macio_register_types(void)
 501 {
 502     type_register_static(&macio_bus_info);
 503     type_register_static(&macio_type_info);
 504     type_register_static(&macio_oldworld_type_info);
 505     type_register_static(&macio_newworld_type_info);
 506 }
 507
 508 type_init(macio_register_types)