4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 * Generate inline load/store functions for all MMU modes (typically
21 * at least _user and _kernel) as well as _data versions, for all data
24 * Used by target op helpers.
26 * The syntax for the accessors is:
28 * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
30 * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)
33 * (empty): for 32 and 64 bit sizes
43 * mmusuffix is one of the generic suffixes "data" or "code", or
44 * (for softmmu configs) a target-specific MMU mode suffix as defined
50 #if defined(CONFIG_USER_ONLY)
51 /* sparc32plus has 64bit long but 32bit space address
52 * this can make bad result with g2h() and h2g()
54 #if TARGET_VIRT_ADDR_SPACE_BITS <= 32
55 typedef uint32_t abi_ptr
;
56 #define TARGET_ABI_FMT_ptr "%x"
58 typedef uint64_t abi_ptr
;
59 #define TARGET_ABI_FMT_ptr "%"PRIx64
62 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */
63 #define g2h(x) ((void *)((unsigned long)(abi_ptr)(x) + guest_base))
65 #define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX)
66 #define h2g_valid(x) guest_addr_valid((unsigned long)(x) - guest_base)
68 static inline int guest_range_valid(unsigned long start
, unsigned long len
)
70 return len
- 1 <= GUEST_ADDR_MAX
&& start
<= GUEST_ADDR_MAX
- len
+ 1;
73 #define h2g_nocheck(x) ({ \
74 unsigned long __ret = (unsigned long)(x) - guest_base; \
79 /* Check if given address fits target address space */ \
80 assert(h2g_valid(x)); \
84 typedef target_ulong abi_ptr
;
85 #define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx
88 #if defined(CONFIG_USER_ONLY)
90 extern __thread
uintptr_t helper_retaddr
;
92 /* In user-only mode we provide only the _code and _data accessors. */
94 #define MEMSUFFIX _data
96 #include "exec/cpu_ldst_useronly_template.h"
99 #include "exec/cpu_ldst_useronly_template.h"
102 #include "exec/cpu_ldst_useronly_template.h"
105 #include "exec/cpu_ldst_useronly_template.h"
108 #define MEMSUFFIX _code
111 #include "exec/cpu_ldst_useronly_template.h"
114 #include "exec/cpu_ldst_useronly_template.h"
117 #include "exec/cpu_ldst_useronly_template.h"
120 #include "exec/cpu_ldst_useronly_template.h"
126 /* The memory helpers for tcg-generated code need tcg_target_long etc. */
129 #ifdef MMU_MODE0_SUFFIX
130 #define CPU_MMU_INDEX 0
131 #define MEMSUFFIX MMU_MODE0_SUFFIX
133 #include "exec/cpu_ldst_template.h"
136 #include "exec/cpu_ldst_template.h"
139 #include "exec/cpu_ldst_template.h"
142 #include "exec/cpu_ldst_template.h"
147 #if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX)
148 #define CPU_MMU_INDEX 1
149 #define MEMSUFFIX MMU_MODE1_SUFFIX
151 #include "exec/cpu_ldst_template.h"
154 #include "exec/cpu_ldst_template.h"
157 #include "exec/cpu_ldst_template.h"
160 #include "exec/cpu_ldst_template.h"
165 #if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX)
167 #define CPU_MMU_INDEX 2
168 #define MEMSUFFIX MMU_MODE2_SUFFIX
170 #include "exec/cpu_ldst_template.h"
173 #include "exec/cpu_ldst_template.h"
176 #include "exec/cpu_ldst_template.h"
179 #include "exec/cpu_ldst_template.h"
182 #endif /* (NB_MMU_MODES >= 3) */
184 #if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX)
186 #define CPU_MMU_INDEX 3
187 #define MEMSUFFIX MMU_MODE3_SUFFIX
189 #include "exec/cpu_ldst_template.h"
192 #include "exec/cpu_ldst_template.h"
195 #include "exec/cpu_ldst_template.h"
198 #include "exec/cpu_ldst_template.h"
201 #endif /* (NB_MMU_MODES >= 4) */
203 #if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX)
205 #define CPU_MMU_INDEX 4
206 #define MEMSUFFIX MMU_MODE4_SUFFIX
208 #include "exec/cpu_ldst_template.h"
211 #include "exec/cpu_ldst_template.h"
214 #include "exec/cpu_ldst_template.h"
217 #include "exec/cpu_ldst_template.h"
220 #endif /* (NB_MMU_MODES >= 5) */
222 #if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX)
224 #define CPU_MMU_INDEX 5
225 #define MEMSUFFIX MMU_MODE5_SUFFIX
227 #include "exec/cpu_ldst_template.h"
230 #include "exec/cpu_ldst_template.h"
233 #include "exec/cpu_ldst_template.h"
236 #include "exec/cpu_ldst_template.h"
239 #endif /* (NB_MMU_MODES >= 6) */
241 #if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX)
243 #define CPU_MMU_INDEX 6
244 #define MEMSUFFIX MMU_MODE6_SUFFIX
246 #include "exec/cpu_ldst_template.h"
249 #include "exec/cpu_ldst_template.h"
252 #include "exec/cpu_ldst_template.h"
255 #include "exec/cpu_ldst_template.h"
258 #endif /* (NB_MMU_MODES >= 7) */
260 #if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX)
262 #define CPU_MMU_INDEX 7
263 #define MEMSUFFIX MMU_MODE7_SUFFIX
265 #include "exec/cpu_ldst_template.h"
268 #include "exec/cpu_ldst_template.h"
271 #include "exec/cpu_ldst_template.h"
274 #include "exec/cpu_ldst_template.h"
277 #endif /* (NB_MMU_MODES >= 8) */
279 #if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX)
281 #define CPU_MMU_INDEX 8
282 #define MEMSUFFIX MMU_MODE8_SUFFIX
284 #include "exec/cpu_ldst_template.h"
287 #include "exec/cpu_ldst_template.h"
290 #include "exec/cpu_ldst_template.h"
293 #include "exec/cpu_ldst_template.h"
296 #endif /* (NB_MMU_MODES >= 9) */
298 #if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX)
300 #define CPU_MMU_INDEX 9
301 #define MEMSUFFIX MMU_MODE9_SUFFIX
303 #include "exec/cpu_ldst_template.h"
306 #include "exec/cpu_ldst_template.h"
309 #include "exec/cpu_ldst_template.h"
312 #include "exec/cpu_ldst_template.h"
315 #endif /* (NB_MMU_MODES >= 10) */
317 #if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX)
319 #define CPU_MMU_INDEX 10
320 #define MEMSUFFIX MMU_MODE10_SUFFIX
322 #include "exec/cpu_ldst_template.h"
325 #include "exec/cpu_ldst_template.h"
328 #include "exec/cpu_ldst_template.h"
331 #include "exec/cpu_ldst_template.h"
334 #endif /* (NB_MMU_MODES >= 11) */
336 #if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX)
338 #define CPU_MMU_INDEX 11
339 #define MEMSUFFIX MMU_MODE11_SUFFIX
341 #include "exec/cpu_ldst_template.h"
344 #include "exec/cpu_ldst_template.h"
347 #include "exec/cpu_ldst_template.h"
350 #include "exec/cpu_ldst_template.h"
353 #endif /* (NB_MMU_MODES >= 12) */
355 #if (NB_MMU_MODES > 12)
356 #error "NB_MMU_MODES > 12 is not supported for now"
357 #endif /* (NB_MMU_MODES > 12) */
359 /* these access are slower, they must be as rare as possible */
360 #define CPU_MMU_INDEX (cpu_mmu_index(env, false))
361 #define MEMSUFFIX _data
363 #include "exec/cpu_ldst_template.h"
366 #include "exec/cpu_ldst_template.h"
369 #include "exec/cpu_ldst_template.h"
372 #include "exec/cpu_ldst_template.h"
376 #define CPU_MMU_INDEX (cpu_mmu_index(env, true))
377 #define MEMSUFFIX _code
378 #define SOFTMMU_CODE_ACCESS
381 #include "exec/cpu_ldst_template.h"
384 #include "exec/cpu_ldst_template.h"
387 #include "exec/cpu_ldst_template.h"
390 #include "exec/cpu_ldst_template.h"
394 #undef SOFTMMU_CODE_ACCESS
396 #endif /* defined(CONFIG_USER_ONLY) */
401 * @addr: guest virtual address to look up
402 * @access_type: 0 for read, 1 for write, 2 for execute
403 * @mmu_idx: MMU index to use for lookup
405 * Look up the specified guest virtual index in the TCG softmmu TLB.
406 * If the TLB contains a host virtual address suitable for direct RAM
407 * access, then return it. Otherwise (TLB miss, TLB entry is for an
408 * I/O access, etc) return NULL.
410 * This is the equivalent of the initial fast-path code used by
411 * TCG backends for guest load and store accesses.
413 static inline void *tlb_vaddr_to_host(CPUArchState
*env
, abi_ptr addr
,
414 int access_type
, int mmu_idx
)
416 #if defined(CONFIG_USER_ONLY)
419 int index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
420 CPUTLBEntry
*tlbentry
= &env
->tlb_table
[mmu_idx
][index
];
424 switch (access_type
) {
426 tlb_addr
= tlbentry
->addr_read
;
429 tlb_addr
= tlbentry
->addr_write
;
432 tlb_addr
= tlbentry
->addr_code
;
435 g_assert_not_reached();
438 if (!tlb_hit(tlb_addr
, addr
)) {
439 /* TLB entry is for a different page */
443 if (tlb_addr
& ~TARGET_PAGE_MASK
) {
448 haddr
= addr
+ env
->tlb_table
[mmu_idx
][index
].addend
;
449 return (void *)haddr
;
450 #endif /* defined(CONFIG_USER_ONLY) */
453 #endif /* CPU_LDST_H */