Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / hw / acpi / hmat.c
blob9b1662b6b8a1e4fdf888f4843aa2b2e69773f3a8
1 /*
2 * HMAT ACPI Implementation
4 * Copyright(C) 2019 Intel Corporation.
6 * Author:
7 * Liu jingqi <jingqi.liu@linux.intel.com>
8 * Tao Xu <tao3.xu@intel.com>
10 * HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table
11 * (HMAT)
13 * This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU Lesser General Public
15 * License as published by the Free Software Foundation; either
16 * version 2.1 of the License, or (at your option) any later version.
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 * Lesser General Public License for more details.
23 * You should have received a copy of the GNU Lesser General Public
24 * License along with this library; if not, see <http://www.gnu.org/licenses/>
27 #include "qemu/osdep.h"
28 #include "qemu/units.h"
29 #include "sysemu/numa.h"
30 #include "hw/acpi/aml-build.h"
31 #include "hw/acpi/hmat.h"
34 * ACPI 6.3:
35 * 5.2.27.3 Memory Proximity Domain Attributes Structure: Table 5-145
37 static void build_hmat_mpda(GArray *table_data, uint16_t flags,
38 uint32_t initiator, uint32_t mem_node)
41 /* Memory Proximity Domain Attributes Structure */
42 /* Type */
43 build_append_int_noprefix(table_data, 0, 2);
44 /* Reserved */
45 build_append_int_noprefix(table_data, 0, 2);
46 /* Length */
47 build_append_int_noprefix(table_data, 40, 4);
48 /* Flags */
49 build_append_int_noprefix(table_data, flags, 2);
50 /* Reserved */
51 build_append_int_noprefix(table_data, 0, 2);
52 /* Proximity Domain for the Attached Initiator */
53 build_append_int_noprefix(table_data, initiator, 4);
54 /* Proximity Domain for the Memory */
55 build_append_int_noprefix(table_data, mem_node, 4);
56 /* Reserved */
57 build_append_int_noprefix(table_data, 0, 4);
59 * Reserved:
60 * Previously defined as the Start Address of the System Physical
61 * Address Range. Deprecated since ACPI Spec 6.3.
63 build_append_int_noprefix(table_data, 0, 8);
65 * Reserved:
66 * Previously defined as the Range Length of the region in bytes.
67 * Deprecated since ACPI Spec 6.3.
69 build_append_int_noprefix(table_data, 0, 8);
73 * ACPI 6.3: 5.2.27.4 System Locality Latency and Bandwidth Information
74 * Structure: Table 5-146
76 static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb,
77 uint32_t num_initiator, uint32_t num_target,
78 uint32_t *initiator_list)
80 int i, index;
81 uint32_t initiator_to_index[MAX_NODES] = {};
82 HMAT_LB_Data *lb_data;
83 uint16_t *entry_list;
84 uint32_t base;
85 /* Length in bytes for entire structure */
86 uint32_t lb_length
87 = 32 /* Table length up to and including Entry Base Unit */
88 + 4 * num_initiator /* Initiator Proximity Domain List */
89 + 4 * num_target /* Target Proximity Domain List */
90 + 2 * num_initiator * num_target; /* Latency or Bandwidth Entries */
92 /* Type */
93 build_append_int_noprefix(table_data, 1, 2);
94 /* Reserved */
95 build_append_int_noprefix(table_data, 0, 2);
96 /* Length */
97 build_append_int_noprefix(table_data, lb_length, 4);
98 /* Flags: Bits [3:0] Memory Hierarchy, Bits[7:4] Reserved */
99 assert(!(hmat_lb->hierarchy >> 4));
100 build_append_int_noprefix(table_data, hmat_lb->hierarchy, 1);
101 /* Data Type */
102 build_append_int_noprefix(table_data, hmat_lb->data_type, 1);
103 /* Reserved */
104 build_append_int_noprefix(table_data, 0, 2);
105 /* Number of Initiator Proximity Domains (s) */
106 build_append_int_noprefix(table_data, num_initiator, 4);
107 /* Number of Target Proximity Domains (t) */
108 build_append_int_noprefix(table_data, num_target, 4);
109 /* Reserved */
110 build_append_int_noprefix(table_data, 0, 4);
112 /* Entry Base Unit */
113 if (hmat_lb->data_type <= HMAT_LB_DATA_WRITE_LATENCY) {
114 /* Convert latency base from nanoseconds to picosecond */
115 base = hmat_lb->base * 1000;
116 } else {
117 /* Convert bandwidth base from Byte to Megabyte */
118 base = hmat_lb->base / MiB;
120 build_append_int_noprefix(table_data, base, 8);
122 /* Initiator Proximity Domain List */
123 for (i = 0; i < num_initiator; i++) {
124 build_append_int_noprefix(table_data, initiator_list[i], 4);
125 /* Reverse mapping for array possitions */
126 initiator_to_index[initiator_list[i]] = i;
129 /* Target Proximity Domain List */
130 for (i = 0; i < num_target; i++) {
131 build_append_int_noprefix(table_data, i, 4);
134 /* Latency or Bandwidth Entries */
135 entry_list = g_new0(uint16_t, num_initiator * num_target);
136 for (i = 0; i < hmat_lb->list->len; i++) {
137 lb_data = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
138 index = initiator_to_index[lb_data->initiator] * num_target +
139 lb_data->target;
141 entry_list[index] = (uint16_t)(lb_data->data / hmat_lb->base);
144 for (i = 0; i < num_initiator * num_target; i++) {
145 build_append_int_noprefix(table_data, entry_list[i], 2);
148 g_free(entry_list);
151 /* ACPI 6.3: 5.2.27.5 Memory Side Cache Information Structure: Table 5-147 */
152 static void build_hmat_cache(GArray *table_data, uint8_t total_levels,
153 NumaHmatCacheOptions *hmat_cache)
156 * Cache Attributes: Bits [3:0] – Total Cache Levels
157 * for this Memory Proximity Domain
159 uint32_t cache_attr = total_levels;
161 /* Bits [7:4] : Cache Level described in this structure */
162 cache_attr |= (uint32_t) hmat_cache->level << 4;
164 /* Bits [11:8] - Cache Associativity */
165 cache_attr |= (uint32_t) hmat_cache->associativity << 8;
167 /* Bits [15:12] - Write Policy */
168 cache_attr |= (uint32_t) hmat_cache->policy << 12;
170 /* Bits [31:16] - Cache Line size in bytes */
171 cache_attr |= (uint32_t) hmat_cache->line << 16;
173 /* Type */
174 build_append_int_noprefix(table_data, 2, 2);
175 /* Reserved */
176 build_append_int_noprefix(table_data, 0, 2);
177 /* Length */
178 build_append_int_noprefix(table_data, 32, 4);
179 /* Proximity Domain for the Memory */
180 build_append_int_noprefix(table_data, hmat_cache->node_id, 4);
181 /* Reserved */
182 build_append_int_noprefix(table_data, 0, 4);
183 /* Memory Side Cache Size */
184 build_append_int_noprefix(table_data, hmat_cache->size, 8);
185 /* Cache Attributes */
186 build_append_int_noprefix(table_data, cache_attr, 4);
187 /* Reserved */
188 build_append_int_noprefix(table_data, 0, 2);
190 * Number of SMBIOS handles (n)
191 * Linux kernel uses Memory Side Cache Information Structure
192 * without SMBIOS entries for now, so set Number of SMBIOS handles
193 * as 0.
195 build_append_int_noprefix(table_data, 0, 2);
198 /* Build HMAT sub table structures */
199 static void hmat_build_table_structs(GArray *table_data, NumaState *numa_state)
201 uint16_t flags;
202 uint32_t num_initiator = 0;
203 uint32_t initiator_list[MAX_NODES];
204 int i, hierarchy, type, cache_level, total_levels;
205 HMAT_LB_Info *hmat_lb;
206 NumaHmatCacheOptions *hmat_cache;
208 build_append_int_noprefix(table_data, 0, 4); /* Reserved */
210 for (i = 0; i < numa_state->num_nodes; i++) {
212 * Linux rejects whole HMAT table if a node with no memory
213 * has one of these structures listing it as a target.
215 if (!numa_state->nodes[i].node_mem) {
216 continue;
218 flags = 0;
220 if (numa_state->nodes[i].initiator < MAX_NODES) {
221 flags |= HMAT_PROXIMITY_INITIATOR_VALID;
224 build_hmat_mpda(table_data, flags, numa_state->nodes[i].initiator, i);
227 for (i = 0; i < numa_state->num_nodes; i++) {
228 if (numa_state->nodes[i].has_cpu || numa_state->nodes[i].has_gi) {
229 initiator_list[num_initiator++] = i;
234 * ACPI 6.3: 5.2.27.4 System Locality Latency and Bandwidth Information
235 * Structure: Table 5-146
237 for (hierarchy = HMAT_LB_MEM_MEMORY;
238 hierarchy <= HMAT_LB_MEM_CACHE_3RD_LEVEL; hierarchy++) {
239 for (type = HMAT_LB_DATA_ACCESS_LATENCY;
240 type <= HMAT_LB_DATA_WRITE_BANDWIDTH; type++) {
241 hmat_lb = numa_state->hmat_lb[hierarchy][type];
243 if (hmat_lb && hmat_lb->list->len) {
244 build_hmat_lb(table_data, hmat_lb, num_initiator,
245 numa_state->num_nodes, initiator_list);
251 * ACPI 6.3: 5.2.27.5 Memory Side Cache Information Structure:
252 * Table 5-147
254 for (i = 0; i < numa_state->num_nodes; i++) {
255 total_levels = 0;
256 for (cache_level = 1; cache_level < HMAT_LB_LEVELS; cache_level++) {
257 if (numa_state->hmat_cache[i][cache_level]) {
258 total_levels++;
261 for (cache_level = 0; cache_level <= total_levels; cache_level++) {
262 hmat_cache = numa_state->hmat_cache[i][cache_level];
263 if (hmat_cache) {
264 build_hmat_cache(table_data, total_levels, hmat_cache);
270 void build_hmat(GArray *table_data, BIOSLinker *linker, NumaState *numa_state,
271 const char *oem_id, const char *oem_table_id)
273 AcpiTable table = { .sig = "HMAT", .rev = 2,
274 .oem_id = oem_id, .oem_table_id = oem_table_id };
276 acpi_table_begin(&table, table_data);
277 hmat_build_table_structs(table_data, numa_state);
278 acpi_table_end(linker, &table);