hw/arm/bcm2835_peripherals.c

   1 /*
   2  * Raspberry Pi emulation (c) 2012 Gregory Estrade
   3  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
   4  *
   5  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
   6  * Written by Andrew Baumann
   7  *
   8  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   9  * See the COPYING file in the top-level directory.
  10  */
  11
  12 #include "qemu/osdep.h"
  13 #include "qapi/error.h"
  14 #include "qemu/module.h"
  15 #include "hw/arm/bcm2835_peripherals.h"
  16 #include "hw/misc/bcm2835_mbox_defs.h"
  17 #include "hw/arm/raspi_platform.h"
  18 #include "sysemu/sysemu.h"
  19
  20 /* Peripheral base address on the VC (GPU) system bus */
  21 #define BCM2835_VC_PERI_BASE 0x7e000000
  22
  23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
  24 #define BCM2835_SDHC_CAPAREG 0x52134b4
  25
  26 /*
  27  * According to Linux driver & DTS, dma channels 0--10 have separate IRQ,
  28  * while channels 11--14 share one IRQ:
  29  */
  30 #define SEPARATE_DMA_IRQ_MAX 10
  31 #define ORGATED_DMA_IRQ_COUNT 4
  32
  33 /* All three I2C controllers share the same IRQ */
  34 #define ORGATED_I2C_IRQ_COUNT 3
  35
  36 void create_unimp(BCMSocPeripheralBaseState *ps,
  37                   UnimplementedDeviceState *uds,
  38                   const char *name, hwaddr ofs, hwaddr size)
  39 {
  40     object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
  41     qdev_prop_set_string(DEVICE(uds), "name", name);
  42     qdev_prop_set_uint64(DEVICE(uds), "size", size);
  43     sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
  44     memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
  45                     sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
  46 }
  47
  48 static void bcm2835_peripherals_init(Object *obj)
  49 {
  50     BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
  51     BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(obj);
  52
  53     /* Random Number Generator */
  54     object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
  55
  56     /* Thermal */
  57     object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
  58
  59     /* GPIO */
  60     object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
  61
  62     object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
  63                                    OBJECT(&s_base->sdhci.sdbus));
  64     object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
  65                                    OBJECT(&s_base->sdhost.sdbus));
  66
  67     /* Gated DMA interrupts */
  68     object_initialize_child(obj, "orgated-dma-irq",
  69                             &s_base->orgated_dma_irq, TYPE_OR_IRQ);
  70     object_property_set_int(OBJECT(&s_base->orgated_dma_irq), "num-lines",
  71                             ORGATED_DMA_IRQ_COUNT, &error_abort);
  72 }
  73
  74 static void raspi_peripherals_base_init(Object *obj)
  75 {
  76     BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(obj);
  77     BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_GET_CLASS(obj);
  78
  79     /* Memory region for peripheral devices, which we export to our parent */
  80     memory_region_init(&s->peri_mr, obj, "bcm2835-peripherals", bc->peri_size);
  81     sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
  82
  83     /* Internal memory region for peripheral bus addresses (not exported) */
  84     memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
  85
  86     /* Internal memory region for request/response communication with
  87      * mailbox-addressable peripherals (not exported)
  88      */
  89     memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
  90                        MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
  91
  92     /* Interrupt Controller */
  93     object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
  94
  95     /* SYS Timer */
  96     object_initialize_child(obj, "systimer", &s->systmr,
  97                             TYPE_BCM2835_SYSTIMER);
  98
  99     /* UART0 */
 100     object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
 101
 102     /* AUX / UART1 */
 103     object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
 104
 105     /* Mailboxes */
 106     object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
 107
 108     object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
 109                                    OBJECT(&s->mbox_mr));
 110
 111     /* Framebuffer */
 112     object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
 113     object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
 114     object_property_add_alias(obj, "vcram-base", OBJECT(&s->fb), "vcram-base");
 115
 116     object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
 117                                    OBJECT(&s->gpu_bus_mr));
 118
 119     /* OTP */
 120     object_initialize_child(obj, "bcm2835-otp", &s->otp,
 121                             TYPE_BCM2835_OTP);
 122
 123     /* Property channel */
 124     object_initialize_child(obj, "property", &s->property,
 125                             TYPE_BCM2835_PROPERTY);
 126     object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
 127                               "board-rev");
 128     object_property_add_alias(obj, "command-line", OBJECT(&s->property),
 129                               "command-line");
 130
 131     object_property_add_const_link(OBJECT(&s->property), "fb",
 132                                    OBJECT(&s->fb));
 133     object_property_add_const_link(OBJECT(&s->property), "dma-mr",
 134                                    OBJECT(&s->gpu_bus_mr));
 135     object_property_add_const_link(OBJECT(&s->property), "otp",
 136                                    OBJECT(&s->otp));
 137
 138     /* Extended Mass Media Controller */
 139     object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
 140
 141     /* SDHOST */
 142     object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
 143
 144     /* DMA Channels */
 145     object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
 146
 147     object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
 148                                    OBJECT(&s->gpu_bus_mr));
 149
 150     /* Mphi */
 151     object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
 152
 153     /* DWC2 */
 154     object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
 155
 156     /* CPRMAN clock manager */
 157     object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
 158
 159     object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
 160                                    OBJECT(&s->gpu_bus_mr));
 161
 162     /* Power Management */
 163     object_initialize_child(obj, "powermgt", &s->powermgt,
 164                             TYPE_BCM2835_POWERMGT);
 165
 166     /* SPI */
 167     object_initialize_child(obj, "bcm2835-spi0", &s->spi[0],
 168                             TYPE_BCM2835_SPI);
 169
 170     /* I2C */
 171     object_initialize_child(obj, "bcm2835-i2c0", &s->i2c[0],
 172                             TYPE_BCM2835_I2C);
 173     object_initialize_child(obj, "bcm2835-i2c1", &s->i2c[1],
 174                             TYPE_BCM2835_I2C);
 175     object_initialize_child(obj, "bcm2835-i2c2", &s->i2c[2],
 176                             TYPE_BCM2835_I2C);
 177
 178     object_initialize_child(obj, "orgated-i2c-irq",
 179                             &s->orgated_i2c_irq, TYPE_OR_IRQ);
 180     object_property_set_int(OBJECT(&s->orgated_i2c_irq), "num-lines",
 181                             ORGATED_I2C_IRQ_COUNT, &error_abort);
 182 }
 183
 184 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
 185 {
 186     MemoryRegion *mphi_mr;
 187     BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
 188     BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev);
 189     int n;
 190
 191     bcm_soc_peripherals_common_realize(dev, errp);
 192
 193     /* Extended Mass Media Controller */
 194     sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->sdhci), 0,
 195         qdev_get_gpio_in_named(DEVICE(&s_base->ic), BCM2835_IC_GPU_IRQ,
 196                                INTERRUPT_ARASANSDIO));
 197
 198      /* Connect DMA 0-12 to the interrupt controller */
 199     for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) {
 200         sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n,
 201                            qdev_get_gpio_in_named(DEVICE(&s_base->ic),
 202                                                   BCM2835_IC_GPU_IRQ,
 203                                                   INTERRUPT_DMA0 + n));
 204     }
 205
 206     if (!qdev_realize(DEVICE(&s_base->orgated_dma_irq), NULL, errp)) {
 207         return;
 208     }
 209     for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) {
 210         sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma),
 211                            SEPARATE_DMA_IRQ_MAX + 1 + n,
 212                            qdev_get_gpio_in(DEVICE(&s_base->orgated_dma_irq), n));
 213     }
 214     qdev_connect_gpio_out(DEVICE(&s_base->orgated_dma_irq), 0,
 215                           qdev_get_gpio_in_named(DEVICE(&s_base->ic),
 216                               BCM2835_IC_GPU_IRQ,
 217                               INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1));
 218
 219     /* Random Number Generator */
 220     if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
 221         return;
 222     }
 223     memory_region_add_subregion(
 224         &s_base->peri_mr, RNG_OFFSET,
 225         sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
 226
 227     /* THERMAL */
 228     if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
 229         return;
 230     }
 231     memory_region_add_subregion(&s_base->peri_mr, THERMAL_OFFSET,
 232                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
 233
 234     /* Map MPHI to the peripherals memory map */
 235     mphi_mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s_base->mphi), 0);
 236     memory_region_add_subregion(&s_base->peri_mr, MPHI_OFFSET, mphi_mr);
 237
 238     /* GPIO */
 239     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
 240         return;
 241     }
 242     memory_region_add_subregion(
 243         &s_base->peri_mr, GPIO_OFFSET,
 244         sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
 245
 246     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
 247 }
 248
 249 void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp)
 250 {
 251     BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(dev);
 252     Object *obj;
 253     MemoryRegion *ram;
 254     Error *err = NULL;
 255     uint64_t ram_size, vcram_size, vcram_base;
 256     int n;
 257
 258     obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
 259
 260     ram = MEMORY_REGION(obj);
 261     ram_size = memory_region_size(ram);
 262
 263     /* Map peripherals and RAM into the GPU address space. */
 264     memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
 265                              "bcm2835-peripherals", &s->peri_mr, 0,
 266                              memory_region_size(&s->peri_mr));
 267
 268     memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
 269                                         &s->peri_mr_alias, 1);
 270
 271     /* RAM is aliased four times (different cache configurations) on the GPU */
 272     for (n = 0; n < 4; n++) {
 273         memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
 274                                  "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
 275         memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
 276                                             &s->ram_alias[n], 0);
 277     }
 278
 279     /* Interrupt Controller */
 280     if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
 281         return;
 282     }
 283
 284     /* CPRMAN clock manager */
 285     if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
 286         return;
 287     }
 288     memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
 289                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
 290     qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
 291                           qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
 292
 293     memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
 294                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
 295     sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
 296
 297     /* Sys Timer */
 298     if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
 299         return;
 300     }
 301     memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
 302                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
 303     sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
 304         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 305                                INTERRUPT_TIMER0));
 306     sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
 307         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 308                                INTERRUPT_TIMER1));
 309     sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
 310         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 311                                INTERRUPT_TIMER2));
 312     sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
 313         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 314                                INTERRUPT_TIMER3));
 315
 316     /* UART0 */
 317     qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
 318     if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
 319         return;
 320     }
 321
 322     memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
 323                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
 324     sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
 325         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 326                                INTERRUPT_UART0));
 327
 328     /* AUX / UART1 */
 329     qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
 330
 331     if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
 332         return;
 333     }
 334
 335     memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
 336                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
 337     sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
 338         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 339                                INTERRUPT_AUX));
 340
 341     /* Mailboxes */
 342     if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
 343         return;
 344     }
 345
 346     memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
 347                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
 348     sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
 349         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
 350                                INTERRUPT_ARM_MAILBOX));
 351
 352     /* Framebuffer */
 353     vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
 354     if (err) {
 355         error_propagate(errp, err);
 356         return;
 357     }
 358
 359     vcram_base = object_property_get_uint(OBJECT(s), "vcram-base", &err);
 360     if (err) {
 361         error_propagate(errp, err);
 362         return;
 363     }
 364
 365     if (vcram_base == 0) {
 366         vcram_base = ram_size - vcram_size;
 367     }
 368     vcram_base = MIN(vcram_base, UPPER_RAM_BASE - vcram_size);
 369
 370     if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", vcram_base,
 371                                   errp)) {
 372         return;
 373     }
 374     if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
 375         return;
 376     }
 377
 378     memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
 379                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
 380     sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
 381                        qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
 382
 383     /* OTP */
 384     if (!sysbus_realize(SYS_BUS_DEVICE(&s->otp), errp)) {
 385         return;
 386     }
 387
 388     memory_region_add_subregion(&s->peri_mr, OTP_OFFSET,
 389                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->otp), 0));
 390
 391     /* Property channel */
 392     if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
 393         return;
 394     }
 395
 396     memory_region_add_subregion(&s->mbox_mr,
 397                 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
 398                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
 399     sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
 400                       qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
 401
 402     /* Extended Mass Media Controller
 403      *
 404      * Compatible with:
 405      * - SD Host Controller Specification Version 3.0 Draft 1.0
 406      * - SDIO Specification Version 3.0
 407      * - MMC Specification Version 4.4
 408      *
 409      * For the exact details please refer to the Arasan documentation:
 410      *   SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
 411      */
 412     object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
 413                              &error_abort);
 414     object_property_set_uint(OBJECT(&s->sdhci), "capareg",
 415                              BCM2835_SDHC_CAPAREG, &error_abort);
 416     object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
 417                              &error_abort);
 418     if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
 419         return;
 420     }
 421
 422     memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
 423                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
 424
 425     /* SDHOST */
 426     if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
 427         return;
 428     }
 429
 430     memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
 431                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
 432     sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
 433         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 434                                INTERRUPT_SDIO));
 435
 436     /* DMA Channels */
 437     if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
 438         return;
 439     }
 440
 441     memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
 442                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
 443     memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
 444                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
 445
 446     /* Mphi */
 447     if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
 448         return;
 449     }
 450
 451     sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
 452         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 453                                INTERRUPT_HOSTPORT));
 454
 455     /* DWC2 */
 456     if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
 457         return;
 458     }
 459
 460     memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
 461                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
 462     sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
 463         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
 464                                INTERRUPT_USB));
 465
 466     /* Power Management */
 467     if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
 468         return;
 469     }
 470
 471     memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
 472                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
 473
 474     /* SPI */
 475     if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[0]), errp)) {
 476         return;
 477     }
 478
 479     memory_region_add_subregion(&s->peri_mr, SPI0_OFFSET,
 480                 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->spi[0]), 0));
 481     sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[0]), 0,
 482                        qdev_get_gpio_in_named(DEVICE(&s->ic),
 483                                               BCM2835_IC_GPU_IRQ,
 484                                               INTERRUPT_SPI));
 485
 486     /* I2C */
 487     for (n = 0; n < 3; n++) {
 488         if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c[n]), errp)) {
 489             return;
 490         }
 491     }
 492
 493     memory_region_add_subregion(&s->peri_mr, BSC0_OFFSET,
 494             sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[0]), 0));
 495     memory_region_add_subregion(&s->peri_mr, BSC1_OFFSET,
 496             sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[1]), 0));
 497     memory_region_add_subregion(&s->peri_mr, BSC2_OFFSET,
 498             sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[2]), 0));
 499
 500     if (!qdev_realize(DEVICE(&s->orgated_i2c_irq), NULL, errp)) {
 501         return;
 502     }
 503     for (n = 0; n < ORGATED_I2C_IRQ_COUNT; n++) {
 504         sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[n]), 0,
 505                            qdev_get_gpio_in(DEVICE(&s->orgated_i2c_irq), n));
 506     }
 507     qdev_connect_gpio_out(DEVICE(&s->orgated_i2c_irq), 0,
 508                           qdev_get_gpio_in_named(DEVICE(&s->ic),
 509                                                  BCM2835_IC_GPU_IRQ,
 510                                                  INTERRUPT_I2C));
 511
 512     create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
 513     create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
 514     create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
 515     create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
 516     create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
 517     create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
 518     create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
 519     create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
 520     create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
 521 }
 522
 523 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
 524 {
 525     DeviceClass *dc = DEVICE_CLASS(oc);
 526     BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_CLASS(oc);
 527
 528     bc->peri_size = 0x1000000;
 529     dc->realize = bcm2835_peripherals_realize;
 530 }
 531
 532 static const TypeInfo bcm2835_peripherals_types[] = {
 533     {
 534         .name = TYPE_BCM2835_PERIPHERALS,
 535         .parent = TYPE_BCM_SOC_PERIPHERALS_BASE,
 536         .instance_size = sizeof(BCM2835PeripheralState),
 537         .instance_init = bcm2835_peripherals_init,
 538         .class_init = bcm2835_peripherals_class_init,
 539     }, {
 540         .name = TYPE_BCM_SOC_PERIPHERALS_BASE,
 541         .parent = TYPE_SYS_BUS_DEVICE,
 542         .instance_size = sizeof(BCMSocPeripheralBaseState),
 543         .instance_init = raspi_peripherals_base_init,
 544         .class_size = sizeof(BCMSocPeripheralBaseClass),
 545         .abstract = true,
 546     }
 547 };
 548
 549 DEFINE_TYPES(bcm2835_peripherals_types)