hw/char/omap_uart.c

   1 /*
   2  * TI OMAP processors UART emulation.
   3  *
   4  * Copyright (C) 2006-2008 Andrzej Zaborowski  <balrog@zabor.org>
   5  * Copyright (C) 2007-2009 Nokia Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 or
  10  * (at your option) version 3 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #include "qemu/osdep.h"
  21 #include "chardev/char.h"
  22 #include "hw/arm/omap.h"
  23 #include "hw/char/serial-mm.h"
  24 #include "exec/address-spaces.h"
  25
  26 /* UARTs */
  27 struct omap_uart_s {
  28     MemoryRegion iomem;
  29     hwaddr base;
  30     SerialMM *serial; /* TODO */
  31     omap_clk fclk;
  32     qemu_irq irq;
  33
  34     uint8_t eblr;
  35     uint8_t syscontrol;
  36     uint8_t wkup;
  37     uint8_t cfps;
  38     uint8_t clksel;
  39 };
  40
  41 void omap_uart_reset(struct omap_uart_s *s)
  42 {
  43     s->eblr = 0x00;
  44     s->syscontrol = 0;
  45     s->wkup = 0x3f;
  46     s->cfps = 0x69;
  47     s->clksel = 0;
  48 }
  49
  50 struct omap_uart_s *omap_uart_init(hwaddr base,
  51                 qemu_irq irq, omap_clk fclk, omap_clk iclk,
  52                 qemu_irq txdma, qemu_irq rxdma,
  53                 const char *label, Chardev *chr)
  54 {
  55     struct omap_uart_s *s = g_new0(struct omap_uart_s, 1);
  56
  57     s->base = base;
  58     s->fclk = fclk;
  59     s->irq = irq;
  60     s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
  61                                omap_clk_getrate(fclk) / 16,
  62                                chr ?: qemu_chr_new(label, "null", NULL),
  63                                DEVICE_NATIVE_ENDIAN);
  64     return s;
  65 }