Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / hw / core / cpu-common.c
blob09c79035949b246dd29ffe15f552440e93980871
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/log.h"
26 #include "qemu/main-loop.h"
27 #include "qemu/lockcnt.h"
28 #include "exec/log.h"
29 #include "exec/gdbstub.h"
30 #include "sysemu/tcg.h"
31 #include "hw/boards.h"
32 #include "hw/qdev-properties.h"
33 #include "trace.h"
34 #ifdef CONFIG_PLUGIN
35 #include "qemu/plugin.h"
36 #endif
38 CPUState *cpu_by_arch_id(int64_t id)
40 CPUState *cpu;
42 CPU_FOREACH(cpu) {
43 CPUClass *cc = CPU_GET_CLASS(cpu);
45 if (cc->get_arch_id(cpu) == id) {
46 return cpu;
49 return NULL;
52 bool cpu_exists(int64_t id)
54 return !!cpu_by_arch_id(id);
57 CPUState *cpu_create(const char *typename)
59 Error *err = NULL;
60 CPUState *cpu = CPU(object_new(typename));
61 if (!qdev_realize(DEVICE(cpu), NULL, &err)) {
62 error_report_err(err);
63 object_unref(OBJECT(cpu));
64 exit(EXIT_FAILURE);
66 return cpu;
69 /* Resetting the IRQ comes from across the code base so we take the
70 * BQL here if we need to. cpu_interrupt assumes it is held.*/
71 void cpu_reset_interrupt(CPUState *cpu, int mask)
73 bool need_lock = !bql_locked();
75 if (need_lock) {
76 bql_lock();
78 cpu->interrupt_request &= ~mask;
79 if (need_lock) {
80 bql_unlock();
84 void cpu_exit(CPUState *cpu)
86 qatomic_set(&cpu->exit_request, 1);
87 /* Ensure cpu_exec will see the exit request after TCG has exited. */
88 smp_wmb();
89 qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
92 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
94 return 0;
97 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
99 return 0;
102 void cpu_dump_state(CPUState *cpu, FILE *f, int flags)
104 CPUClass *cc = CPU_GET_CLASS(cpu);
106 if (cc->dump_state) {
107 cpu_synchronize_state(cpu);
108 cc->dump_state(cpu, f, flags);
112 void cpu_reset(CPUState *cpu)
114 device_cold_reset(DEVICE(cpu));
116 trace_cpu_reset(cpu->cpu_index);
119 static void cpu_common_reset_hold(Object *obj, ResetType type)
121 CPUState *cpu = CPU(obj);
122 CPUClass *cc = CPU_GET_CLASS(cpu);
124 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
125 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
126 log_cpu_state(cpu, cc->reset_dump_flags);
129 cpu->interrupt_request = 0;
130 cpu->halted = cpu->start_powered_off;
131 cpu->mem_io_pc = 0;
132 cpu->icount_extra = 0;
133 qatomic_set(&cpu->neg.icount_decr.u32, 0);
134 cpu->neg.can_do_io = true;
135 cpu->exception_index = -1;
136 cpu->crash_occurred = false;
137 cpu->cflags_next_tb = -1;
139 cpu_exec_reset_hold(cpu);
142 static bool cpu_common_has_work(CPUState *cs)
144 return false;
147 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
149 ObjectClass *oc;
150 CPUClass *cc;
152 oc = object_class_by_name(typename);
153 cc = CPU_CLASS(oc);
154 assert(cc->class_by_name);
155 assert(cpu_model);
156 oc = cc->class_by_name(cpu_model);
157 if (object_class_dynamic_cast(oc, typename) &&
158 !object_class_is_abstract(oc)) {
159 return oc;
162 return NULL;
165 static void cpu_common_parse_features(const char *typename, char *features,
166 Error **errp)
168 char *val;
169 static bool cpu_globals_initialized;
170 /* Single "key=value" string being parsed */
171 char *featurestr = features ? strtok(features, ",") : NULL;
173 /* should be called only once, catch invalid users */
174 assert(!cpu_globals_initialized);
175 cpu_globals_initialized = true;
177 while (featurestr) {
178 val = strchr(featurestr, '=');
179 if (val) {
180 GlobalProperty *prop = g_new0(typeof(*prop), 1);
181 *val = 0;
182 val++;
183 prop->driver = typename;
184 prop->property = g_strdup(featurestr);
185 prop->value = g_strdup(val);
186 qdev_prop_register_global(prop);
187 } else {
188 error_setg(errp, "Expected key=value format, found %s.",
189 featurestr);
190 return;
192 featurestr = strtok(NULL, ",");
196 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
198 CPUState *cpu = CPU(dev);
199 Object *machine = qdev_get_machine();
201 /* qdev_get_machine() can return something that's not TYPE_MACHINE
202 * if this is one of the user-only emulators; in that case there's
203 * no need to check the ignore_memory_transaction_failures board flag.
205 if (object_dynamic_cast(machine, TYPE_MACHINE)) {
206 MachineClass *mc = MACHINE_GET_CLASS(machine);
208 if (mc) {
209 cpu->ignore_memory_transaction_failures =
210 mc->ignore_memory_transaction_failures;
214 if (dev->hotplugged) {
215 cpu_synchronize_post_init(cpu);
216 cpu_resume(cpu);
219 /* NOTE: latest generic point where the cpu is fully realized */
222 static void cpu_common_unrealizefn(DeviceState *dev)
224 CPUState *cpu = CPU(dev);
226 /* Call the plugin hook before clearing the cpu is fully unrealized */
227 #ifdef CONFIG_PLUGIN
228 if (tcg_enabled()) {
229 qemu_plugin_vcpu_exit_hook(cpu);
231 #endif
233 /* NOTE: latest generic point before the cpu is fully unrealized */
234 cpu_exec_unrealizefn(cpu);
237 static void cpu_common_initfn(Object *obj)
239 CPUState *cpu = CPU(obj);
241 gdb_init_cpu(cpu);
242 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
243 cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
244 /* user-mode doesn't have configurable SMP topology */
245 /* the default value is changed by qemu_init_vcpu() for system-mode */
246 cpu->nr_cores = 1;
247 cpu->nr_threads = 1;
248 cpu->cflags_next_tb = -1;
250 /* allocate storage for thread info, initialise condition variables */
251 cpu->thread = g_new0(QemuThread, 1);
252 cpu->halt_cond = g_new0(QemuCond, 1);
253 qemu_cond_init(cpu->halt_cond);
255 qemu_mutex_init(&cpu->work_mutex);
256 qemu_lockcnt_init(&cpu->in_ioctl_lock);
257 QSIMPLEQ_INIT(&cpu->work_list);
258 QTAILQ_INIT(&cpu->breakpoints);
259 QTAILQ_INIT(&cpu->watchpoints);
261 cpu_exec_initfn(cpu);
264 * Plugin initialization must wait until the cpu start executing
265 * code, but we must queue this work before the threads are
266 * created to ensure we don't race.
268 #ifdef CONFIG_PLUGIN
269 if (tcg_enabled()) {
270 cpu->plugin_state = qemu_plugin_create_vcpu_state();
271 qemu_plugin_vcpu_init_hook(cpu);
273 #endif
276 static void cpu_common_finalize(Object *obj)
278 CPUState *cpu = CPU(obj);
280 #ifdef CONFIG_PLUGIN
281 if (tcg_enabled()) {
282 g_free(cpu->plugin_state);
284 #endif
285 free_queued_cpu_work(cpu);
286 /* If cleanup didn't happen in context to gdb_unregister_coprocessor_all */
287 if (cpu->gdb_regs) {
288 g_array_free(cpu->gdb_regs, TRUE);
290 qemu_lockcnt_destroy(&cpu->in_ioctl_lock);
291 qemu_mutex_destroy(&cpu->work_mutex);
292 qemu_cond_destroy(cpu->halt_cond);
293 g_free(cpu->halt_cond);
294 g_free(cpu->thread);
297 static int64_t cpu_common_get_arch_id(CPUState *cpu)
299 return cpu->cpu_index;
302 static void cpu_common_class_init(ObjectClass *klass, void *data)
304 DeviceClass *dc = DEVICE_CLASS(klass);
305 ResettableClass *rc = RESETTABLE_CLASS(klass);
306 CPUClass *k = CPU_CLASS(klass);
308 k->parse_features = cpu_common_parse_features;
309 k->get_arch_id = cpu_common_get_arch_id;
310 k->has_work = cpu_common_has_work;
311 k->gdb_read_register = cpu_common_gdb_read_register;
312 k->gdb_write_register = cpu_common_gdb_write_register;
313 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
314 dc->realize = cpu_common_realizefn;
315 dc->unrealize = cpu_common_unrealizefn;
316 rc->phases.hold = cpu_common_reset_hold;
317 cpu_class_init_props(dc);
319 * Reason: CPUs still need special care by board code: wiring up
320 * IRQs, adding reset handlers, halting non-first CPUs, ...
322 dc->user_creatable = false;
325 static const TypeInfo cpu_type_info = {
326 .name = TYPE_CPU,
327 .parent = TYPE_DEVICE,
328 .instance_size = sizeof(CPUState),
329 .instance_init = cpu_common_initfn,
330 .instance_finalize = cpu_common_finalize,
331 .abstract = true,
332 .class_size = sizeof(CPUClass),
333 .class_init = cpu_common_class_init,
336 static void cpu_register_types(void)
338 type_register_static(&cpu_type_info);
341 type_init(cpu_register_types)