hw/i2c/core.c

   1 /*
   2  * QEMU I2C bus interface.
   3  *
   4  * Copyright (c) 2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the LGPL.
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "hw/i2c/i2c.h"
  12 #include "hw/qdev-properties.h"
  13 #include "migration/vmstate.h"
  14 #include "qapi/error.h"
  15 #include "qemu/module.h"
  16 #include "qemu/main-loop.h"
  17 #include "trace.h"
  18
  19 #define I2C_BROADCAST 0x00
  20
  21 static Property i2c_props[] = {
  22     DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
  23     DEFINE_PROP_END_OF_LIST(),
  24 };
  25
  26 static const TypeInfo i2c_bus_info = {
  27     .name = TYPE_I2C_BUS,
  28     .parent = TYPE_BUS,
  29     .instance_size = sizeof(I2CBus),
  30 };
  31
  32 static int i2c_bus_pre_save(void *opaque)
  33 {
  34     I2CBus *bus = opaque;
  35
  36     bus->saved_address = -1;
  37     if (!QLIST_EMPTY(&bus->current_devs)) {
  38         if (!bus->broadcast) {
  39             bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address;
  40         } else {
  41             bus->saved_address = I2C_BROADCAST;
  42         }
  43     }
  44
  45     return 0;
  46 }
  47
  48 static const VMStateDescription vmstate_i2c_bus = {
  49     .name = "i2c_bus",
  50     .version_id = 1,
  51     .minimum_version_id = 1,
  52     .pre_save = i2c_bus_pre_save,
  53     .fields = (const VMStateField[]) {
  54         VMSTATE_UINT8(saved_address, I2CBus),
  55         VMSTATE_END_OF_LIST()
  56     }
  57 };
  58
  59 /* Create a new I2C bus.  */
  60 I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
  61 {
  62     I2CBus *bus;
  63
  64     bus = I2C_BUS(qbus_new(TYPE_I2C_BUS, parent, name));
  65     QLIST_INIT(&bus->current_devs);
  66     QSIMPLEQ_INIT(&bus->pending_masters);
  67     vmstate_register_any(NULL, &vmstate_i2c_bus, bus);
  68     return bus;
  69 }
  70
  71 void i2c_slave_set_address(I2CSlave *dev, uint8_t address)
  72 {
  73     dev->address = address;
  74 }
  75
  76 /* Return nonzero if bus is busy.  */
  77 int i2c_bus_busy(I2CBus *bus)
  78 {
  79     return !QLIST_EMPTY(&bus->current_devs) || bus->bh;
  80 }
  81
  82 bool i2c_scan_bus(I2CBus *bus, uint8_t address, bool broadcast,
  83                   I2CNodeList *current_devs)
  84 {
  85     BusChild *kid;
  86
  87     QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) {
  88         DeviceState *qdev = kid->child;
  89         I2CSlave *candidate = I2C_SLAVE(qdev);
  90         I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(candidate);
  91
  92         if (sc->match_and_add(candidate, address, broadcast, current_devs)) {
  93             if (!broadcast) {
  94                 return true;
  95             }
  96         }
  97     }
  98
  99     /*
 100      * If broadcast was true, and the list was full or empty, return true. If
 101      * broadcast was false, return false.
 102      */
 103     return broadcast;
 104 }
 105
 106 /* TODO: Make this handle multiple masters.  */
 107 /*
 108  * Start or continue an i2c transaction.  When this is called for the
 109  * first time or after an i2c_end_transfer(), if it returns an error
 110  * the bus transaction is terminated (or really never started).  If
 111  * this is called after another i2c_start_transfer() without an
 112  * intervening i2c_end_transfer(), and it returns an error, the
 113  * transaction will not be terminated.  The caller must do it.
 114  *
 115  * This corresponds with the way real hardware works.  The SMBus
 116  * protocol uses a start transfer to switch from write to read mode
 117  * without releasing the bus.  If that fails, the bus is still
 118  * in a transaction.
 119  *
 120  * @event must be I2C_START_RECV or I2C_START_SEND.
 121  */
 122 static int i2c_do_start_transfer(I2CBus *bus, uint8_t address,
 123                                  enum i2c_event event)
 124 {
 125     I2CSlaveClass *sc;
 126     I2CNode *node;
 127     bool bus_scanned = false;
 128
 129     if (address == I2C_BROADCAST) {
 130         /*
 131          * This is a broadcast, the current_devs will be all the devices of the
 132          * bus.
 133          */
 134         bus->broadcast = true;
 135     }
 136
 137     /*
 138      * If there are already devices in the list, that means we are in
 139      * the middle of a transaction and we shouldn't rescan the bus.
 140      *
 141      * This happens with any SMBus transaction, even on a pure I2C
 142      * device.  The interface does a transaction start without
 143      * terminating the previous transaction.
 144      */
 145     if (QLIST_EMPTY(&bus->current_devs)) {
 146         /* Disregard whether devices were found. */
 147         (void)i2c_scan_bus(bus, address, bus->broadcast, &bus->current_devs);
 148         bus_scanned = true;
 149     }
 150
 151     if (QLIST_EMPTY(&bus->current_devs)) {
 152         return 1;
 153     }
 154
 155     QLIST_FOREACH(node, &bus->current_devs, next) {
 156         I2CSlave *s = node->elt;
 157         int rv;
 158
 159         sc = I2C_SLAVE_GET_CLASS(s);
 160         /* If the bus is already busy, assume this is a repeated
 161            start condition.  */
 162
 163         if (sc->event) {
 164             trace_i2c_event(event == I2C_START_SEND ? "start" : "start_async",
 165                             s->address);
 166             rv = sc->event(s, event);
 167             if (rv && !bus->broadcast) {
 168                 if (bus_scanned) {
 169                     /* First call, terminate the transfer. */
 170                     i2c_end_transfer(bus);
 171                 }
 172                 return rv;
 173             }
 174         }
 175     }
 176     return 0;
 177 }
 178
 179 int i2c_start_transfer(I2CBus *bus, uint8_t address, bool is_recv)
 180 {
 181     return i2c_do_start_transfer(bus, address, is_recv
 182                                                ? I2C_START_RECV
 183                                                : I2C_START_SEND);
 184 }
 185
 186 void i2c_bus_master(I2CBus *bus, QEMUBH *bh)
 187 {
 188     I2CPendingMaster *node = g_new(struct I2CPendingMaster, 1);
 189     node->bh = bh;
 190
 191     QSIMPLEQ_INSERT_TAIL(&bus->pending_masters, node, entry);
 192 }
 193
 194 void i2c_schedule_pending_master(I2CBus *bus)
 195 {
 196     I2CPendingMaster *node;
 197
 198     if (i2c_bus_busy(bus)) {
 199         /* someone is already controlling the bus; wait for it to release it */
 200         return;
 201     }
 202
 203     if (QSIMPLEQ_EMPTY(&bus->pending_masters)) {
 204         return;
 205     }
 206
 207     node = QSIMPLEQ_FIRST(&bus->pending_masters);
 208     bus->bh = node->bh;
 209
 210     QSIMPLEQ_REMOVE_HEAD(&bus->pending_masters, entry);
 211     g_free(node);
 212
 213     qemu_bh_schedule(bus->bh);
 214 }
 215
 216 void i2c_bus_release(I2CBus *bus)
 217 {
 218     bus->bh = NULL;
 219
 220     i2c_schedule_pending_master(bus);
 221 }
 222
 223 int i2c_start_recv(I2CBus *bus, uint8_t address)
 224 {
 225     return i2c_do_start_transfer(bus, address, I2C_START_RECV);
 226 }
 227
 228 int i2c_start_send(I2CBus *bus, uint8_t address)
 229 {
 230     return i2c_do_start_transfer(bus, address, I2C_START_SEND);
 231 }
 232
 233 int i2c_start_send_async(I2CBus *bus, uint8_t address)
 234 {
 235     return i2c_do_start_transfer(bus, address, I2C_START_SEND_ASYNC);
 236 }
 237
 238 void i2c_end_transfer(I2CBus *bus)
 239 {
 240     I2CSlaveClass *sc;
 241     I2CNode *node, *next;
 242
 243     QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) {
 244         I2CSlave *s = node->elt;
 245         sc = I2C_SLAVE_GET_CLASS(s);
 246         if (sc->event) {
 247             trace_i2c_event("finish", s->address);
 248             sc->event(s, I2C_FINISH);
 249         }
 250         QLIST_REMOVE(node, next);
 251         g_free(node);
 252     }
 253     bus->broadcast = false;
 254 }
 255
 256 int i2c_send(I2CBus *bus, uint8_t data)
 257 {
 258     I2CSlaveClass *sc;
 259     I2CSlave *s;
 260     I2CNode *node;
 261     int ret = 0;
 262
 263     QLIST_FOREACH(node, &bus->current_devs, next) {
 264         s = node->elt;
 265         sc = I2C_SLAVE_GET_CLASS(s);
 266         if (sc->send) {
 267             trace_i2c_send(s->address, data);
 268             ret = ret || sc->send(s, data);
 269         } else {
 270             ret = -1;
 271         }
 272     }
 273
 274     return ret ? -1 : 0;
 275 }
 276
 277 int i2c_send_async(I2CBus *bus, uint8_t data)
 278 {
 279     I2CNode *node = QLIST_FIRST(&bus->current_devs);
 280     I2CSlave *slave = node->elt;
 281     I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(slave);
 282
 283     if (!sc->send_async) {
 284         return -1;
 285     }
 286
 287     trace_i2c_send_async(slave->address, data);
 288
 289     sc->send_async(slave, data);
 290
 291     return 0;
 292 }
 293
 294 uint8_t i2c_recv(I2CBus *bus)
 295 {
 296     uint8_t data = 0xff;
 297     I2CSlaveClass *sc;
 298     I2CSlave *s;
 299
 300     if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) {
 301         sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt);
 302         if (sc->recv) {
 303             s = QLIST_FIRST(&bus->current_devs)->elt;
 304             data = sc->recv(s);
 305             trace_i2c_recv(s->address, data);
 306         }
 307     }
 308
 309     return data;
 310 }
 311
 312 void i2c_nack(I2CBus *bus)
 313 {
 314     I2CSlaveClass *sc;
 315     I2CNode *node;
 316
 317     if (QLIST_EMPTY(&bus->current_devs)) {
 318         return;
 319     }
 320
 321     QLIST_FOREACH(node, &bus->current_devs, next) {
 322         sc = I2C_SLAVE_GET_CLASS(node->elt);
 323         if (sc->event) {
 324             trace_i2c_event("nack", node->elt->address);
 325             sc->event(node->elt, I2C_NACK);
 326         }
 327     }
 328 }
 329
 330 void i2c_ack(I2CBus *bus)
 331 {
 332     if (!bus->bh) {
 333         return;
 334     }
 335
 336     trace_i2c_ack();
 337
 338     qemu_bh_schedule(bus->bh);
 339 }
 340
 341 static int i2c_slave_post_load(void *opaque, int version_id)
 342 {
 343     I2CSlave *dev = opaque;
 344     I2CBus *bus;
 345     I2CNode *node;
 346
 347     bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
 348     if ((bus->saved_address == dev->address) ||
 349         (bus->saved_address == I2C_BROADCAST)) {
 350         node = g_new(struct I2CNode, 1);
 351         node->elt = dev;
 352         QLIST_INSERT_HEAD(&bus->current_devs, node, next);
 353     }
 354     return 0;
 355 }
 356
 357 const VMStateDescription vmstate_i2c_slave = {
 358     .name = "I2CSlave",
 359     .version_id = 1,
 360     .minimum_version_id = 1,
 361     .post_load = i2c_slave_post_load,
 362     .fields = (const VMStateField[]) {
 363         VMSTATE_UINT8(address, I2CSlave),
 364         VMSTATE_END_OF_LIST()
 365     }
 366 };
 367
 368 I2CSlave *i2c_slave_new(const char *name, uint8_t addr)
 369 {
 370     DeviceState *dev;
 371
 372     dev = qdev_new(name);
 373     qdev_prop_set_uint8(dev, "address", addr);
 374     return I2C_SLAVE(dev);
 375 }
 376
 377 bool i2c_slave_realize_and_unref(I2CSlave *dev, I2CBus *bus, Error **errp)
 378 {
 379     return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp);
 380 }
 381
 382 I2CSlave *i2c_slave_create_simple(I2CBus *bus, const char *name, uint8_t addr)
 383 {
 384     I2CSlave *dev = i2c_slave_new(name, addr);
 385
 386     i2c_slave_realize_and_unref(dev, bus, &error_abort);
 387
 388     return dev;
 389 }
 390
 391 static bool i2c_slave_match(I2CSlave *candidate, uint8_t address,
 392                             bool broadcast, I2CNodeList *current_devs)
 393 {
 394     if ((candidate->address == address) || (broadcast)) {
 395         I2CNode *node = g_new(struct I2CNode, 1);
 396         node->elt = candidate;
 397         QLIST_INSERT_HEAD(current_devs, node, next);
 398         return true;
 399     }
 400
 401     /* Not found and not broadcast. */
 402     return false;
 403 }
 404
 405 static void i2c_slave_class_init(ObjectClass *klass, void *data)
 406 {
 407     DeviceClass *k = DEVICE_CLASS(klass);
 408     I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
 409     set_bit(DEVICE_CATEGORY_MISC, k->categories);
 410     k->bus_type = TYPE_I2C_BUS;
 411     device_class_set_props(k, i2c_props);
 412     sc->match_and_add = i2c_slave_match;
 413 }
 414
 415 static const TypeInfo i2c_slave_type_info = {
 416     .name = TYPE_I2C_SLAVE,
 417     .parent = TYPE_DEVICE,
 418     .instance_size = sizeof(I2CSlave),
 419     .abstract = true,
 420     .class_size = sizeof(I2CSlaveClass),
 421     .class_init = i2c_slave_class_init,
 422 };
 423
 424 static void i2c_slave_register_types(void)
 425 {
 426     type_register_static(&i2c_bus_info);
 427     type_register_static(&i2c_slave_type_info);
 428 }
 429
 430 type_init(i2c_slave_register_types)