hw/usb/xlnx-usb-subsystem.c

   1 /*
   2  * QEMU model of the Xilinx usb subsystem
   3  *
   4  * Copyright (c) 2020 Xilinx Inc. Sai Pavan Boddu <sai.pava.boddu@xilinx.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "hw/sysbus.h"
  27 #include "hw/register.h"
  28 #include "qemu/bitops.h"
  29 #include "qom/object.h"
  30 #include "qapi/error.h"
  31 #include "hw/qdev-properties.h"
  32 #include "hw/usb/xlnx-usb-subsystem.h"
  33
  34 static void versal_usb2_realize(DeviceState *dev, Error **errp)
  35 {
  36     VersalUsb2 *s = VERSAL_USB2(dev);
  37     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
  38     Error *err = NULL;
  39
  40     sysbus_realize(SYS_BUS_DEVICE(&s->dwc3), &err);
  41     if (err) {
  42         error_propagate(errp, err);
  43         return;
  44     }
  45     sysbus_realize(SYS_BUS_DEVICE(&s->usb2Ctrl), &err);
  46     if (err) {
  47         error_propagate(errp, err);
  48         return;
  49     }
  50     sysbus_init_mmio(sbd, &s->dwc3_mr);
  51     sysbus_init_mmio(sbd, &s->usb2Ctrl_mr);
  52     qdev_pass_gpios(DEVICE(&s->dwc3.sysbus_xhci), dev, SYSBUS_DEVICE_GPIO_IRQ);
  53 }
  54
  55 static void versal_usb2_init(Object *obj)
  56 {
  57     VersalUsb2 *s = VERSAL_USB2(obj);
  58
  59     object_initialize_child(obj, "versal.dwc3", &s->dwc3,
  60                             TYPE_USB_DWC3);
  61     object_initialize_child(obj, "versal.usb2-ctrl", &s->usb2Ctrl,
  62                             TYPE_XILINX_VERSAL_USB2_CTRL_REGS);
  63     memory_region_init_alias(&s->dwc3_mr, obj, "versal.dwc3_alias",
  64                              &s->dwc3.iomem, 0, DWC3_SIZE);
  65     memory_region_init_alias(&s->usb2Ctrl_mr, obj, "versal.usb2Ctrl_alias",
  66                              &s->usb2Ctrl.iomem, 0, USB2_REGS_R_MAX * 4);
  67     qdev_alias_all_properties(DEVICE(&s->dwc3), obj);
  68     qdev_alias_all_properties(DEVICE(&s->dwc3.sysbus_xhci), obj);
  69     object_property_add_alias(obj, "dma", OBJECT(&s->dwc3.sysbus_xhci), "dma");
  70 }
  71
  72 static void versal_usb2_class_init(ObjectClass *klass, void *data)
  73 {
  74     DeviceClass *dc = DEVICE_CLASS(klass);
  75
  76     dc->realize = versal_usb2_realize;
  77 }
  78
  79 static const TypeInfo versal_usb2_info = {
  80     .name          = TYPE_XILINX_VERSAL_USB2,
  81     .parent        = TYPE_SYS_BUS_DEVICE,
  82     .instance_size = sizeof(VersalUsb2),
  83     .class_init    = versal_usb2_class_init,
  84     .instance_init = versal_usb2_init,
  85 };
  86
  87 static void versal_usb_types(void)
  88 {
  89     type_register_static(&versal_usb2_info);
  90 }
  91
  92 type_init(versal_usb_types)