2 * ASPEED GPIO Controller
4 * Copyright (C) 2017-2018 IBM Corp.
6 * This code is licensed under the GPL version 2 or later. See
7 * the COPYING file in the top-level directory.
13 #include "hw/sysbus.h"
14 #include "qom/object.h"
16 #define TYPE_ASPEED_GPIO "aspeed.gpio"
17 OBJECT_DECLARE_TYPE(AspeedGPIOState
, AspeedGPIOClass
, ASPEED_GPIO
)
19 #define ASPEED_GPIO_MAX_NR_SETS 8
20 #define ASPEED_GPIOS_PER_SET 32
21 #define ASPEED_REGS_PER_BANK 14
22 #define ASPEED_GPIO_MAX_NR_REGS (ASPEED_REGS_PER_BANK * ASPEED_GPIO_MAX_NR_SETS)
23 #define ASPEED_GROUPS_PER_SET 4
24 #define ASPEED_GPIO_NR_DEBOUNCE_REGS 3
25 #define ASPEED_CHARS_PER_GROUP_LABEL 4
27 typedef struct GPIOSets GPIOSets
;
29 typedef struct GPIOSetProperties
{
32 char group_label
[ASPEED_GROUPS_PER_SET
][ASPEED_CHARS_PER_GROUP_LABEL
];
44 gpio_reg_reset_tolerant
,
47 gpio_reg_cmd_source_0
,
48 gpio_reg_cmd_source_1
,
54 enum GPIORegIndexType
{
55 gpio_reg_idx_data
= 0,
56 gpio_reg_idx_direction
,
57 gpio_reg_idx_interrupt
,
58 gpio_reg_idx_debounce
,
59 gpio_reg_idx_tolerance
,
61 gpio_reg_idx_input_mask
,
62 gpio_reg_idx_reserved
,
63 gpio_reg_idx_new_w_cmd_src
,
64 gpio_reg_idx_new_r_cmd_src
,
67 typedef struct AspeedGPIOReg
{
69 enum GPIORegType type
;
72 struct AspeedGPIOClass
{
73 SysBusDevice parent_obj
;
74 const GPIOSetProperties
*props
;
75 uint32_t nr_gpio_pins
;
76 uint32_t nr_gpio_sets
;
77 const AspeedGPIOReg
*reg_table
;
78 unsigned reg_table_count
;
81 struct AspeedGPIOState
{
89 qemu_irq gpios
[ASPEED_GPIO_MAX_NR_SETS
][ASPEED_GPIOS_PER_SET
];
91 /* Parallel GPIO Registers */
92 uint32_t debounce_regs
[ASPEED_GPIO_NR_DEBOUNCE_REGS
];
94 uint32_t data_value
; /* Reflects pin values */
95 uint32_t data_read
; /* Contains last value written to data value */
103 uint32_t cmd_source_0
;
104 uint32_t cmd_source_1
;
108 } sets
[ASPEED_GPIO_MAX_NR_SETS
];
111 #endif /* ASPEED_GPIO_H */