Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / include / hw / misc / allwinner-a10-dramc.h
blobb61fbecbe74931ed0327d717934dc1c613258e59
1 /*
2 * Allwinner A10 DRAM Controller emulation
4 * Copyright (C) 2022 Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
6 * This file is derived from Allwinner H3 DRAMC,
7 * by Niek Linnenbank.
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation, either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #ifndef HW_MISC_ALLWINNER_A10_DRAMC_H
24 #define HW_MISC_ALLWINNER_A10_DRAMC_H
26 #include "qom/object.h"
27 #include "hw/sysbus.h"
28 #include "hw/register.h"
30 /**
31 * @name Constants
32 * @{
35 /** Size of register I/O address space used by DRAMC device */
36 #define AW_A10_DRAMC_IOSIZE (0x1000)
38 /** Total number of known registers */
39 #define AW_A10_DRAMC_REGS_NUM (AW_A10_DRAMC_IOSIZE / sizeof(uint32_t))
41 /** @} */
43 /**
44 * @name Object model
45 * @{
48 #define TYPE_AW_A10_DRAMC "allwinner-a10-dramc"
49 OBJECT_DECLARE_SIMPLE_TYPE(AwA10DramControllerState, AW_A10_DRAMC)
51 /** @} */
53 /**
54 * Allwinner A10 DRAMC object instance state.
56 struct AwA10DramControllerState {
57 /*< private >*/
58 SysBusDevice parent_obj;
59 /*< public >*/
61 /** Maps I/O registers in physical memory */
62 MemoryRegion iomem;
64 /** Array of hardware registers */
65 uint32_t regs[AW_A10_DRAMC_REGS_NUM];
68 #endif /* HW_MISC_ALLWINNER_A10_DRAMC_H */