include/hw/misc/aspeed_hace.h

   1 /*
   2  * ASPEED Hash and Crypto Engine
   3  *
   4  * Copyright (C) 2021 IBM Corp.
   5  *
   6  * SPDX-License-Identifier: GPL-2.0-or-later
   7  */
   8
   9 #ifndef ASPEED_HACE_H
  10 #define ASPEED_HACE_H
  11
  12 #include "hw/sysbus.h"
  13
  14 #define TYPE_ASPEED_HACE "aspeed.hace"
  15 #define TYPE_ASPEED_AST2400_HACE TYPE_ASPEED_HACE "-ast2400"
  16 #define TYPE_ASPEED_AST2500_HACE TYPE_ASPEED_HACE "-ast2500"
  17 #define TYPE_ASPEED_AST2600_HACE TYPE_ASPEED_HACE "-ast2600"
  18 #define TYPE_ASPEED_AST1030_HACE TYPE_ASPEED_HACE "-ast1030"
  19
  20 OBJECT_DECLARE_TYPE(AspeedHACEState, AspeedHACEClass, ASPEED_HACE)
  21
  22 #define ASPEED_HACE_NR_REGS (0x64 >> 2)
  23 #define ASPEED_HACE_MAX_SG  256 /* max number of entries */
  24
  25 struct AspeedHACEState {
  26     SysBusDevice parent;
  27
  28     MemoryRegion iomem;
  29     qemu_irq irq;
  30
  31     struct iovec iov_cache[ASPEED_HACE_MAX_SG];
  32     uint32_t regs[ASPEED_HACE_NR_REGS];
  33     uint32_t total_req_len;
  34     uint32_t iov_count;
  35
  36     MemoryRegion *dram_mr;
  37     AddressSpace dram_as;
  38 };
  39
  40
  41 struct AspeedHACEClass {
  42     SysBusDeviceClass parent_class;
  43
  44     uint32_t src_mask;
  45     uint32_t dest_mask;
  46     uint32_t key_mask;
  47     uint32_t hash_mask;
  48 };
  49
  50 #endif /* ASPEED_HACE_H */