include/hw/misc/macio/pmu.h

   1 /*
   2  * Definitions for talking to the PMU.  The PMU is a microcontroller
   3  * which controls battery charging and system power on PowerBook 3400
   4  * and 2400 models as well as the RTC and various other things.
   5  *
   6  * Copyright (C) 1998 Paul Mackerras.
   7  * Copyright (C) 2016 Ben Herrenschmidt
   8  */
   9
  10 #ifndef PMU_H
  11 #define PMU_H
  12
  13 #include "hw/input/adb.h"
  14 #include "hw/misc/mos6522.h"
  15 #include "hw/misc/macio/gpio.h"
  16 #include "qom/object.h"
  17
  18 /*
  19  * PMU commands
  20  */
  21
  22 #define PMU_POWER_CTRL0            0x10  /* control power of some devices */
  23 #define PMU_POWER_CTRL             0x11  /* control power of some devices */
  24 #define PMU_ADB_CMD                0x20  /* send ADB packet */
  25 #define PMU_ADB_POLL_OFF           0x21  /* disable ADB auto-poll */
  26 #define PMU_WRITE_NVRAM            0x33  /* write non-volatile RAM */
  27 #define PMU_READ_NVRAM             0x3b  /* read non-volatile RAM */
  28 #define PMU_SET_RTC                0x30  /* set real-time clock */
  29 #define PMU_READ_RTC               0x38  /* read real-time clock */
  30 #define PMU_SET_VOLBUTTON          0x40  /* set volume up/down position */
  31 #define PMU_BACKLIGHT_BRIGHT       0x41  /* set backlight brightness */
  32 #define PMU_GET_VOLBUTTON          0x48  /* get volume up/down position */
  33 #define PMU_PCEJECT                0x4c  /* eject PC-card from slot */
  34 #define PMU_BATTERY_STATE          0x6b  /* report battery state etc. */
  35 #define PMU_SMART_BATTERY_STATE    0x6f  /* report battery state (new way) */
  36 #define PMU_SET_INTR_MASK          0x70  /* set PMU interrupt mask */
  37 #define PMU_INT_ACK                0x78  /* read interrupt bits */
  38 #define PMU_SHUTDOWN               0x7e  /* turn power off */
  39 #define PMU_CPU_SPEED              0x7d  /* control CPU speed on some models */
  40 #define PMU_SLEEP                  0x7f  /* put CPU to sleep */
  41 #define PMU_POWER_EVENTS           0x8f  /* Send power-event commands to PMU */
  42 #define PMU_I2C_CMD                0x9a  /* I2C operations */
  43 #define PMU_RESET                  0xd0  /* reset CPU */
  44 #define PMU_GET_BRIGHTBUTTON       0xd9  /* report brightness up/down pos */
  45 #define PMU_GET_COVER              0xdc  /* report cover open/closed */
  46 #define PMU_SYSTEM_READY           0xdf  /* tell PMU we are awake */
  47 #define PMU_DOWNLOAD_STATUS        0xe2  /* Called by MacOS during boot... */
  48 #define PMU_READ_PMU_RAM           0xe8  /* read the PMU RAM... ??? */
  49 #define PMU_GET_VERSION            0xea  /* read the PMU version */
  50
  51 /* Bits to use with the PMU_POWER_CTRL0 command */
  52 #define PMU_POW0_ON            0x80    /* OR this to power ON the device */
  53 #define PMU_POW0_OFF           0x00    /* leave bit 7 to 0 to power it OFF */
  54 #define PMU_POW0_HARD_DRIVE    0x04    /* Hard drive power
  55                                         * (on wallstreet/lombard ?) */
  56
  57 /* Bits to use with the PMU_POWER_CTRL command */
  58 #define PMU_POW_ON             0x80    /* OR this to power ON the device */
  59 #define PMU_POW_OFF            0x00    /* leave bit 7 to 0 to power it OFF */
  60 #define PMU_POW_BACKLIGHT      0x01    /* backlight power */
  61 #define PMU_POW_CHARGER        0x02    /* battery charger power */
  62 #define PMU_POW_IRLED          0x04    /* IR led power (on wallstreet) */
  63 #define PMU_POW_MEDIABAY       0x08    /* media bay power
  64                                         * (wallstreet/lombard ?) */
  65
  66 /* Bits in PMU interrupt and interrupt mask bytes */
  67 #define PMU_INT_PCEJECT        0x04    /* PC-card eject buttons */
  68 #define PMU_INT_SNDBRT         0x08    /* sound/brightness up/down buttons */
  69 #define PMU_INT_ADB            0x10    /* ADB autopoll or reply data */
  70 #define PMU_INT_BATTERY        0x20    /* Battery state change */
  71 #define PMU_INT_ENVIRONMENT    0x40    /* Environment interrupts */
  72 #define PMU_INT_TICK           0x80    /* 1-second tick interrupt */
  73
  74 /* Other bits in PMU interrupt valid when PMU_INT_ADB is set */
  75 #define PMU_INT_ADB_AUTO           0x04    /* ADB autopoll, when PMU_INT_ADB */
  76 #define PMU_INT_WAITING_CHARGER    0x01    /* ??? */
  77 #define PMU_INT_AUTO_SRQ_POLL      0x02    /* ??? */
  78
  79 /* Bits in the environment message (either obtained via PMU_GET_COVER,
  80  * or via PMU_INT_ENVIRONMENT on core99 */
  81 #define PMU_ENV_LID_CLOSED     0x01    /* The lid is closed */
  82
  83 /* I2C related definitions */
  84 #define PMU_I2C_MODE_SIMPLE    0
  85 #define PMU_I2C_MODE_STDSUB    1
  86 #define PMU_I2C_MODE_COMBINED  2
  87
  88 #define PMU_I2C_BUS_STATUS     0
  89 #define PMU_I2C_BUS_SYSCLK     1
  90 #define PMU_I2C_BUS_POWER      2
  91
  92 #define PMU_I2C_STATUS_OK          0
  93 #define PMU_I2C_STATUS_DATAREAD    1
  94 #define PMU_I2C_STATUS_BUSY        0xfe
  95
  96 /* Kind of PMU (model) */
  97 enum {
  98     PMU_UNKNOWN,
  99     PMU_OHARE_BASED,        /* 2400, 3400, 3500 (old G3 powerbook) */
 100     PMU_HEATHROW_BASED,     /* PowerBook G3 series */
 101     PMU_PADDINGTON_BASED,   /* 1999 PowerBook G3 */
 102     PMU_KEYLARGO_BASED,     /* Core99 motherboard (PMU99) */
 103     PMU_68K_V1,             /* 68K PMU, version 1 */
 104     PMU_68K_V2,             /* 68K PMU, version 2 */
 105 };
 106
 107 /* PMU PMU_POWER_EVENTS commands */
 108 enum {
 109     PMU_PWR_GET_POWERUP_EVENTS = 0x00,
 110     PMU_PWR_SET_POWERUP_EVENTS = 0x01,
 111     PMU_PWR_CLR_POWERUP_EVENTS = 0x02,
 112     PMU_PWR_GET_WAKEUP_EVENTS = 0x03,
 113     PMU_PWR_SET_WAKEUP_EVENTS = 0x04,
 114     PMU_PWR_CLR_WAKEUP_EVENTS = 0x05,
 115 };
 116
 117 /* Power events wakeup bits */
 118 enum {
 119     PMU_PWR_WAKEUP_KEY = 0x01,           /* Wake on key press */
 120     PMU_PWR_WAKEUP_AC_INSERT = 0x02,     /* Wake on AC adapter plug */
 121     PMU_PWR_WAKEUP_AC_CHANGE = 0x04,
 122     PMU_PWR_WAKEUP_LID_OPEN = 0x08,
 123     PMU_PWR_WAKEUP_RING = 0x10,
 124 };
 125
 126 /*
 127  * This table indicates for each PMU opcode:
 128  * - the number of data bytes to be sent with the command, or -1
 129  *   if a length byte should be sent,
 130  * - the number of response bytes which the PMU will return, or
 131  *   -1 if it will send a length byte.
 132  */
 133
 134 static const int8_t pmu_data_len[256][2] = {
 135 /*  0        1        2        3        4        5        6        7  */
 136     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 137     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 138     { 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 139     { 0,  1},{ 0,  1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0,  0},
 140     {-1,  0},{ 0,  0},{ 2,  0},{ 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},
 141     { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0, -1},
 142     { 4,  0},{20,  0},{-1,  0},{ 3,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 143     { 0,  4},{ 0, 20},{ 2, -1},{ 2,  1},{ 3, -1},{-1, -1},{-1, -1},{ 4,  0},
 144     { 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 145     { 0,  1},{ 0,  1},{-1, -1},{ 1,  0},{ 1,  0},{-1, -1},{-1, -1},{-1, -1},
 146     { 1,  0},{ 0,  0},{ 2,  0},{ 2,  0},{-1,  0},{ 1,  0},{ 3,  0},{ 1,  0},
 147     { 0,  1},{ 1,  0},{ 0,  2},{ 0,  2},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},
 148     { 2,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 149     { 0,  3},{ 0,  3},{ 0,  2},{ 0,  8},{ 0, -1},{ 0, -1},{-1, -1},{-1, -1},
 150     { 1,  0},{ 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 151     { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{ 5,  1},{ 4,  1},{ 4,  1},
 152     { 4,  0},{-1,  0},{ 0,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 153     { 0,  5},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 154     { 1,  0},{ 2,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 155     { 0,  1},{ 0,  1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 156     { 2,  0},{ 2,  0},{ 2,  0},{ 4,  0},{-1,  0},{ 0,  0},{-1,  0},{-1,  0},
 157     { 1,  1},{ 1,  0},{ 3,  0},{ 2,  0},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 158     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 159     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 160     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 161     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 162     { 0,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 163     { 1,  1},{ 1,  1},{-1, -1},{-1, -1},{ 0,  1},{ 0, -1},{-1, -1},{-1, -1},
 164     {-1,  0},{ 4,  0},{ 0,  1},{-1,  0},{-1,  0},{ 4,  0},{-1,  0},{-1,  0},
 165     { 3, -1},{-1, -1},{ 0,  1},{-1, -1},{ 0, -1},{-1, -1},{-1, -1},{ 0,  0},
 166     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
 167     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
 168 };
 169
 170 /* Command protocol state machine */
 171 typedef enum {
 172     pmu_state_idle, /* Waiting for command */
 173     pmu_state_cmd,  /* Receiving command */
 174     pmu_state_rsp,  /* Responding to command */
 175 } PMUCmdState;
 176
 177 /* MOS6522 PMU */
 178 struct MOS6522PMUState {
 179     /*< private >*/
 180     MOS6522State parent_obj;
 181 };
 182
 183 #define TYPE_MOS6522_PMU "mos6522-pmu"
 184 OBJECT_DECLARE_SIMPLE_TYPE(MOS6522PMUState, MOS6522_PMU)
 185 /**
 186  * PMUState:
 187  * @last_b: last value of B register
 188  */
 189
 190 struct PMUState {
 191     /*< private >*/
 192     SysBusDevice parent_obj;
 193     /*< public >*/
 194
 195     MemoryRegion mem;
 196     uint64_t frequency;
 197
 198     /* PMU state */
 199     MOS6522PMUState mos6522_pmu;
 200
 201     /* PMU low level protocol state */
 202     PMUCmdState cmd_state;
 203     uint8_t last_b;
 204     uint8_t cmd;
 205     uint32_t cmdlen;
 206     uint32_t rsplen;
 207     uint8_t cmd_buf_pos;
 208     uint8_t cmd_buf[128];
 209     uint8_t cmd_rsp_pos;
 210     uint8_t cmd_rsp_sz;
 211     uint8_t cmd_rsp[128];
 212
 213     /* PMU events/interrupts */
 214     uint8_t intbits;
 215     uint8_t intmask;
 216
 217     /* ADB */
 218     bool has_adb;
 219     ADBBusState adb_bus;
 220     uint8_t adb_reply_size;
 221     uint8_t adb_reply[ADB_MAX_OUT_LEN];
 222
 223     /* RTC */
 224     uint32_t tick_offset;
 225     QEMUTimer *one_sec_timer;
 226     int64_t one_sec_target;
 227
 228     /* GPIO */
 229     MacIOGPIOState *gpio;
 230 };
 231
 232 #define TYPE_VIA_PMU "via-pmu"
 233 OBJECT_DECLARE_SIMPLE_TYPE(PMUState, VIA_PMU)
 234
 235 #endif /* PMU_H */