Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / include / hw / misc / mchp_pfsoc_sysreg.h
blobc2232bd28d0386141f79ff86dad0ad5cd19ce507
1 /*
2 * Microchip PolarFire SoC SYSREG module emulation
4 * Copyright (c) 2020 Wind River Systems, Inc.
6 * Author:
7 * Bin Meng <bin.meng@windriver.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 or
12 * (at your option) version 3 of the License.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
23 #ifndef MCHP_PFSOC_SYSREG_H
24 #define MCHP_PFSOC_SYSREG_H
26 #include "hw/sysbus.h"
28 #define MCHP_PFSOC_SYSREG_REG_SIZE 0x2000
30 typedef struct MchpPfSoCSysregState {
31 SysBusDevice parent;
32 MemoryRegion sysreg;
33 qemu_irq irq;
34 } MchpPfSoCSysregState;
36 #define TYPE_MCHP_PFSOC_SYSREG "mchp.pfsoc.sysreg"
38 #define MCHP_PFSOC_SYSREG(obj) \
39 OBJECT_CHECK(MchpPfSoCSysregState, (obj), \
40 TYPE_MCHP_PFSOC_SYSREG)
42 #endif /* MCHP_PFSOC_SYSREG_H */