2 * ARM AHB5 TrustZone Memory Protection Controller emulation
4 * Copyright (c) 2018 Linaro Limited
5 * Written by Peter Maydell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
12 /* This is a model of the TrustZone memory protection controller (MPC).
13 * It is documented in the ARM CoreLink SIE-200 System IP for Embedded TRM
15 * https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g
17 * The MPC sits in front of memory and allows secure software to
18 * configure it to either pass through or reject transactions.
19 * Rejected transactions may be configured to either be aborted, or to
20 * behave as RAZ/WI. An interrupt can be signalled for a rejected transaction.
22 * The MPC has a register interface which the guest uses to configure it.
25 * + sysbus MMIO region 0: MemoryRegion for the MPC's config registers
26 * + sysbus MMIO region 1: MemoryRegion for the upstream end of the MPC
27 * + Property "downstream": MemoryRegion defining the downstream memory
28 * + Named GPIO output "irq": set for a transaction-failed interrupt
34 #include "hw/sysbus.h"
35 #include "qom/object.h"
37 #define TYPE_TZ_MPC "tz-mpc"
38 OBJECT_DECLARE_SIMPLE_TYPE(TZMPC
, TZ_MPC
)
40 #define TZ_NUM_PORTS 16
42 #define TYPE_TZ_MPC_IOMMU_MEMORY_REGION "tz-mpc-iommu-memory-region"
47 SysBusDevice parent_obj
;
64 MemoryRegion
*downstream
;
69 /* MemoryRegions exposed to user */
71 IOMMUMemoryRegion upstream
;
73 /* MemoryRegion used internally */
74 MemoryRegion blocked_io
;
76 AddressSpace downstream_as
;
77 AddressSpace blocked_io_as
;