4 #include "hw/pci/pci.h"
7 * PCI Bus datastructures.
9 * Do not access the following members directly;
10 * use accessor functions in pci.h
15 BusClass parent_class
;
18 int (*bus_num
)(PCIBus
*bus
);
19 uint16_t (*numa_node
)(PCIBus
*bus
);
23 /* This bus is the root of a PCI domain */
24 PCI_BUS_IS_ROOT
= 0x0001,
25 /* PCIe extended configuration space is accessible on this bus */
26 PCI_BUS_EXTENDED_CONFIG_SPACE
= 0x0002,
27 /* This is a CXL Type BUS */
31 #define PCI_NO_PASID UINT32_MAX
35 enum PCIBusFlags flags
;
36 const PCIIOMMUOps
*iommu_ops
;
39 uint32_t slot_reserved_mask
;
40 pci_set_irq_fn set_irq
;
41 pci_map_irq_fn map_irq
;
42 pci_route_irq_fn route_intx_to_irq
;
44 PCIDevice
*devices
[PCI_SLOT_MAX
* PCI_FUNC_MAX
];
45 PCIDevice
*parent_dev
;
46 MemoryRegion
*address_space_mem
;
47 MemoryRegion
*address_space_io
;
49 QLIST_HEAD(, PCIBus
) child
; /* this will be replaced by qdev later */
50 QLIST_ENTRY(PCIBus
) sibling
;/* this will be replaced by qdev later */
52 /* The bus IRQ state is the logical OR of the connected devices.
53 Keep a count of the number of devices with raised IRQs. */
57 Notifier machine_done
;
60 static inline bool pci_bus_is_cxl(PCIBus
*bus
)
62 return !!(bus
->flags
& PCI_BUS_CXL
);
65 static inline bool pci_bus_is_root(PCIBus
*bus
)
67 return !!(bus
->flags
& PCI_BUS_IS_ROOT
);
70 static inline bool pci_bus_allows_extended_config_space(PCIBus
*bus
)
72 return !!(bus
->flags
& PCI_BUS_EXTENDED_CONFIG_SPACE
);
75 #endif /* QEMU_PCI_BUS_H */