Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / include / hw / ppc / pnv_chiptod.h
blobfde569bcbfa9c29402b2d4113654ee55936f8929
1 /*
2 * QEMU PowerPC PowerNV Emulation of some CHIPTOD behaviour
4 * Copyright (c) 2022-2023, IBM Corporation.
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
9 #ifndef PPC_PNV_CHIPTOD_H
10 #define PPC_PNV_CHIPTOD_H
12 #include "qom/object.h"
14 #define TYPE_PNV_CHIPTOD "pnv-chiptod"
15 OBJECT_DECLARE_TYPE(PnvChipTOD, PnvChipTODClass, PNV_CHIPTOD)
16 #define TYPE_PNV9_CHIPTOD TYPE_PNV_CHIPTOD "-POWER9"
17 DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV9_CHIPTOD, TYPE_PNV9_CHIPTOD)
18 #define TYPE_PNV10_CHIPTOD TYPE_PNV_CHIPTOD "-POWER10"
19 DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV10_CHIPTOD, TYPE_PNV10_CHIPTOD)
21 enum tod_state {
22 tod_error = 0,
23 tod_not_set = 7,
24 tod_running = 2,
25 tod_stopped = 1,
28 typedef struct PnvCore PnvCore;
30 struct PnvChipTOD {
31 DeviceState xd;
33 PnvChip *chip;
34 MemoryRegion xscom_regs;
36 bool primary;
37 bool secondary;
38 enum tod_state tod_state;
39 uint64_t tod_error;
40 uint64_t pss_mss_ctrl_reg;
41 PnvCore *slave_pc_target;
44 struct PnvChipTODClass {
45 DeviceClass parent_class;
47 void (*broadcast_ttype)(PnvChipTOD *sender, uint32_t trigger);
48 PnvCore *(*tx_ttype_target)(PnvChipTOD *chiptod, uint64_t val);
50 int xscom_size;
53 #endif /* PPC_PNV_CHIPTOD_H */