include/hw/s390x/s390-pci-inst.h

   1 /*
   2  * s390 PCI instruction definitions
   3  *
   4  * Copyright 2014 IBM Corp.
   5  * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
   6  *            Hong Bo Li <lihbbj@cn.ibm.com>
   7  *            Yi Min Zhao <zyimin@cn.ibm.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or (at
  10  * your option) any later version. See the COPYING file in the top-level
  11  * directory.
  12  */
  13
  14 #ifndef HW_S390_PCI_INST_H
  15 #define HW_S390_PCI_INST_H
  16
  17 #include "s390-pci-bus.h"
  18 #include "sysemu/dma.h"
  19
  20 /* Load/Store status codes */
  21 #define ZPCI_PCI_ST_FUNC_NOT_ENABLED        4
  22 #define ZPCI_PCI_ST_FUNC_IN_ERR             8
  23 #define ZPCI_PCI_ST_BLOCKED                 12
  24 #define ZPCI_PCI_ST_INSUF_RES               16
  25 #define ZPCI_PCI_ST_INVAL_AS                20
  26 #define ZPCI_PCI_ST_FUNC_ALREADY_ENABLED    24
  27 #define ZPCI_PCI_ST_DMA_AS_NOT_ENABLED      28
  28 #define ZPCI_PCI_ST_2ND_OP_IN_INV_AS        36
  29 #define ZPCI_PCI_ST_FUNC_NOT_AVAIL          40
  30 #define ZPCI_PCI_ST_ALREADY_IN_RQ_STATE     44
  31
  32 /* Load/Store return codes */
  33 #define ZPCI_PCI_LS_OK              0
  34 #define ZPCI_PCI_LS_ERR             1
  35 #define ZPCI_PCI_LS_BUSY            2
  36 #define ZPCI_PCI_LS_INVAL_HANDLE    3
  37
  38 /* Modify PCI status codes */
  39 #define ZPCI_MOD_ST_RES_NOT_AVAIL 4
  40 #define ZPCI_MOD_ST_INSUF_RES     16
  41 #define ZPCI_MOD_ST_SEQUENCE      24
  42 #define ZPCI_MOD_ST_DMAAS_INVAL   28
  43 #define ZPCI_MOD_ST_FRAME_INVAL   32
  44 #define ZPCI_MOD_ST_ERROR_RECOVER 40
  45
  46 /* Modify PCI Function Controls */
  47 #define ZPCI_MOD_FC_REG_INT     2
  48 #define ZPCI_MOD_FC_DEREG_INT   3
  49 #define ZPCI_MOD_FC_REG_IOAT    4
  50 #define ZPCI_MOD_FC_DEREG_IOAT  5
  51 #define ZPCI_MOD_FC_REREG_IOAT  6
  52 #define ZPCI_MOD_FC_RESET_ERROR 7
  53 #define ZPCI_MOD_FC_RESET_BLOCK 9
  54 #define ZPCI_MOD_FC_SET_MEASURE 10
  55
  56 /* Store PCI Function Controls status codes */
  57 #define ZPCI_STPCIFC_ST_PERM_ERROR    8
  58 #define ZPCI_STPCIFC_ST_INVAL_DMAAS   28
  59 #define ZPCI_STPCIFC_ST_ERROR_RECOVER 40
  60
  61 /* Refresh PCI Translations status codes */
  62 #define ZPCI_RPCIT_ST_INSUFF_RES      16
  63
  64 /* FIB function controls */
  65 #define ZPCI_FIB_FC_ENABLED     0x80
  66 #define ZPCI_FIB_FC_ERROR       0x40
  67 #define ZPCI_FIB_FC_LS_BLOCKED  0x20
  68 #define ZPCI_FIB_FC_DMAAS_REG   0x10
  69
  70 /* FIB function controls */
  71 #define ZPCI_FIB_FC_ENABLED     0x80
  72 #define ZPCI_FIB_FC_ERROR       0x40
  73 #define ZPCI_FIB_FC_LS_BLOCKED  0x20
  74 #define ZPCI_FIB_FC_DMAAS_REG   0x10
  75
  76 /* Function Information Block */
  77 typedef struct ZpciFib {
  78     uint8_t fmt;   /* format */
  79     uint8_t reserved1[7];
  80     uint8_t fc;                  /* function controls */
  81     uint8_t reserved2;
  82     uint16_t reserved3;
  83     uint32_t reserved4;
  84     uint64_t pba;                /* PCI base address */
  85     uint64_t pal;                /* PCI address limit */
  86     uint64_t iota;               /* I/O Translation Anchor */
  87 #define FIB_DATA_ISC(x)    (((x) >> 28) & 0x7)
  88 #define FIB_DATA_NOI(x)    (((x) >> 16) & 0xfff)
  89 #define FIB_DATA_AIBVO(x) (((x) >> 8) & 0x3f)
  90 #define FIB_DATA_SUM(x)    (((x) >> 7) & 0x1)
  91 #define FIB_DATA_AISBO(x)  ((x) & 0x3f)
  92     uint32_t data;
  93     uint32_t reserved5;
  94     uint64_t aibv;               /* Adapter int bit vector address */
  95     uint64_t aisb;               /* Adapter int summary bit address */
  96     uint64_t fmb_addr;           /* Function measurement address and key */
  97     uint32_t reserved6;
  98     uint32_t gd;
  99 } QEMU_PACKED ZpciFib;
 100
 101 int pci_dereg_irqs(S390PCIBusDevice *pbdev);
 102 void pci_dereg_ioat(S390PCIIOMMU *iommu);
 103 int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra);
 104 int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra);
 105 int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra);
 106 int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra);
 107 int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr,
 108                         uint8_t ar, uintptr_t ra);
 109 int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
 110                         uintptr_t ra);
 111 int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar,
 112                          uintptr_t ra);
 113 void fmb_timer_free(S390PCIBusDevice *pbdev);
 114
 115 #define ZPCI_IO_BAR_MIN 0
 116 #define ZPCI_IO_BAR_MAX 5
 117 #define ZPCI_CONFIG_BAR 15
 118
 119 #endif