Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / include / hw / timer / sifive_pwm.h
blob6a8cf7b29e4a2b640ac54726f9cad5e9daf86c4f
1 /*
2 * SiFive PWM
4 * Copyright (c) 2020 Western Digital
6 * Author: Alistair Francis <alistair.francis@wdc.com>
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
27 #ifndef HW_SIFIVE_PWM_H
28 #define HW_SIFIVE_PWM_H
30 #include "hw/sysbus.h"
31 #include "qemu/timer.h"
32 #include "qom/object.h"
34 #define TYPE_SIFIVE_PWM "sifive-pwm"
36 #define SIFIVE_PWM(obj) \
37 OBJECT_CHECK(SiFivePwmState, (obj), TYPE_SIFIVE_PWM)
39 #define SIFIVE_PWM_CHANS 4
40 #define SIFIVE_PWM_IRQS SIFIVE_PWM_CHANS
42 typedef struct SiFivePwmState {
43 /* <private> */
44 SysBusDevice parent_obj;
46 /* <public> */
47 MemoryRegion mmio;
48 QEMUTimer timer[SIFIVE_PWM_CHANS];
50 * if en bit(s) set, is the number of ticks when pwmcount was 0
51 * if en bit(s) not set, is the number of ticks in pwmcount
53 uint64_t tick_offset;
54 uint64_t freq_hz;
56 uint32_t pwmcfg;
57 uint32_t pwmcmp[SIFIVE_PWM_CHANS];
59 qemu_irq irqs[SIFIVE_PWM_IRQS];
60 } SiFivePwmState;
62 #endif /* HW_SIFIVE_PWM_H */