Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / include / hw / xen / xen-pvh-common.h
blob5cdd23c2f4d32ace4f919e4b4bd7b11856f53038
1 /*
2 * QEMU Xen PVH machine - common code.
4 * Copyright (c) 2024 Advanced Micro Devices, Inc.
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
9 #ifndef XEN_PVH_COMMON_H__
10 #define XEN_PVH_COMMON_H__
12 #include <assert.h>
13 #include "hw/sysbus.h"
14 #include "hw/hw.h"
15 #include "hw/xen/xen-hvm-common.h"
16 #include "hw/pci-host/gpex.h"
18 #define TYPE_XEN_PVH_MACHINE MACHINE_TYPE_NAME("xen-pvh-base")
19 OBJECT_DECLARE_TYPE(XenPVHMachineState, XenPVHMachineClass,
20 XEN_PVH_MACHINE)
22 struct XenPVHMachineClass {
23 MachineClass parent;
25 /* PVH implementation specific init. */
26 void (*init)(MachineState *state);
29 * set_pci_intx_irq - Deliver INTX irqs to the guest.
31 * @opaque: pointer to XenPVHMachineState.
32 * @irq: IRQ after swizzling, between 0-3.
33 * @level: IRQ level.
35 void (*set_pci_intx_irq)(void *opaque, int irq, int level);
38 * set_pci_link_route: - optional implementation call to setup
39 * routing between INTX IRQ (0 - 3) and GSI's.
41 * @line: line the INTx line (0 => A .. 3 => B)
42 * @irq: GSI
44 int (*set_pci_link_route)(uint8_t line, uint8_t irq);
46 /* Allow implementations to optionally enable buffered ioreqs. */
47 uint8_t handle_bufioreq;
50 * Each implementation can optionally enable features that it
51 * supports and are known to work.
53 bool has_pci;
54 bool has_tpm;
55 bool has_virtio_mmio;
58 struct XenPVHMachineState {
59 /*< private >*/
60 MachineState parent;
62 XenIOState ioreq;
64 struct {
65 MemoryRegion low;
66 MemoryRegion high;
67 } ram;
69 struct {
70 GPEXHost gpex;
71 MemoryRegion mmio_alias;
72 MemoryRegion mmio_high_alias;
73 } pci;
75 struct {
76 MemMapEntry ram_low, ram_high;
77 MemMapEntry tpm;
79 /* Virtio-mmio */
80 MemMapEntry virtio_mmio;
81 uint32_t virtio_mmio_num;
82 uint32_t virtio_mmio_irq_base;
84 /* PCI */
85 MemMapEntry pci_ecam, pci_mmio, pci_mmio_high;
86 uint32_t pci_intx_irq_base;
87 } cfg;
90 void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc);
91 #endif