include/standard-headers/linux/virtio_pcidev.h

   1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
   2 /*
   3  * Copyright (C) 2021 Intel Corporation
   4  * Author: Johannes Berg <johannes@sipsolutions.net>
   5  */
   6 #ifndef _LINUX_VIRTIO_PCIDEV_H
   7 #define _LINUX_VIRTIO_PCIDEV_H
   8 #include "standard-headers/linux/types.h"
   9
  10 /**
  11  * enum virtio_pcidev_ops - virtual PCI device operations
  12  * @VIRTIO_PCIDEV_OP_RESERVED: reserved to catch errors
  13  * @VIRTIO_PCIDEV_OP_CFG_READ: read config space, size is 1, 2, 4 or 8;
  14  *      the @data field should be filled in by the device (in little endian).
  15  * @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8;
  16  *      the @data field contains the data to write (in little endian).
  17  * @VIRTIO_PCIDEV_OP_MMIO_READ: read BAR mem/pio, size can be variable;
  18  *      the @data field should be filled in by the device (in little endian).
  19  * @VIRTIO_PCIDEV_OP_MMIO_WRITE: write BAR mem/pio, size can be variable;
  20  *      the @data field contains the data to write (in little endian).
  21  * @VIRTIO_PCIDEV_OP_MMIO_MEMSET: memset MMIO, size is variable but
  22  *      the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE)
  23  * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for
  24  *      the number
  25  * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports
  26  *      the 16- or 32-bit write that would otherwise be done into memory,
  27  *      analogous to the write messages (@VIRTIO_PCIDEV_OP_MMIO_WRITE) above
  28  * @VIRTIO_PCIDEV_OP_PME: Dummy message whose content is ignored (and should be
  29  *      all zeroes) to signal the PME# pin.
  30  */
  31 enum virtio_pcidev_ops {
  32         VIRTIO_PCIDEV_OP_RESERVED = 0,
  33         VIRTIO_PCIDEV_OP_CFG_READ,
  34         VIRTIO_PCIDEV_OP_CFG_WRITE,
  35         VIRTIO_PCIDEV_OP_MMIO_READ,
  36         VIRTIO_PCIDEV_OP_MMIO_WRITE,
  37         VIRTIO_PCIDEV_OP_MMIO_MEMSET,
  38         VIRTIO_PCIDEV_OP_INT,
  39         VIRTIO_PCIDEV_OP_MSI,
  40         VIRTIO_PCIDEV_OP_PME,
  41 };
  42
  43 /**
  44  * struct virtio_pcidev_msg - virtio PCI device operation
  45  * @op: the operation to do
  46  * @bar: the bar (only with BAR read/write messages)
  47  * @reserved: reserved
  48  * @size: the size of the read/write (in bytes)
  49  * @addr: the address to read/write
  50  * @data: the data, normally @size long, but just one byte for
  51  *      %VIRTIO_PCIDEV_OP_MMIO_MEMSET
  52  *
  53  * Note: the fields are all in native (CPU) endian, however, the
  54  * @data values will often be in little endian (see the ops above.)
  55  */
  56 struct virtio_pcidev_msg {
  57         uint8_t op;
  58         uint8_t bar;
  59         uint16_t reserved;
  60         uint32_t size;
  61         uint64_t addr;
  62         uint8_t data[];
  63 };
  64
  65 #endif /* _LINUX_VIRTIO_PCIDEV_H */