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Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
[qemu/armbru.git] / linux-user / elfload.c
blob6cef8db3b53674fbe618fe55dc635d3186feb8e4
1 /* This is the Linux kernel elf-loading code, ported into user space */
2 #include "qemu/osdep.h"
3 #include <sys/param.h>
4
5 #include <sys/prctl.h>
6 #include <sys/resource.h>
7 #include <sys/shm.h>
8
9 #include "qemu.h"
10 #include "user/tswap-target.h"
11 #include "exec/page-protection.h"
12 #include "user/guest-base.h"
13 #include "user-internals.h"
14 #include "signal-common.h"
15 #include "loader.h"
16 #include "user-mmap.h"
17 #include "disas/disas.h"
18 #include "qemu/bitops.h"
19 #include "qemu/path.h"
20 #include "qemu/queue.h"
21 #include "qemu/guest-random.h"
22 #include "qemu/units.h"
23 #include "qemu/selfmap.h"
24 #include "qemu/lockable.h"
25 #include "qapi/error.h"
26 #include "qemu/error-report.h"
27 #include "target_signal.h"
28 #include "tcg/debuginfo.h"
29
30 #ifdef TARGET_ARM
31 #include "target/arm/cpu-features.h"
32 #endif
33
34 #ifdef _ARCH_PPC64
35 #undef ARCH_DLINFO
36 #undef ELF_PLATFORM
37 #undef ELF_HWCAP
38 #undef ELF_HWCAP2
39 #undef ELF_CLASS
40 #undef ELF_DATA
41 #undef ELF_ARCH
42 #endif
43
44 #ifndef TARGET_ARCH_HAS_SIGTRAMP_PAGE
45 #define TARGET_ARCH_HAS_SIGTRAMP_PAGE 0
46 #endif
47
48 typedef struct {
49 const uint8_t *image;
50 const uint32_t *relocs;
51 unsigned image_size;
52 unsigned reloc_count;
53 unsigned sigreturn_ofs;
54 unsigned rt_sigreturn_ofs;
55 } VdsoImageInfo;
56
57 #define ELF_OSABI ELFOSABI_SYSV
58
59 /* from personality.h */
60
61 /*
62 * Flags for bug emulation.
63 *
64 * These occupy the top three bytes.
65 */
66 enum {
67 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
68 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to
69 descriptors (signal handling) */
70 MMAP_PAGE_ZERO = 0x0100000,
71 ADDR_COMPAT_LAYOUT = 0x0200000,
72 READ_IMPLIES_EXEC = 0x0400000,
73 ADDR_LIMIT_32BIT = 0x0800000,
74 SHORT_INODE = 0x1000000,
75 WHOLE_SECONDS = 0x2000000,
76 STICKY_TIMEOUTS = 0x4000000,
77 ADDR_LIMIT_3GB = 0x8000000,
78 };
79
80 /*
81 * Personality types.
82 *
83 * These go in the low byte. Avoid using the top bit, it will
84 * conflict with error returns.
85 */
86 enum {
87 PER_LINUX = 0x0000,
88 PER_LINUX_32BIT = 0x0000 | ADDR_LIMIT_32BIT,
89 PER_LINUX_FDPIC = 0x0000 | FDPIC_FUNCPTRS,
90 PER_SVR4 = 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
91 PER_SVR3 = 0x0002 | STICKY_TIMEOUTS | SHORT_INODE,
92 PER_SCOSVR3 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS | SHORT_INODE,
93 PER_OSR5 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS,
94 PER_WYSEV386 = 0x0004 | STICKY_TIMEOUTS | SHORT_INODE,
95 PER_ISCR4 = 0x0005 | STICKY_TIMEOUTS,
96 PER_BSD = 0x0006,
97 PER_SUNOS = 0x0006 | STICKY_TIMEOUTS,
98 PER_XENIX = 0x0007 | STICKY_TIMEOUTS | SHORT_INODE,
99 PER_LINUX32 = 0x0008,
100 PER_LINUX32_3GB = 0x0008 | ADDR_LIMIT_3GB,
101 PER_IRIX32 = 0x0009 | STICKY_TIMEOUTS,/* IRIX5 32-bit */
102 PER_IRIXN32 = 0x000a | STICKY_TIMEOUTS,/* IRIX6 new 32-bit */
103 PER_IRIX64 = 0x000b | STICKY_TIMEOUTS,/* IRIX6 64-bit */
104 PER_RISCOS = 0x000c,
105 PER_SOLARIS = 0x000d | STICKY_TIMEOUTS,
106 PER_UW7 = 0x000e | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
107 PER_OSF4 = 0x000f, /* OSF/1 v4 */
108 PER_HPUX = 0x0010,
109 PER_MASK = 0x00ff,
110 };
111
112 /*
113 * Return the base personality without flags.
114 */
115 #define personality(pers) (pers & PER_MASK)
116
117 int info_is_fdpic(struct image_info *info)
118 {
119 return info->personality == PER_LINUX_FDPIC;
120 }
121
122 /* this flag is uneffective under linux too, should be deleted */
123 #ifndef MAP_DENYWRITE
124 #define MAP_DENYWRITE 0
125 #endif
126
127 /* should probably go in elf.h */
128 #ifndef ELIBBAD
129 #define ELIBBAD 80
130 #endif
131
132 #if TARGET_BIG_ENDIAN
133 #define ELF_DATA ELFDATA2MSB
134 #else
135 #define ELF_DATA ELFDATA2LSB
136 #endif
137
138 #ifdef TARGET_ABI_MIPSN32
139 typedef abi_ullong target_elf_greg_t;
140 #define tswapreg(ptr) tswap64(ptr)
141 #else
142 typedef abi_ulong target_elf_greg_t;
143 #define tswapreg(ptr) tswapal(ptr)
144 #endif
145
146 #ifdef USE_UID16
147 typedef abi_ushort target_uid_t;
148 typedef abi_ushort target_gid_t;
149 #else
150 typedef abi_uint target_uid_t;
151 typedef abi_uint target_gid_t;
152 #endif
153 typedef abi_int target_pid_t;
154
155 #ifdef TARGET_I386
156
157 #define ELF_HWCAP get_elf_hwcap()
158
159 static uint32_t get_elf_hwcap(void)
160 {
161 X86CPU *cpu = X86_CPU(thread_cpu);
162
163 return cpu->env.features[FEAT_1_EDX];
164 }
165
166 #ifdef TARGET_X86_64
167 #define ELF_CLASS ELFCLASS64
168 #define ELF_ARCH EM_X86_64
169
170 #define ELF_PLATFORM "x86_64"
171
172 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
173 {
174 regs->rax = 0;
175 regs->rsp = infop->start_stack;
176 regs->rip = infop->entry;
177 }
178
179 #define ELF_NREG 27
180 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
181
182 /*
183 * Note that ELF_NREG should be 29 as there should be place for
184 * TRAPNO and ERR "registers" as well but linux doesn't dump
185 * those.
186 *
187 * See linux kernel: arch/x86/include/asm/elf.h
188 */
189 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
190 {
191 (*regs)[0] = tswapreg(env->regs[15]);
192 (*regs)[1] = tswapreg(env->regs[14]);
193 (*regs)[2] = tswapreg(env->regs[13]);
194 (*regs)[3] = tswapreg(env->regs[12]);
195 (*regs)[4] = tswapreg(env->regs[R_EBP]);
196 (*regs)[5] = tswapreg(env->regs[R_EBX]);
197 (*regs)[6] = tswapreg(env->regs[11]);
198 (*regs)[7] = tswapreg(env->regs[10]);
199 (*regs)[8] = tswapreg(env->regs[9]);
200 (*regs)[9] = tswapreg(env->regs[8]);
201 (*regs)[10] = tswapreg(env->regs[R_EAX]);
202 (*regs)[11] = tswapreg(env->regs[R_ECX]);
203 (*regs)[12] = tswapreg(env->regs[R_EDX]);
204 (*regs)[13] = tswapreg(env->regs[R_ESI]);
205 (*regs)[14] = tswapreg(env->regs[R_EDI]);
206 (*regs)[15] = tswapreg(get_task_state(env_cpu_const(env))->orig_ax);
207 (*regs)[16] = tswapreg(env->eip);
208 (*regs)[17] = tswapreg(env->segs[R_CS].selector & 0xffff);
209 (*regs)[18] = tswapreg(env->eflags);
210 (*regs)[19] = tswapreg(env->regs[R_ESP]);
211 (*regs)[20] = tswapreg(env->segs[R_SS].selector & 0xffff);
212 (*regs)[21] = tswapreg(env->segs[R_FS].selector & 0xffff);
213 (*regs)[22] = tswapreg(env->segs[R_GS].selector & 0xffff);
214 (*regs)[23] = tswapreg(env->segs[R_DS].selector & 0xffff);
215 (*regs)[24] = tswapreg(env->segs[R_ES].selector & 0xffff);
216 (*regs)[25] = tswapreg(env->segs[R_FS].selector & 0xffff);
217 (*regs)[26] = tswapreg(env->segs[R_GS].selector & 0xffff);
218 }
219
220 #if ULONG_MAX > UINT32_MAX
221 #define INIT_GUEST_COMMPAGE
222 static bool init_guest_commpage(void)
223 {
224 /*
225 * The vsyscall page is at a high negative address aka kernel space,
226 * which means that we cannot actually allocate it with target_mmap.
227 * We still should be able to use page_set_flags, unless the user
228 * has specified -R reserved_va, which would trigger an assert().
229 */
230 if (reserved_va != 0 &&
231 TARGET_VSYSCALL_PAGE + TARGET_PAGE_SIZE - 1 > reserved_va) {
232 error_report("Cannot allocate vsyscall page");
233 exit(EXIT_FAILURE);
234 }
235 page_set_flags(TARGET_VSYSCALL_PAGE,
236 TARGET_VSYSCALL_PAGE | ~TARGET_PAGE_MASK,
237 PAGE_EXEC | PAGE_VALID);
238 return true;
239 }
240 #endif
241 #else
242
243 /*
244 * This is used to ensure we don't load something for the wrong architecture.
245 */
246 #define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
247
248 /*
249 * These are used to set parameters in the core dumps.
250 */
251 #define ELF_CLASS ELFCLASS32
252 #define ELF_ARCH EM_386
253
254 #define ELF_PLATFORM get_elf_platform()
255 #define EXSTACK_DEFAULT true
256
257 static const char *get_elf_platform(void)
258 {
259 static char elf_platform[] = "i386";
260 int family = object_property_get_int(OBJECT(thread_cpu), "family", NULL);
261 if (family > 6) {
262 family = 6;
263 }
264 if (family >= 3) {
265 elf_platform[1] = '0' + family;
266 }
267 return elf_platform;
268 }
269
270 static inline void init_thread(struct target_pt_regs *regs,
271 struct image_info *infop)
272 {
273 regs->esp = infop->start_stack;
274 regs->eip = infop->entry;
275
276 /* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program
277 starts %edx contains a pointer to a function which might be
278 registered using `atexit'. This provides a mean for the
279 dynamic linker to call DT_FINI functions for shared libraries
280 that have been loaded before the code runs.
281
282 A value of 0 tells we have no such handler. */
283 regs->edx = 0;
284 }
285
286 #define ELF_NREG 17
287 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
288
289 /*
290 * Note that ELF_NREG should be 19 as there should be place for
291 * TRAPNO and ERR "registers" as well but linux doesn't dump
292 * those.
293 *
294 * See linux kernel: arch/x86/include/asm/elf.h
295 */
296 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
297 {
298 (*regs)[0] = tswapreg(env->regs[R_EBX]);
299 (*regs)[1] = tswapreg(env->regs[R_ECX]);
300 (*regs)[2] = tswapreg(env->regs[R_EDX]);
301 (*regs)[3] = tswapreg(env->regs[R_ESI]);
302 (*regs)[4] = tswapreg(env->regs[R_EDI]);
303 (*regs)[5] = tswapreg(env->regs[R_EBP]);
304 (*regs)[6] = tswapreg(env->regs[R_EAX]);
305 (*regs)[7] = tswapreg(env->segs[R_DS].selector & 0xffff);
306 (*regs)[8] = tswapreg(env->segs[R_ES].selector & 0xffff);
307 (*regs)[9] = tswapreg(env->segs[R_FS].selector & 0xffff);
308 (*regs)[10] = tswapreg(env->segs[R_GS].selector & 0xffff);
309 (*regs)[11] = tswapreg(get_task_state(env_cpu_const(env))->orig_ax);
310 (*regs)[12] = tswapreg(env->eip);
311 (*regs)[13] = tswapreg(env->segs[R_CS].selector & 0xffff);
312 (*regs)[14] = tswapreg(env->eflags);
313 (*regs)[15] = tswapreg(env->regs[R_ESP]);
314 (*regs)[16] = tswapreg(env->segs[R_SS].selector & 0xffff);
315 }
316
317 /*
318 * i386 is the only target which supplies AT_SYSINFO for the vdso.
319 * All others only supply AT_SYSINFO_EHDR.
320 */
321 #define DLINFO_ARCH_ITEMS (vdso_info != NULL)
322 #define ARCH_DLINFO \
323 do { \
324 if (vdso_info) { \
325 NEW_AUX_ENT(AT_SYSINFO, vdso_info->entry); \
326 } \
327 } while (0)
328
329 #endif /* TARGET_X86_64 */
330
331 #define VDSO_HEADER "vdso.c.inc"
332
333 #define USE_ELF_CORE_DUMP
334 #define ELF_EXEC_PAGESIZE 4096
335
336 #endif /* TARGET_I386 */
337
338 #ifdef TARGET_ARM
339
340 #ifndef TARGET_AARCH64
341 /* 32 bit ARM definitions */
342
343 #define ELF_ARCH EM_ARM
344 #define ELF_CLASS ELFCLASS32
345 #define EXSTACK_DEFAULT true
346
347 static inline void init_thread(struct target_pt_regs *regs,
348 struct image_info *infop)
349 {
350 abi_long stack = infop->start_stack;
351 memset(regs, 0, sizeof(*regs));
352
353 regs->uregs[16] = ARM_CPU_MODE_USR;
354 if (infop->entry & 1) {
355 regs->uregs[16] |= CPSR_T;
356 }
357 regs->uregs[15] = infop->entry & 0xfffffffe;
358 regs->uregs[13] = infop->start_stack;
359 /* FIXME - what to for failure of get_user()? */
360 get_user_ual(regs->uregs[2], stack + 8); /* envp */
361 get_user_ual(regs->uregs[1], stack + 4); /* envp */
362 /* XXX: it seems that r0 is zeroed after ! */
363 regs->uregs[0] = 0;
364 /* For uClinux PIC binaries. */
365 /* XXX: Linux does this only on ARM with no MMU (do we care ?) */
366 regs->uregs[10] = infop->start_data;
367
368 /* Support ARM FDPIC. */
369 if (info_is_fdpic(infop)) {
370 /* As described in the ABI document, r7 points to the loadmap info
371 * prepared by the kernel. If an interpreter is needed, r8 points
372 * to the interpreter loadmap and r9 points to the interpreter
373 * PT_DYNAMIC info. If no interpreter is needed, r8 is zero, and
374 * r9 points to the main program PT_DYNAMIC info.
375 */
376 regs->uregs[7] = infop->loadmap_addr;
377 if (infop->interpreter_loadmap_addr) {
378 /* Executable is dynamically loaded. */
379 regs->uregs[8] = infop->interpreter_loadmap_addr;
380 regs->uregs[9] = infop->interpreter_pt_dynamic_addr;
381 } else {
382 regs->uregs[8] = 0;
383 regs->uregs[9] = infop->pt_dynamic_addr;
384 }
385 }
386 }
387
388 #define ELF_NREG 18
389 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
390
391 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUARMState *env)
392 {
393 (*regs)[0] = tswapreg(env->regs[0]);
394 (*regs)[1] = tswapreg(env->regs[1]);
395 (*regs)[2] = tswapreg(env->regs[2]);
396 (*regs)[3] = tswapreg(env->regs[3]);
397 (*regs)[4] = tswapreg(env->regs[4]);
398 (*regs)[5] = tswapreg(env->regs[5]);
399 (*regs)[6] = tswapreg(env->regs[6]);
400 (*regs)[7] = tswapreg(env->regs[7]);
401 (*regs)[8] = tswapreg(env->regs[8]);
402 (*regs)[9] = tswapreg(env->regs[9]);
403 (*regs)[10] = tswapreg(env->regs[10]);
404 (*regs)[11] = tswapreg(env->regs[11]);
405 (*regs)[12] = tswapreg(env->regs[12]);
406 (*regs)[13] = tswapreg(env->regs[13]);
407 (*regs)[14] = tswapreg(env->regs[14]);
408 (*regs)[15] = tswapreg(env->regs[15]);
409
410 (*regs)[16] = tswapreg(cpsr_read((CPUARMState *)env));
411 (*regs)[17] = tswapreg(env->regs[0]); /* XXX */
412 }
413
414 #define USE_ELF_CORE_DUMP
415 #define ELF_EXEC_PAGESIZE 4096
416
417 enum
418 {
419 ARM_HWCAP_ARM_SWP = 1 << 0,
420 ARM_HWCAP_ARM_HALF = 1 << 1,
421 ARM_HWCAP_ARM_THUMB = 1 << 2,
422 ARM_HWCAP_ARM_26BIT = 1 << 3,
423 ARM_HWCAP_ARM_FAST_MULT = 1 << 4,
424 ARM_HWCAP_ARM_FPA = 1 << 5,
425 ARM_HWCAP_ARM_VFP = 1 << 6,
426 ARM_HWCAP_ARM_EDSP = 1 << 7,
427 ARM_HWCAP_ARM_JAVA = 1 << 8,
428 ARM_HWCAP_ARM_IWMMXT = 1 << 9,
429 ARM_HWCAP_ARM_CRUNCH = 1 << 10,
430 ARM_HWCAP_ARM_THUMBEE = 1 << 11,
431 ARM_HWCAP_ARM_NEON = 1 << 12,
432 ARM_HWCAP_ARM_VFPv3 = 1 << 13,
433 ARM_HWCAP_ARM_VFPv3D16 = 1 << 14,
434 ARM_HWCAP_ARM_TLS = 1 << 15,
435 ARM_HWCAP_ARM_VFPv4 = 1 << 16,
436 ARM_HWCAP_ARM_IDIVA = 1 << 17,
437 ARM_HWCAP_ARM_IDIVT = 1 << 18,
438 ARM_HWCAP_ARM_VFPD32 = 1 << 19,
439 ARM_HWCAP_ARM_LPAE = 1 << 20,
440 ARM_HWCAP_ARM_EVTSTRM = 1 << 21,
441 ARM_HWCAP_ARM_FPHP = 1 << 22,
442 ARM_HWCAP_ARM_ASIMDHP = 1 << 23,
443 ARM_HWCAP_ARM_ASIMDDP = 1 << 24,
444 ARM_HWCAP_ARM_ASIMDFHM = 1 << 25,
445 ARM_HWCAP_ARM_ASIMDBF16 = 1 << 26,
446 ARM_HWCAP_ARM_I8MM = 1 << 27,
447 };
448
449 enum {
450 ARM_HWCAP2_ARM_AES = 1 << 0,
451 ARM_HWCAP2_ARM_PMULL = 1 << 1,
452 ARM_HWCAP2_ARM_SHA1 = 1 << 2,
453 ARM_HWCAP2_ARM_SHA2 = 1 << 3,
454 ARM_HWCAP2_ARM_CRC32 = 1 << 4,
455 ARM_HWCAP2_ARM_SB = 1 << 5,
456 ARM_HWCAP2_ARM_SSBS = 1 << 6,
457 };
458
459 /* The commpage only exists for 32 bit kernels */
460
461 #define HI_COMMPAGE (intptr_t)0xffff0f00u
462
463 static bool init_guest_commpage(void)
464 {
465 ARMCPU *cpu = ARM_CPU(thread_cpu);
466 int host_page_size = qemu_real_host_page_size();
467 abi_ptr commpage;
468 void *want;
469 void *addr;
470
471 /*
472 * M-profile allocates maximum of 2GB address space, so can never
473 * allocate the commpage. Skip it.
474 */
475 if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
476 return true;
477 }
478
479 commpage = HI_COMMPAGE & -host_page_size;
480 want = g2h_untagged(commpage);
481 addr = mmap(want, host_page_size, PROT_READ | PROT_WRITE,
482 MAP_ANONYMOUS | MAP_PRIVATE |
483 (commpage < reserved_va ? MAP_FIXED : MAP_FIXED_NOREPLACE),
484 -1, 0);
485
486 if (addr == MAP_FAILED) {
487 perror("Allocating guest commpage");
488 exit(EXIT_FAILURE);
489 }
490 if (addr != want) {
491 return false;
492 }
493
494 /* Set kernel helper versions; rest of page is 0. */
495 __put_user(5, (uint32_t *)g2h_untagged(0xffff0ffcu));
496
497 if (mprotect(addr, host_page_size, PROT_READ)) {
498 perror("Protecting guest commpage");
499 exit(EXIT_FAILURE);
500 }
501
502 page_set_flags(commpage, commpage | (host_page_size - 1),
503 PAGE_READ | PAGE_EXEC | PAGE_VALID);
504 return true;
505 }
506
507 #define ELF_HWCAP get_elf_hwcap()
508 #define ELF_HWCAP2 get_elf_hwcap2()
509
510 uint32_t get_elf_hwcap(void)
511 {
512 ARMCPU *cpu = ARM_CPU(thread_cpu);
513 uint32_t hwcaps = 0;
514
515 hwcaps |= ARM_HWCAP_ARM_SWP;
516 hwcaps |= ARM_HWCAP_ARM_HALF;
517 hwcaps |= ARM_HWCAP_ARM_THUMB;
518 hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
519
520 /* probe for the extra features */
521 #define GET_FEATURE(feat, hwcap) \
522 do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
523
524 #define GET_FEATURE_ID(feat, hwcap) \
525 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
526
527 /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */
528 GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
529 GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
530 GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
531 GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
532 GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
533 GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE);
534 GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA);
535 GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT);
536 GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP);
537
538 if (cpu_isar_feature(aa32_fpsp_v3, cpu) ||
539 cpu_isar_feature(aa32_fpdp_v3, cpu)) {
540 hwcaps |= ARM_HWCAP_ARM_VFPv3;
541 if (cpu_isar_feature(aa32_simd_r32, cpu)) {
542 hwcaps |= ARM_HWCAP_ARM_VFPD32;
543 } else {
544 hwcaps |= ARM_HWCAP_ARM_VFPv3D16;
545 }
546 }
547 GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4);
548 /*
549 * MVFR1.FPHP and .SIMDHP must be in sync, and QEMU uses the same
550 * isar_feature function for both. The kernel reports them as two hwcaps.
551 */
552 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_FPHP);
553 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_ASIMDHP);
554 GET_FEATURE_ID(aa32_dp, ARM_HWCAP_ARM_ASIMDDP);
555 GET_FEATURE_ID(aa32_fhm, ARM_HWCAP_ARM_ASIMDFHM);
556 GET_FEATURE_ID(aa32_bf16, ARM_HWCAP_ARM_ASIMDBF16);
557 GET_FEATURE_ID(aa32_i8mm, ARM_HWCAP_ARM_I8MM);
558
559 return hwcaps;
560 }
561
562 uint64_t get_elf_hwcap2(void)
563 {
564 ARMCPU *cpu = ARM_CPU(thread_cpu);
565 uint64_t hwcaps = 0;
566
567 GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES);
568 GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL);
569 GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1);
570 GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2);
571 GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32);
572 GET_FEATURE_ID(aa32_sb, ARM_HWCAP2_ARM_SB);
573 GET_FEATURE_ID(aa32_ssbs, ARM_HWCAP2_ARM_SSBS);
574 return hwcaps;
575 }
576
577 const char *elf_hwcap_str(uint32_t bit)
578 {
579 static const char *hwcap_str[] = {
580 [__builtin_ctz(ARM_HWCAP_ARM_SWP )] = "swp",
581 [__builtin_ctz(ARM_HWCAP_ARM_HALF )] = "half",
582 [__builtin_ctz(ARM_HWCAP_ARM_THUMB )] = "thumb",
583 [__builtin_ctz(ARM_HWCAP_ARM_26BIT )] = "26bit",
584 [__builtin_ctz(ARM_HWCAP_ARM_FAST_MULT)] = "fast_mult",
585 [__builtin_ctz(ARM_HWCAP_ARM_FPA )] = "fpa",
586 [__builtin_ctz(ARM_HWCAP_ARM_VFP )] = "vfp",
587 [__builtin_ctz(ARM_HWCAP_ARM_EDSP )] = "edsp",
588 [__builtin_ctz(ARM_HWCAP_ARM_JAVA )] = "java",
589 [__builtin_ctz(ARM_HWCAP_ARM_IWMMXT )] = "iwmmxt",
590 [__builtin_ctz(ARM_HWCAP_ARM_CRUNCH )] = "crunch",
591 [__builtin_ctz(ARM_HWCAP_ARM_THUMBEE )] = "thumbee",
592 [__builtin_ctz(ARM_HWCAP_ARM_NEON )] = "neon",
593 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3 )] = "vfpv3",
594 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3D16 )] = "vfpv3d16",
595 [__builtin_ctz(ARM_HWCAP_ARM_TLS )] = "tls",
596 [__builtin_ctz(ARM_HWCAP_ARM_VFPv4 )] = "vfpv4",
597 [__builtin_ctz(ARM_HWCAP_ARM_IDIVA )] = "idiva",
598 [__builtin_ctz(ARM_HWCAP_ARM_IDIVT )] = "idivt",
599 [__builtin_ctz(ARM_HWCAP_ARM_VFPD32 )] = "vfpd32",
600 [__builtin_ctz(ARM_HWCAP_ARM_LPAE )] = "lpae",
601 [__builtin_ctz(ARM_HWCAP_ARM_EVTSTRM )] = "evtstrm",
602 [__builtin_ctz(ARM_HWCAP_ARM_FPHP )] = "fphp",
603 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDHP )] = "asimdhp",
604 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDDP )] = "asimddp",
605 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDFHM )] = "asimdfhm",
606 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDBF16)] = "asimdbf16",
607 [__builtin_ctz(ARM_HWCAP_ARM_I8MM )] = "i8mm",
608 };
609
610 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
611 }
612
613 const char *elf_hwcap2_str(uint32_t bit)
614 {
615 static const char *hwcap_str[] = {
616 [__builtin_ctz(ARM_HWCAP2_ARM_AES )] = "aes",
617 [__builtin_ctz(ARM_HWCAP2_ARM_PMULL)] = "pmull",
618 [__builtin_ctz(ARM_HWCAP2_ARM_SHA1 )] = "sha1",
619 [__builtin_ctz(ARM_HWCAP2_ARM_SHA2 )] = "sha2",
620 [__builtin_ctz(ARM_HWCAP2_ARM_CRC32)] = "crc32",
621 [__builtin_ctz(ARM_HWCAP2_ARM_SB )] = "sb",
622 [__builtin_ctz(ARM_HWCAP2_ARM_SSBS )] = "ssbs",
623 };
624
625 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
626 }
627
628 #undef GET_FEATURE
629 #undef GET_FEATURE_ID
630
631 #define ELF_PLATFORM get_elf_platform()
632
633 static const char *get_elf_platform(void)
634 {
635 CPUARMState *env = cpu_env(thread_cpu);
636
637 #if TARGET_BIG_ENDIAN
638 # define END "b"
639 #else
640 # define END "l"
641 #endif
642
643 if (arm_feature(env, ARM_FEATURE_V8)) {
644 return "v8" END;
645 } else if (arm_feature(env, ARM_FEATURE_V7)) {
646 if (arm_feature(env, ARM_FEATURE_M)) {
647 return "v7m" END;
648 } else {
649 return "v7" END;
650 }
651 } else if (arm_feature(env, ARM_FEATURE_V6)) {
652 return "v6" END;
653 } else if (arm_feature(env, ARM_FEATURE_V5)) {
654 return "v5" END;
655 } else {
656 return "v4" END;
657 }
658
659 #undef END
660 }
661
662 #else
663 /* 64 bit ARM definitions */
664
665 #define ELF_ARCH EM_AARCH64
666 #define ELF_CLASS ELFCLASS64
667 #if TARGET_BIG_ENDIAN
668 # define ELF_PLATFORM "aarch64_be"
669 #else
670 # define ELF_PLATFORM "aarch64"
671 #endif
672
673 static inline void init_thread(struct target_pt_regs *regs,
674 struct image_info *infop)
675 {
676 abi_long stack = infop->start_stack;
677 memset(regs, 0, sizeof(*regs));
678
679 regs->pc = infop->entry & ~0x3ULL;
680 regs->sp = stack;
681 }
682
683 #define ELF_NREG 34
684 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
685
686 static void elf_core_copy_regs(target_elf_gregset_t *regs,
687 const CPUARMState *env)
688 {
689 int i;
690
691 for (i = 0; i < 32; i++) {
692 (*regs)[i] = tswapreg(env->xregs[i]);
693 }
694 (*regs)[32] = tswapreg(env->pc);
695 (*regs)[33] = tswapreg(pstate_read((CPUARMState *)env));
696 }
697
698 #define USE_ELF_CORE_DUMP
699 #define ELF_EXEC_PAGESIZE 4096
700
701 enum {
702 ARM_HWCAP_A64_FP = 1 << 0,
703 ARM_HWCAP_A64_ASIMD = 1 << 1,
704 ARM_HWCAP_A64_EVTSTRM = 1 << 2,
705 ARM_HWCAP_A64_AES = 1 << 3,
706 ARM_HWCAP_A64_PMULL = 1 << 4,
707 ARM_HWCAP_A64_SHA1 = 1 << 5,
708 ARM_HWCAP_A64_SHA2 = 1 << 6,
709 ARM_HWCAP_A64_CRC32 = 1 << 7,
710 ARM_HWCAP_A64_ATOMICS = 1 << 8,
711 ARM_HWCAP_A64_FPHP = 1 << 9,
712 ARM_HWCAP_A64_ASIMDHP = 1 << 10,
713 ARM_HWCAP_A64_CPUID = 1 << 11,
714 ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
715 ARM_HWCAP_A64_JSCVT = 1 << 13,
716 ARM_HWCAP_A64_FCMA = 1 << 14,
717 ARM_HWCAP_A64_LRCPC = 1 << 15,
718 ARM_HWCAP_A64_DCPOP = 1 << 16,
719 ARM_HWCAP_A64_SHA3 = 1 << 17,
720 ARM_HWCAP_A64_SM3 = 1 << 18,
721 ARM_HWCAP_A64_SM4 = 1 << 19,
722 ARM_HWCAP_A64_ASIMDDP = 1 << 20,
723 ARM_HWCAP_A64_SHA512 = 1 << 21,
724 ARM_HWCAP_A64_SVE = 1 << 22,
725 ARM_HWCAP_A64_ASIMDFHM = 1 << 23,
726 ARM_HWCAP_A64_DIT = 1 << 24,
727 ARM_HWCAP_A64_USCAT = 1 << 25,
728 ARM_HWCAP_A64_ILRCPC = 1 << 26,
729 ARM_HWCAP_A64_FLAGM = 1 << 27,
730 ARM_HWCAP_A64_SSBS = 1 << 28,
731 ARM_HWCAP_A64_SB = 1 << 29,
732 ARM_HWCAP_A64_PACA = 1 << 30,
733 ARM_HWCAP_A64_PACG = 1UL << 31,
734
735 ARM_HWCAP2_A64_DCPODP = 1 << 0,
736 ARM_HWCAP2_A64_SVE2 = 1 << 1,
737 ARM_HWCAP2_A64_SVEAES = 1 << 2,
738 ARM_HWCAP2_A64_SVEPMULL = 1 << 3,
739 ARM_HWCAP2_A64_SVEBITPERM = 1 << 4,
740 ARM_HWCAP2_A64_SVESHA3 = 1 << 5,
741 ARM_HWCAP2_A64_SVESM4 = 1 << 6,
742 ARM_HWCAP2_A64_FLAGM2 = 1 << 7,
743 ARM_HWCAP2_A64_FRINT = 1 << 8,
744 ARM_HWCAP2_A64_SVEI8MM = 1 << 9,
745 ARM_HWCAP2_A64_SVEF32MM = 1 << 10,
746 ARM_HWCAP2_A64_SVEF64MM = 1 << 11,
747 ARM_HWCAP2_A64_SVEBF16 = 1 << 12,
748 ARM_HWCAP2_A64_I8MM = 1 << 13,
749 ARM_HWCAP2_A64_BF16 = 1 << 14,
750 ARM_HWCAP2_A64_DGH = 1 << 15,
751 ARM_HWCAP2_A64_RNG = 1 << 16,
752 ARM_HWCAP2_A64_BTI = 1 << 17,
753 ARM_HWCAP2_A64_MTE = 1 << 18,
754 ARM_HWCAP2_A64_ECV = 1 << 19,
755 ARM_HWCAP2_A64_AFP = 1 << 20,
756 ARM_HWCAP2_A64_RPRES = 1 << 21,
757 ARM_HWCAP2_A64_MTE3 = 1 << 22,
758 ARM_HWCAP2_A64_SME = 1 << 23,
759 ARM_HWCAP2_A64_SME_I16I64 = 1 << 24,
760 ARM_HWCAP2_A64_SME_F64F64 = 1 << 25,
761 ARM_HWCAP2_A64_SME_I8I32 = 1 << 26,
762 ARM_HWCAP2_A64_SME_F16F32 = 1 << 27,
763 ARM_HWCAP2_A64_SME_B16F32 = 1 << 28,
764 ARM_HWCAP2_A64_SME_F32F32 = 1 << 29,
765 ARM_HWCAP2_A64_SME_FA64 = 1 << 30,
766 ARM_HWCAP2_A64_WFXT = 1ULL << 31,
767 ARM_HWCAP2_A64_EBF16 = 1ULL << 32,
768 ARM_HWCAP2_A64_SVE_EBF16 = 1ULL << 33,
769 ARM_HWCAP2_A64_CSSC = 1ULL << 34,
770 ARM_HWCAP2_A64_RPRFM = 1ULL << 35,
771 ARM_HWCAP2_A64_SVE2P1 = 1ULL << 36,
772 ARM_HWCAP2_A64_SME2 = 1ULL << 37,
773 ARM_HWCAP2_A64_SME2P1 = 1ULL << 38,
774 ARM_HWCAP2_A64_SME_I16I32 = 1ULL << 39,
775 ARM_HWCAP2_A64_SME_BI32I32 = 1ULL << 40,
776 ARM_HWCAP2_A64_SME_B16B16 = 1ULL << 41,
777 ARM_HWCAP2_A64_SME_F16F16 = 1ULL << 42,
778 ARM_HWCAP2_A64_MOPS = 1ULL << 43,
779 ARM_HWCAP2_A64_HBC = 1ULL << 44,
780 };
781
782 #define ELF_HWCAP get_elf_hwcap()
783 #define ELF_HWCAP2 get_elf_hwcap2()
784
785 #define GET_FEATURE_ID(feat, hwcap) \
786 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
787
788 uint32_t get_elf_hwcap(void)
789 {
790 ARMCPU *cpu = ARM_CPU(thread_cpu);
791 uint32_t hwcaps = 0;
792
793 hwcaps |= ARM_HWCAP_A64_FP;
794 hwcaps |= ARM_HWCAP_A64_ASIMD;
795 hwcaps |= ARM_HWCAP_A64_CPUID;
796
797 /* probe for the extra features */
798
799 GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES);
800 GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL);
801 GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1);
802 GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2);
803 GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512);
804 GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32);
805 GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3);
806 GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3);
807 GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
808 GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
809 GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS);
810 GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT);
811 GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
812 GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
813 GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
814 GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
815 GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
816 GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
817 GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT);
818 GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
819 GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
820 GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
821 GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP);
822 GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC);
823 GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC);
824
825 return hwcaps;
826 }
827
828 uint64_t get_elf_hwcap2(void)
829 {
830 ARMCPU *cpu = ARM_CPU(thread_cpu);
831 uint64_t hwcaps = 0;
832
833 GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
834 GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2);
835 GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES);
836 GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL);
837 GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM);
838 GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3);
839 GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4);
840 GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
841 GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
842 GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM);
843 GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM);
844 GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM);
845 GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16);
846 GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM);
847 GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16);
848 GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
849 GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
850 GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
851 GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3);
852 GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME |
853 ARM_HWCAP2_A64_SME_F32F32 |
854 ARM_HWCAP2_A64_SME_B16F32 |
855 ARM_HWCAP2_A64_SME_F16F32 |
856 ARM_HWCAP2_A64_SME_I8I32));
857 GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64);
858 GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64);
859 GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64);
860 GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC);
861 GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS);
862
863 return hwcaps;
864 }
865
866 const char *elf_hwcap_str(uint32_t bit)
867 {
868 static const char *hwcap_str[] = {
869 [__builtin_ctz(ARM_HWCAP_A64_FP )] = "fp",
870 [__builtin_ctz(ARM_HWCAP_A64_ASIMD )] = "asimd",
871 [__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] = "evtstrm",
872 [__builtin_ctz(ARM_HWCAP_A64_AES )] = "aes",
873 [__builtin_ctz(ARM_HWCAP_A64_PMULL )] = "pmull",
874 [__builtin_ctz(ARM_HWCAP_A64_SHA1 )] = "sha1",
875 [__builtin_ctz(ARM_HWCAP_A64_SHA2 )] = "sha2",
876 [__builtin_ctz(ARM_HWCAP_A64_CRC32 )] = "crc32",
877 [__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] = "atomics",
878 [__builtin_ctz(ARM_HWCAP_A64_FPHP )] = "fphp",
879 [__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] = "asimdhp",
880 [__builtin_ctz(ARM_HWCAP_A64_CPUID )] = "cpuid",
881 [__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] = "asimdrdm",
882 [__builtin_ctz(ARM_HWCAP_A64_JSCVT )] = "jscvt",
883 [__builtin_ctz(ARM_HWCAP_A64_FCMA )] = "fcma",
884 [__builtin_ctz(ARM_HWCAP_A64_LRCPC )] = "lrcpc",
885 [__builtin_ctz(ARM_HWCAP_A64_DCPOP )] = "dcpop",
886 [__builtin_ctz(ARM_HWCAP_A64_SHA3 )] = "sha3",
887 [__builtin_ctz(ARM_HWCAP_A64_SM3 )] = "sm3",
888 [__builtin_ctz(ARM_HWCAP_A64_SM4 )] = "sm4",
889 [__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] = "asimddp",
890 [__builtin_ctz(ARM_HWCAP_A64_SHA512 )] = "sha512",
891 [__builtin_ctz(ARM_HWCAP_A64_SVE )] = "sve",
892 [__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] = "asimdfhm",
893 [__builtin_ctz(ARM_HWCAP_A64_DIT )] = "dit",
894 [__builtin_ctz(ARM_HWCAP_A64_USCAT )] = "uscat",
895 [__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] = "ilrcpc",
896 [__builtin_ctz(ARM_HWCAP_A64_FLAGM )] = "flagm",
897 [__builtin_ctz(ARM_HWCAP_A64_SSBS )] = "ssbs",
898 [__builtin_ctz(ARM_HWCAP_A64_SB )] = "sb",
899 [__builtin_ctz(ARM_HWCAP_A64_PACA )] = "paca",
900 [__builtin_ctz(ARM_HWCAP_A64_PACG )] = "pacg",
901 };
902
903 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
904 }
905
906 const char *elf_hwcap2_str(uint32_t bit)
907 {
908 static const char *hwcap_str[] = {
909 [__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] = "dcpodp",
910 [__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] = "sve2",
911 [__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] = "sveaes",
912 [__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] = "svepmull",
913 [__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] = "svebitperm",
914 [__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] = "svesha3",
915 [__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] = "svesm4",
916 [__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] = "flagm2",
917 [__builtin_ctz(ARM_HWCAP2_A64_FRINT )] = "frint",
918 [__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] = "svei8mm",
919 [__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] = "svef32mm",
920 [__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] = "svef64mm",
921 [__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] = "svebf16",
922 [__builtin_ctz(ARM_HWCAP2_A64_I8MM )] = "i8mm",
923 [__builtin_ctz(ARM_HWCAP2_A64_BF16 )] = "bf16",
924 [__builtin_ctz(ARM_HWCAP2_A64_DGH )] = "dgh",
925 [__builtin_ctz(ARM_HWCAP2_A64_RNG )] = "rng",
926 [__builtin_ctz(ARM_HWCAP2_A64_BTI )] = "bti",
927 [__builtin_ctz(ARM_HWCAP2_A64_MTE )] = "mte",
928 [__builtin_ctz(ARM_HWCAP2_A64_ECV )] = "ecv",
929 [__builtin_ctz(ARM_HWCAP2_A64_AFP )] = "afp",
930 [__builtin_ctz(ARM_HWCAP2_A64_RPRES )] = "rpres",
931 [__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] = "mte3",
932 [__builtin_ctz(ARM_HWCAP2_A64_SME )] = "sme",
933 [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] = "smei16i64",
934 [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] = "smef64f64",
935 [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] = "smei8i32",
936 [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] = "smef16f32",
937 [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] = "smeb16f32",
938 [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] = "smef32f32",
939 [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] = "smefa64",
940 [__builtin_ctz(ARM_HWCAP2_A64_WFXT )] = "wfxt",
941 [__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] = "ebf16",
942 [__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] = "sveebf16",
943 [__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] = "cssc",
944 [__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] = "rprfm",
945 [__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] = "sve2p1",
946 [__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] = "sme2",
947 [__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] = "sme2p1",
948 [__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] = "smei16i32",
949 [__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] = "smebi32i32",
950 [__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] = "smeb16b16",
951 [__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] = "smef16f16",
952 [__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] = "mops",
953 [__builtin_ctzll(ARM_HWCAP2_A64_HBC )] = "hbc",
954 };
955
956 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
957 }
958
959 #undef GET_FEATURE_ID
960
961 #endif /* not TARGET_AARCH64 */
962
963 #if TARGET_BIG_ENDIAN
964 # define VDSO_HEADER "vdso-be.c.inc"
965 #else
966 # define VDSO_HEADER "vdso-le.c.inc"
967 #endif
968
969 #endif /* TARGET_ARM */
970
971 #ifdef TARGET_SPARC
972
973 #ifndef TARGET_SPARC64
974 # define ELF_CLASS ELFCLASS32
975 # define ELF_ARCH EM_SPARC
976 #elif defined(TARGET_ABI32)
977 # define ELF_CLASS ELFCLASS32
978 # define elf_check_arch(x) ((x) == EM_SPARC32PLUS || (x) == EM_SPARC)
979 #else
980 # define ELF_CLASS ELFCLASS64
981 # define ELF_ARCH EM_SPARCV9
982 #endif
983
984 #include "elf.h"
985
986 #define ELF_HWCAP get_elf_hwcap()
987
988 static uint32_t get_elf_hwcap(void)
989 {
990 /* There are not many sparc32 hwcap bits -- we have all of them. */
991 uint32_t r = HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
992 HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV;
993
994 #ifdef TARGET_SPARC64
995 CPUSPARCState *env = cpu_env(thread_cpu);
996 uint32_t features = env->def.features;
997
998 r |= HWCAP_SPARC_V9 | HWCAP_SPARC_V8PLUS;
999 /* 32x32 multiply and divide are efficient. */
1000 r |= HWCAP_SPARC_MUL32 | HWCAP_SPARC_DIV32;
1001 /* We don't have an internal feature bit for this. */
1002 r |= HWCAP_SPARC_POPC;
1003 r |= features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0;
1004 r |= features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0;
1005 r |= features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0;
1006 r |= features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0;
1007 r |= features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0;
1008 r |= features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0;
1009 #endif
1010
1011 return r;
1012 }
1013
1014 static inline void init_thread(struct target_pt_regs *regs,
1015 struct image_info *infop)
1016 {
1017 /* Note that target_cpu_copy_regs does not read psr/tstate. */
1018 regs->pc = infop->entry;
1019 regs->npc = regs->pc + 4;
1020 regs->y = 0;
1021 regs->u_regs[14] = (infop->start_stack - 16 * sizeof(abi_ulong)
1022 - TARGET_STACK_BIAS);
1023 }
1024 #endif /* TARGET_SPARC */
1025
1026 #ifdef TARGET_PPC
1027
1028 #define ELF_MACHINE PPC_ELF_MACHINE
1029
1030 #if defined(TARGET_PPC64)
1031
1032 #define elf_check_arch(x) ( (x) == EM_PPC64 )
1033
1034 #define ELF_CLASS ELFCLASS64
1035
1036 #else
1037
1038 #define ELF_CLASS ELFCLASS32
1039 #define EXSTACK_DEFAULT true
1040
1041 #endif
1042
1043 #define ELF_ARCH EM_PPC
1044
1045 /* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
1046 See arch/powerpc/include/asm/cputable.h. */
1047 enum {
1048 QEMU_PPC_FEATURE_32 = 0x80000000,
1049 QEMU_PPC_FEATURE_64 = 0x40000000,
1050 QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
1051 QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
1052 QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
1053 QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
1054 QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
1055 QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
1056 QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
1057 QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
1058 QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
1059 QEMU_PPC_FEATURE_NO_TB = 0x00100000,
1060 QEMU_PPC_FEATURE_POWER4 = 0x00080000,
1061 QEMU_PPC_FEATURE_POWER5 = 0x00040000,
1062 QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
1063 QEMU_PPC_FEATURE_CELL = 0x00010000,
1064 QEMU_PPC_FEATURE_BOOKE = 0x00008000,
1065 QEMU_PPC_FEATURE_SMT = 0x00004000,
1066 QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
1067 QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
1068 QEMU_PPC_FEATURE_PA6T = 0x00000800,
1069 QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
1070 QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
1071 QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
1072 QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
1073 QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
1074
1075 QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
1076 QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
1077
1078 /* Feature definitions in AT_HWCAP2. */
1079 QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
1080 QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
1081 QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
1082 QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
1083 QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
1084 QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
1085 QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
1086 QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
1087 QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
1088 QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */
1089 QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
1090 QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
1091 QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
1092 QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
1093 QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
1094 };
1095
1096 #define ELF_HWCAP get_elf_hwcap()
1097
1098 static uint32_t get_elf_hwcap(void)
1099 {
1100 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
1101 uint32_t features = 0;
1102
1103 /* We don't have to be terribly complete here; the high points are
1104 Altivec/FP/SPE support. Anything else is just a bonus. */
1105 #define GET_FEATURE(flag, feature) \
1106 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
1107 #define GET_FEATURE2(flags, feature) \
1108 do { \
1109 if ((cpu->env.insns_flags2 & flags) == flags) { \
1110 features |= feature; \
1111 } \
1112 } while (0)
1113 GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
1114 GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
1115 GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
1116 GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE);
1117 GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE);
1118 GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE);
1119 GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE);
1120 GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC);
1121 GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP);
1122 GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX);
1123 GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |
1124 PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206),
1125 QEMU_PPC_FEATURE_ARCH_2_06);
1126 #undef GET_FEATURE
1127 #undef GET_FEATURE2
1128
1129 return features;
1130 }
1131
1132 #define ELF_HWCAP2 get_elf_hwcap2()
1133
1134 static uint32_t get_elf_hwcap2(void)
1135 {
1136 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
1137 uint32_t features = 0;
1138
1139 #define GET_FEATURE(flag, feature) \
1140 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
1141 #define GET_FEATURE2(flag, feature) \
1142 do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
1143
1144 GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
1145 GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
1146 GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
1147 PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
1148 QEMU_PPC_FEATURE2_VEC_CRYPTO);
1149 GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
1150 QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
1151 GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
1152 QEMU_PPC_FEATURE2_MMA);
1153
1154 #undef GET_FEATURE
1155 #undef GET_FEATURE2
1156
1157 return features;
1158 }
1159
1160 /*
1161 * The requirements here are:
1162 * - keep the final alignment of sp (sp & 0xf)
1163 * - make sure the 32-bit value at the first 16 byte aligned position of
1164 * AUXV is greater than 16 for glibc compatibility.
1165 * AT_IGNOREPPC is used for that.
1166 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
1167 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
1168 */
1169 #define DLINFO_ARCH_ITEMS 5
1170 #define ARCH_DLINFO \
1171 do { \
1172 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu); \
1173 /* \
1174 * Handle glibc compatibility: these magic entries must \
1175 * be at the lowest addresses in the final auxv. \
1176 */ \
1177 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
1178 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
1179 NEW_AUX_ENT(AT_DCACHEBSIZE, cpu->env.dcache_line_size); \
1180 NEW_AUX_ENT(AT_ICACHEBSIZE, cpu->env.icache_line_size); \
1181 NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \
1182 } while (0)
1183
1184 static inline void init_thread(struct target_pt_regs *_regs, struct image_info *infop)
1185 {
1186 _regs->gpr[1] = infop->start_stack;
1187 #if defined(TARGET_PPC64)
1188 if (get_ppc64_abi(infop) < 2) {
1189 uint64_t val;
1190 get_user_u64(val, infop->entry + 8);
1191 _regs->gpr[2] = val + infop->load_bias;
1192 get_user_u64(val, infop->entry);
1193 infop->entry = val + infop->load_bias;
1194 } else {
1195 _regs->gpr[12] = infop->entry; /* r12 set to global entry address */
1196 }
1197 #endif
1198 _regs->nip = infop->entry;
1199 }
1200
1201 /* See linux kernel: arch/powerpc/include/asm/elf.h. */
1202 #define ELF_NREG 48
1203 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1204
1205 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUPPCState *env)
1206 {
1207 int i;
1208 target_ulong ccr = 0;
1209
1210 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) {
1211 (*regs)[i] = tswapreg(env->gpr[i]);
1212 }
1213
1214 (*regs)[32] = tswapreg(env->nip);
1215 (*regs)[33] = tswapreg(env->msr);
1216 (*regs)[35] = tswapreg(env->ctr);
1217 (*regs)[36] = tswapreg(env->lr);
1218 (*regs)[37] = tswapreg(cpu_read_xer(env));
1219
1220 ccr = ppc_get_cr(env);
1221 (*regs)[38] = tswapreg(ccr);
1222 }
1223
1224 #define USE_ELF_CORE_DUMP
1225 #define ELF_EXEC_PAGESIZE 4096
1226
1227 #ifndef TARGET_PPC64
1228 # define VDSO_HEADER "vdso-32.c.inc"
1229 #elif TARGET_BIG_ENDIAN
1230 # define VDSO_HEADER "vdso-64.c.inc"
1231 #else
1232 # define VDSO_HEADER "vdso-64le.c.inc"
1233 #endif
1234
1235 #endif
1236
1237 #ifdef TARGET_LOONGARCH64
1238
1239 #define ELF_CLASS ELFCLASS64
1240 #define ELF_ARCH EM_LOONGARCH
1241 #define EXSTACK_DEFAULT true
1242
1243 #define elf_check_arch(x) ((x) == EM_LOONGARCH)
1244
1245 #define VDSO_HEADER "vdso.c.inc"
1246
1247 static inline void init_thread(struct target_pt_regs *regs,
1248 struct image_info *infop)
1249 {
1250 /*Set crmd PG,DA = 1,0 */
1251 regs->csr.crmd = 2 << 3;
1252 regs->csr.era = infop->entry;
1253 regs->regs[3] = infop->start_stack;
1254 }
1255
1256 /* See linux kernel: arch/loongarch/include/asm/elf.h */
1257 #define ELF_NREG 45
1258 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1259
1260 enum {
1261 TARGET_EF_R0 = 0,
1262 TARGET_EF_CSR_ERA = TARGET_EF_R0 + 33,
1263 TARGET_EF_CSR_BADV = TARGET_EF_R0 + 34,
1264 };
1265
1266 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1267 const CPULoongArchState *env)
1268 {
1269 int i;
1270
1271 (*regs)[TARGET_EF_R0] = 0;
1272
1273 for (i = 1; i < ARRAY_SIZE(env->gpr); i++) {
1274 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->gpr[i]);
1275 }
1276
1277 (*regs)[TARGET_EF_CSR_ERA] = tswapreg(env->pc);
1278 (*regs)[TARGET_EF_CSR_BADV] = tswapreg(env->CSR_BADV);
1279 }
1280
1281 #define USE_ELF_CORE_DUMP
1282 #define ELF_EXEC_PAGESIZE 4096
1283
1284 #define ELF_HWCAP get_elf_hwcap()
1285
1286 /* See arch/loongarch/include/uapi/asm/hwcap.h */
1287 enum {
1288 HWCAP_LOONGARCH_CPUCFG = (1 << 0),
1289 HWCAP_LOONGARCH_LAM = (1 << 1),
1290 HWCAP_LOONGARCH_UAL = (1 << 2),
1291 HWCAP_LOONGARCH_FPU = (1 << 3),
1292 HWCAP_LOONGARCH_LSX = (1 << 4),
1293 HWCAP_LOONGARCH_LASX = (1 << 5),
1294 HWCAP_LOONGARCH_CRC32 = (1 << 6),
1295 HWCAP_LOONGARCH_COMPLEX = (1 << 7),
1296 HWCAP_LOONGARCH_CRYPTO = (1 << 8),
1297 HWCAP_LOONGARCH_LVZ = (1 << 9),
1298 HWCAP_LOONGARCH_LBT_X86 = (1 << 10),
1299 HWCAP_LOONGARCH_LBT_ARM = (1 << 11),
1300 HWCAP_LOONGARCH_LBT_MIPS = (1 << 12),
1301 };
1302
1303 static uint32_t get_elf_hwcap(void)
1304 {
1305 LoongArchCPU *cpu = LOONGARCH_CPU(thread_cpu);
1306 uint32_t hwcaps = 0;
1307
1308 hwcaps |= HWCAP_LOONGARCH_CRC32;
1309
1310 if (FIELD_EX32(cpu->env.cpucfg[1], CPUCFG1, UAL)) {
1311 hwcaps |= HWCAP_LOONGARCH_UAL;
1312 }
1313
1314 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, FP)) {
1315 hwcaps |= HWCAP_LOONGARCH_FPU;
1316 }
1317
1318 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LAM)) {
1319 hwcaps |= HWCAP_LOONGARCH_LAM;
1320 }
1321
1322 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
1323 hwcaps |= HWCAP_LOONGARCH_LSX;
1324 }
1325
1326 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
1327 hwcaps |= HWCAP_LOONGARCH_LASX;
1328 }
1329
1330 return hwcaps;
1331 }
1332
1333 #define ELF_PLATFORM "loongarch"
1334
1335 #endif /* TARGET_LOONGARCH64 */
1336
1337 #ifdef TARGET_MIPS
1338
1339 #ifdef TARGET_MIPS64
1340 #define ELF_CLASS ELFCLASS64
1341 #else
1342 #define ELF_CLASS ELFCLASS32
1343 #endif
1344 #define ELF_ARCH EM_MIPS
1345 #define EXSTACK_DEFAULT true
1346
1347 #ifdef TARGET_ABI_MIPSN32
1348 #define elf_check_abi(x) ((x) & EF_MIPS_ABI2)
1349 #else
1350 #define elf_check_abi(x) (!((x) & EF_MIPS_ABI2))
1351 #endif
1352
1353 #define ELF_BASE_PLATFORM get_elf_base_platform()
1354
1355 #define MATCH_PLATFORM_INSN(_flags, _base_platform) \
1356 do { if ((cpu->env.insn_flags & (_flags)) == _flags) \
1357 { return _base_platform; } } while (0)
1358
1359 static const char *get_elf_base_platform(void)
1360 {
1361 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1362
1363 /* 64 bit ISAs goes first */
1364 MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6");
1365 MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5");
1366 MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2");
1367 MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64");
1368 MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5");
1369 MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4");
1370 MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3");
1371
1372 /* 32 bit ISAs */
1373 MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6");
1374 MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5");
1375 MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2");
1376 MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32");
1377 MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2");
1378
1379 /* Fallback */
1380 return "mips";
1381 }
1382 #undef MATCH_PLATFORM_INSN
1383
1384 static inline void init_thread(struct target_pt_regs *regs,
1385 struct image_info *infop)
1386 {
1387 regs->cp0_status = 2 << CP0St_KSU;
1388 regs->cp0_epc = infop->entry;
1389 regs->regs[29] = infop->start_stack;
1390 }
1391
1392 /* See linux kernel: arch/mips/include/asm/elf.h. */
1393 #define ELF_NREG 45
1394 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1395
1396 /* See linux kernel: arch/mips/include/asm/reg.h. */
1397 enum {
1398 #ifdef TARGET_MIPS64
1399 TARGET_EF_R0 = 0,
1400 #else
1401 TARGET_EF_R0 = 6,
1402 #endif
1403 TARGET_EF_R26 = TARGET_EF_R0 + 26,
1404 TARGET_EF_R27 = TARGET_EF_R0 + 27,
1405 TARGET_EF_LO = TARGET_EF_R0 + 32,
1406 TARGET_EF_HI = TARGET_EF_R0 + 33,
1407 TARGET_EF_CP0_EPC = TARGET_EF_R0 + 34,
1408 TARGET_EF_CP0_BADVADDR = TARGET_EF_R0 + 35,
1409 TARGET_EF_CP0_STATUS = TARGET_EF_R0 + 36,
1410 TARGET_EF_CP0_CAUSE = TARGET_EF_R0 + 37
1411 };
1412
1413 /* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
1414 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *env)
1415 {
1416 int i;
1417
1418 for (i = 0; i < TARGET_EF_R0; i++) {
1419 (*regs)[i] = 0;
1420 }
1421 (*regs)[TARGET_EF_R0] = 0;
1422
1423 for (i = 1; i < ARRAY_SIZE(env->active_tc.gpr); i++) {
1424 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->active_tc.gpr[i]);
1425 }
1426
1427 (*regs)[TARGET_EF_R26] = 0;
1428 (*regs)[TARGET_EF_R27] = 0;
1429 (*regs)[TARGET_EF_LO] = tswapreg(env->active_tc.LO[0]);
1430 (*regs)[TARGET_EF_HI] = tswapreg(env->active_tc.HI[0]);
1431 (*regs)[TARGET_EF_CP0_EPC] = tswapreg(env->active_tc.PC);
1432 (*regs)[TARGET_EF_CP0_BADVADDR] = tswapreg(env->CP0_BadVAddr);
1433 (*regs)[TARGET_EF_CP0_STATUS] = tswapreg(env->CP0_Status);
1434 (*regs)[TARGET_EF_CP0_CAUSE] = tswapreg(env->CP0_Cause);
1435 }
1436
1437 #define USE_ELF_CORE_DUMP
1438 #define ELF_EXEC_PAGESIZE 4096
1439
1440 /* See arch/mips/include/uapi/asm/hwcap.h. */
1441 enum {
1442 HWCAP_MIPS_R6 = (1 << 0),
1443 HWCAP_MIPS_MSA = (1 << 1),
1444 HWCAP_MIPS_CRC32 = (1 << 2),
1445 HWCAP_MIPS_MIPS16 = (1 << 3),
1446 HWCAP_MIPS_MDMX = (1 << 4),
1447 HWCAP_MIPS_MIPS3D = (1 << 5),
1448 HWCAP_MIPS_SMARTMIPS = (1 << 6),
1449 HWCAP_MIPS_DSP = (1 << 7),
1450 HWCAP_MIPS_DSP2 = (1 << 8),
1451 HWCAP_MIPS_DSP3 = (1 << 9),
1452 HWCAP_MIPS_MIPS16E2 = (1 << 10),
1453 HWCAP_LOONGSON_MMI = (1 << 11),
1454 HWCAP_LOONGSON_EXT = (1 << 12),
1455 HWCAP_LOONGSON_EXT2 = (1 << 13),
1456 HWCAP_LOONGSON_CPUCFG = (1 << 14),
1457 };
1458
1459 #define ELF_HWCAP get_elf_hwcap()
1460
1461 #define GET_FEATURE_INSN(_flag, _hwcap) \
1462 do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
1463
1464 #define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \
1465 do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
1466
1467 #define GET_FEATURE_REG_EQU(_reg, _start, _length, _val, _hwcap) \
1468 do { \
1469 if (extract32(cpu->env._reg, (_start), (_length)) == (_val)) { \
1470 hwcaps |= _hwcap; \
1471 } \
1472 } while (0)
1473
1474 static uint32_t get_elf_hwcap(void)
1475 {
1476 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1477 uint32_t hwcaps = 0;
1478
1479 GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, CP0C0_AR_LENGTH,
1480 2, HWCAP_MIPS_R6);
1481 GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
1482 GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI);
1483 GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT);
1484
1485 return hwcaps;
1486 }
1487
1488 #undef GET_FEATURE_REG_EQU
1489 #undef GET_FEATURE_REG_SET
1490 #undef GET_FEATURE_INSN
1491
1492 #endif /* TARGET_MIPS */
1493
1494 #ifdef TARGET_MICROBLAZE
1495
1496 #define elf_check_arch(x) ( (x) == EM_MICROBLAZE || (x) == EM_MICROBLAZE_OLD)
1497
1498 #define ELF_CLASS ELFCLASS32
1499 #define ELF_ARCH EM_MICROBLAZE
1500
1501 static inline void init_thread(struct target_pt_regs *regs,
1502 struct image_info *infop)
1503 {
1504 regs->pc = infop->entry;
1505 regs->r1 = infop->start_stack;
1506
1507 }
1508
1509 #define ELF_EXEC_PAGESIZE 4096
1510
1511 #define USE_ELF_CORE_DUMP
1512 #define ELF_NREG 38
1513 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1514
1515 /* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
1516 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env)
1517 {
1518 int i, pos = 0;
1519
1520 for (i = 0; i < 32; i++) {
1521 (*regs)[pos++] = tswapreg(env->regs[i]);
1522 }
1523
1524 (*regs)[pos++] = tswapreg(env->pc);
1525 (*regs)[pos++] = tswapreg(mb_cpu_read_msr(env));
1526 (*regs)[pos++] = 0;
1527 (*regs)[pos++] = tswapreg(env->ear);
1528 (*regs)[pos++] = 0;
1529 (*regs)[pos++] = tswapreg(env->esr);
1530 }
1531
1532 #endif /* TARGET_MICROBLAZE */
1533
1534 #ifdef TARGET_OPENRISC
1535
1536 #define ELF_ARCH EM_OPENRISC
1537 #define ELF_CLASS ELFCLASS32
1538 #define ELF_DATA ELFDATA2MSB
1539
1540 static inline void init_thread(struct target_pt_regs *regs,
1541 struct image_info *infop)
1542 {
1543 regs->pc = infop->entry;
1544 regs->gpr[1] = infop->start_stack;
1545 }
1546
1547 #define USE_ELF_CORE_DUMP
1548 #define ELF_EXEC_PAGESIZE 8192
1549
1550 /* See linux kernel arch/openrisc/include/asm/elf.h. */
1551 #define ELF_NREG 34 /* gprs and pc, sr */
1552 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1553
1554 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1555 const CPUOpenRISCState *env)
1556 {
1557 int i;
1558
1559 for (i = 0; i < 32; i++) {
1560 (*regs)[i] = tswapreg(cpu_get_gpr(env, i));
1561 }
1562 (*regs)[32] = tswapreg(env->pc);
1563 (*regs)[33] = tswapreg(cpu_get_sr(env));
1564 }
1565 #define ELF_HWCAP 0
1566 #define ELF_PLATFORM NULL
1567
1568 #endif /* TARGET_OPENRISC */
1569
1570 #ifdef TARGET_SH4
1571
1572 #define ELF_CLASS ELFCLASS32
1573 #define ELF_ARCH EM_SH
1574
1575 static inline void init_thread(struct target_pt_regs *regs,
1576 struct image_info *infop)
1577 {
1578 /* Check other registers XXXXX */
1579 regs->pc = infop->entry;
1580 regs->regs[15] = infop->start_stack;
1581 }
1582
1583 /* See linux kernel: arch/sh/include/asm/elf.h. */
1584 #define ELF_NREG 23
1585 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1586
1587 /* See linux kernel: arch/sh/include/asm/ptrace.h. */
1588 enum {
1589 TARGET_REG_PC = 16,
1590 TARGET_REG_PR = 17,
1591 TARGET_REG_SR = 18,
1592 TARGET_REG_GBR = 19,
1593 TARGET_REG_MACH = 20,
1594 TARGET_REG_MACL = 21,
1595 TARGET_REG_SYSCALL = 22
1596 };
1597
1598 static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
1599 const CPUSH4State *env)
1600 {
1601 int i;
1602
1603 for (i = 0; i < 16; i++) {
1604 (*regs)[i] = tswapreg(env->gregs[i]);
1605 }
1606
1607 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
1608 (*regs)[TARGET_REG_PR] = tswapreg(env->pr);
1609 (*regs)[TARGET_REG_SR] = tswapreg(env->sr);
1610 (*regs)[TARGET_REG_GBR] = tswapreg(env->gbr);
1611 (*regs)[TARGET_REG_MACH] = tswapreg(env->mach);
1612 (*regs)[TARGET_REG_MACL] = tswapreg(env->macl);
1613 (*regs)[TARGET_REG_SYSCALL] = 0; /* FIXME */
1614 }
1615
1616 #define USE_ELF_CORE_DUMP
1617 #define ELF_EXEC_PAGESIZE 4096
1618
1619 enum {
1620 SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
1621 SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
1622 SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
1623 SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
1624 SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
1625 SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
1626 SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
1627 SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
1628 SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
1629 SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
1630 };
1631
1632 #define ELF_HWCAP get_elf_hwcap()
1633
1634 static uint32_t get_elf_hwcap(void)
1635 {
1636 SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
1637 uint32_t hwcap = 0;
1638
1639 hwcap |= SH_CPU_HAS_FPU;
1640
1641 if (cpu->env.features & SH_FEATURE_SH4A) {
1642 hwcap |= SH_CPU_HAS_LLSC;
1643 }
1644
1645 return hwcap;
1646 }
1647
1648 #endif
1649
1650 #ifdef TARGET_M68K
1651
1652 #define ELF_CLASS ELFCLASS32
1653 #define ELF_ARCH EM_68K
1654
1655 /* ??? Does this need to do anything?
1656 #define ELF_PLAT_INIT(_r) */
1657
1658 static inline void init_thread(struct target_pt_regs *regs,
1659 struct image_info *infop)
1660 {
1661 regs->usp = infop->start_stack;
1662 regs->sr = 0;
1663 regs->pc = infop->entry;
1664 }
1665
1666 /* See linux kernel: arch/m68k/include/asm/elf.h. */
1667 #define ELF_NREG 20
1668 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1669
1670 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUM68KState *env)
1671 {
1672 (*regs)[0] = tswapreg(env->dregs[1]);
1673 (*regs)[1] = tswapreg(env->dregs[2]);
1674 (*regs)[2] = tswapreg(env->dregs[3]);
1675 (*regs)[3] = tswapreg(env->dregs[4]);
1676 (*regs)[4] = tswapreg(env->dregs[5]);
1677 (*regs)[5] = tswapreg(env->dregs[6]);
1678 (*regs)[6] = tswapreg(env->dregs[7]);
1679 (*regs)[7] = tswapreg(env->aregs[0]);
1680 (*regs)[8] = tswapreg(env->aregs[1]);
1681 (*regs)[9] = tswapreg(env->aregs[2]);
1682 (*regs)[10] = tswapreg(env->aregs[3]);
1683 (*regs)[11] = tswapreg(env->aregs[4]);
1684 (*regs)[12] = tswapreg(env->aregs[5]);
1685 (*regs)[13] = tswapreg(env->aregs[6]);
1686 (*regs)[14] = tswapreg(env->dregs[0]);
1687 (*regs)[15] = tswapreg(env->aregs[7]);
1688 (*regs)[16] = tswapreg(env->dregs[0]); /* FIXME: orig_d0 */
1689 (*regs)[17] = tswapreg(env->sr);
1690 (*regs)[18] = tswapreg(env->pc);
1691 (*regs)[19] = 0; /* FIXME: regs->format | regs->vector */
1692 }
1693
1694 #define USE_ELF_CORE_DUMP
1695 #define ELF_EXEC_PAGESIZE 8192
1696
1697 #endif
1698
1699 #ifdef TARGET_ALPHA
1700
1701 #define ELF_CLASS ELFCLASS64
1702 #define ELF_ARCH EM_ALPHA
1703
1704 static inline void init_thread(struct target_pt_regs *regs,
1705 struct image_info *infop)
1706 {
1707 regs->pc = infop->entry;
1708 regs->ps = 8;
1709 regs->usp = infop->start_stack;
1710 }
1711
1712 #define ELF_EXEC_PAGESIZE 8192
1713
1714 #endif /* TARGET_ALPHA */
1715
1716 #ifdef TARGET_S390X
1717
1718 #define ELF_CLASS ELFCLASS64
1719 #define ELF_DATA ELFDATA2MSB
1720 #define ELF_ARCH EM_S390
1721
1722 #include "elf.h"
1723
1724 #define ELF_HWCAP get_elf_hwcap()
1725
1726 #define GET_FEATURE(_feat, _hwcap) \
1727 do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)
1728
1729 uint32_t get_elf_hwcap(void)
1730 {
1731 /*
1732 * Let's assume we always have esan3 and zarch.
1733 * 31-bit processes can use 64-bit registers (high gprs).
1734 */
1735 uint32_t hwcap = HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HIGH_GPRS;
1736
1737 GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE);
1738 GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA);
1739 GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP);
1740 GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM);
1741 if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) &&
1742 s390_has_feat(S390_FEAT_ETF3_ENH)) {
1743 hwcap |= HWCAP_S390_ETF3EH;
1744 }
1745 GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS);
1746 GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT);
1747 GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2);
1748
1749 return hwcap;
1750 }
1751
1752 const char *elf_hwcap_str(uint32_t bit)
1753 {
1754 static const char *hwcap_str[] = {
1755 [HWCAP_S390_NR_ESAN3] = "esan3",
1756 [HWCAP_S390_NR_ZARCH] = "zarch",
1757 [HWCAP_S390_NR_STFLE] = "stfle",
1758 [HWCAP_S390_NR_MSA] = "msa",
1759 [HWCAP_S390_NR_LDISP] = "ldisp",
1760 [HWCAP_S390_NR_EIMM] = "eimm",
1761 [HWCAP_S390_NR_DFP] = "dfp",
1762 [HWCAP_S390_NR_HPAGE] = "edat",
1763 [HWCAP_S390_NR_ETF3EH] = "etf3eh",
1764 [HWCAP_S390_NR_HIGH_GPRS] = "highgprs",
1765 [HWCAP_S390_NR_TE] = "te",
1766 [HWCAP_S390_NR_VXRS] = "vx",
1767 [HWCAP_S390_NR_VXRS_BCD] = "vxd",
1768 [HWCAP_S390_NR_VXRS_EXT] = "vxe",
1769 [HWCAP_S390_NR_GS] = "gs",
1770 [HWCAP_S390_NR_VXRS_EXT2] = "vxe2",
1771 [HWCAP_S390_NR_VXRS_PDE] = "vxp",
1772 [HWCAP_S390_NR_SORT] = "sort",
1773 [HWCAP_S390_NR_DFLT] = "dflt",
1774 [HWCAP_S390_NR_NNPA] = "nnpa",
1775 [HWCAP_S390_NR_PCI_MIO] = "pcimio",
1776 [HWCAP_S390_NR_SIE] = "sie",
1777 };
1778
1779 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
1780 }
1781
1782 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
1783 {
1784 regs->psw.addr = infop->entry;
1785 regs->psw.mask = PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
1786 PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_MASK_64 | \
1787 PSW_MASK_32;
1788 regs->gprs[15] = infop->start_stack;
1789 }
1790
1791 /* See linux kernel: arch/s390/include/uapi/asm/ptrace.h (s390_regs). */
1792 #define ELF_NREG 27
1793 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1794
1795 enum {
1796 TARGET_REG_PSWM = 0,
1797 TARGET_REG_PSWA = 1,
1798 TARGET_REG_GPRS = 2,
1799 TARGET_REG_ARS = 18,
1800 TARGET_REG_ORIG_R2 = 26,
1801 };
1802
1803 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1804 const CPUS390XState *env)
1805 {
1806 int i;
1807 uint32_t *aregs;
1808
1809 (*regs)[TARGET_REG_PSWM] = tswapreg(env->psw.mask);
1810 (*regs)[TARGET_REG_PSWA] = tswapreg(env->psw.addr);
1811 for (i = 0; i < 16; i++) {
1812 (*regs)[TARGET_REG_GPRS + i] = tswapreg(env->regs[i]);
1813 }
1814 aregs = (uint32_t *)&((*regs)[TARGET_REG_ARS]);
1815 for (i = 0; i < 16; i++) {
1816 aregs[i] = tswap32(env->aregs[i]);
1817 }
1818 (*regs)[TARGET_REG_ORIG_R2] = 0;
1819 }
1820
1821 #define USE_ELF_CORE_DUMP
1822 #define ELF_EXEC_PAGESIZE 4096
1823
1824 #define VDSO_HEADER "vdso.c.inc"
1825
1826 #endif /* TARGET_S390X */
1827
1828 #ifdef TARGET_RISCV
1829
1830 #define ELF_ARCH EM_RISCV
1831
1832 #ifdef TARGET_RISCV32
1833 #define ELF_CLASS ELFCLASS32
1834 #define VDSO_HEADER "vdso-32.c.inc"
1835 #else
1836 #define ELF_CLASS ELFCLASS64
1837 #define VDSO_HEADER "vdso-64.c.inc"
1838 #endif
1839
1840 #define ELF_HWCAP get_elf_hwcap()
1841
1842 static uint32_t get_elf_hwcap(void)
1843 {
1844 #define MISA_BIT(EXT) (1 << (EXT - 'A'))
1845 RISCVCPU *cpu = RISCV_CPU(thread_cpu);
1846 uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A')
1847 | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C')
1848 | MISA_BIT('V');
1849
1850 return cpu->env.misa_ext & mask;
1851 #undef MISA_BIT
1852 }
1853
1854 static inline void init_thread(struct target_pt_regs *regs,
1855 struct image_info *infop)
1856 {
1857 regs->sepc = infop->entry;
1858 regs->sp = infop->start_stack;
1859 }
1860
1861 #define ELF_EXEC_PAGESIZE 4096
1862
1863 #endif /* TARGET_RISCV */
1864
1865 #ifdef TARGET_HPPA
1866
1867 #define ELF_CLASS ELFCLASS32
1868 #define ELF_ARCH EM_PARISC
1869 #define ELF_PLATFORM "PARISC"
1870 #define STACK_GROWS_DOWN 0
1871 #define STACK_ALIGNMENT 64
1872
1873 #define VDSO_HEADER "vdso.c.inc"
1874
1875 static inline void init_thread(struct target_pt_regs *regs,
1876 struct image_info *infop)
1877 {
1878 regs->iaoq[0] = infop->entry | PRIV_USER;
1879 regs->iaoq[1] = regs->iaoq[0] + 4;
1880 regs->gr[23] = 0;
1881 regs->gr[24] = infop->argv;
1882 regs->gr[25] = infop->argc;
1883 /* The top-of-stack contains a linkage buffer. */
1884 regs->gr[30] = infop->start_stack + 64;
1885 regs->gr[31] = infop->entry;
1886 }
1887
1888 #define LO_COMMPAGE 0
1889
1890 static bool init_guest_commpage(void)
1891 {
1892 /* If reserved_va, then we have already mapped 0 page on the host. */
1893 if (!reserved_va) {
1894 void *want, *addr;
1895
1896 want = g2h_untagged(LO_COMMPAGE);
1897 addr = mmap(want, TARGET_PAGE_SIZE, PROT_NONE,
1898 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED_NOREPLACE, -1, 0);
1899 if (addr == MAP_FAILED) {
1900 perror("Allocating guest commpage");
1901 exit(EXIT_FAILURE);
1902 }
1903 if (addr != want) {
1904 return false;
1905 }
1906 }
1907
1908 /*
1909 * On Linux, page zero is normally marked execute only + gateway.
1910 * Normal read or write is supposed to fail (thus PROT_NONE above),
1911 * but specific offsets have kernel code mapped to raise permissions
1912 * and implement syscalls. Here, simply mark the page executable.
1913 * Special case the entry points during translation (see do_page_zero).
1914 */
1915 page_set_flags(LO_COMMPAGE, LO_COMMPAGE | ~TARGET_PAGE_MASK,
1916 PAGE_EXEC | PAGE_VALID);
1917 return true;
1918 }
1919
1920 #endif /* TARGET_HPPA */
1921
1922 #ifdef TARGET_XTENSA
1923
1924 #define ELF_CLASS ELFCLASS32
1925 #define ELF_ARCH EM_XTENSA
1926
1927 static inline void init_thread(struct target_pt_regs *regs,
1928 struct image_info *infop)
1929 {
1930 regs->windowbase = 0;
1931 regs->windowstart = 1;
1932 regs->areg[1] = infop->start_stack;
1933 regs->pc = infop->entry;
1934 if (info_is_fdpic(infop)) {
1935 regs->areg[4] = infop->loadmap_addr;
1936 regs->areg[5] = infop->interpreter_loadmap_addr;
1937 if (infop->interpreter_loadmap_addr) {
1938 regs->areg[6] = infop->interpreter_pt_dynamic_addr;
1939 } else {
1940 regs->areg[6] = infop->pt_dynamic_addr;
1941 }
1942 }
1943 }
1944
1945 /* See linux kernel: arch/xtensa/include/asm/elf.h. */
1946 #define ELF_NREG 128
1947 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1948
1949 enum {
1950 TARGET_REG_PC,
1951 TARGET_REG_PS,
1952 TARGET_REG_LBEG,
1953 TARGET_REG_LEND,
1954 TARGET_REG_LCOUNT,
1955 TARGET_REG_SAR,
1956 TARGET_REG_WINDOWSTART,
1957 TARGET_REG_WINDOWBASE,
1958 TARGET_REG_THREADPTR,
1959 TARGET_REG_AR0 = 64,
1960 };
1961
1962 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1963 const CPUXtensaState *env)
1964 {
1965 unsigned i;
1966
1967 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
1968 (*regs)[TARGET_REG_PS] = tswapreg(env->sregs[PS] & ~PS_EXCM);
1969 (*regs)[TARGET_REG_LBEG] = tswapreg(env->sregs[LBEG]);
1970 (*regs)[TARGET_REG_LEND] = tswapreg(env->sregs[LEND]);
1971 (*regs)[TARGET_REG_LCOUNT] = tswapreg(env->sregs[LCOUNT]);
1972 (*regs)[TARGET_REG_SAR] = tswapreg(env->sregs[SAR]);
1973 (*regs)[TARGET_REG_WINDOWSTART] = tswapreg(env->sregs[WINDOW_START]);
1974 (*regs)[TARGET_REG_WINDOWBASE] = tswapreg(env->sregs[WINDOW_BASE]);
1975 (*regs)[TARGET_REG_THREADPTR] = tswapreg(env->uregs[THREADPTR]);
1976 xtensa_sync_phys_from_window((CPUXtensaState *)env);
1977 for (i = 0; i < env->config->nareg; ++i) {
1978 (*regs)[TARGET_REG_AR0 + i] = tswapreg(env->phys_regs[i]);
1979 }
1980 }
1981
1982 #define USE_ELF_CORE_DUMP
1983 #define ELF_EXEC_PAGESIZE 4096
1984
1985 #endif /* TARGET_XTENSA */
1986
1987 #ifdef TARGET_HEXAGON
1988
1989 #define ELF_CLASS ELFCLASS32
1990 #define ELF_ARCH EM_HEXAGON
1991
1992 static inline void init_thread(struct target_pt_regs *regs,
1993 struct image_info *infop)
1994 {
1995 regs->sepc = infop->entry;
1996 regs->sp = infop->start_stack;
1997 }
1998
1999 #endif /* TARGET_HEXAGON */
2000
2001 #ifndef ELF_BASE_PLATFORM
2002 #define ELF_BASE_PLATFORM (NULL)
2003 #endif
2004
2005 #ifndef ELF_PLATFORM
2006 #define ELF_PLATFORM (NULL)
2007 #endif
2008
2009 #ifndef ELF_MACHINE
2010 #define ELF_MACHINE ELF_ARCH
2011 #endif
2012
2013 #ifndef elf_check_arch
2014 #define elf_check_arch(x) ((x) == ELF_ARCH)
2015 #endif
2016
2017 #ifndef elf_check_abi
2018 #define elf_check_abi(x) (1)
2019 #endif
2020
2021 #ifndef ELF_HWCAP
2022 #define ELF_HWCAP 0
2023 #endif
2024
2025 #ifndef STACK_GROWS_DOWN
2026 #define STACK_GROWS_DOWN 1
2027 #endif
2028
2029 #ifndef STACK_ALIGNMENT
2030 #define STACK_ALIGNMENT 16
2031 #endif
2032
2033 #ifdef TARGET_ABI32
2034 #undef ELF_CLASS
2035 #define ELF_CLASS ELFCLASS32
2036 #undef bswaptls
2037 #define bswaptls(ptr) bswap32s(ptr)
2038 #endif
2039
2040 #ifndef EXSTACK_DEFAULT
2041 #define EXSTACK_DEFAULT false
2042 #endif
2043
2044 #include "elf.h"
2045
2046 /* We must delay the following stanzas until after "elf.h". */
2047 #if defined(TARGET_AARCH64)
2048
2049 static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2050 const uint32_t *data,
2051 struct image_info *info,
2052 Error **errp)
2053 {
2054 if (pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND) {
2055 if (pr_datasz != sizeof(uint32_t)) {
2056 error_setg(errp, "Ill-formed GNU_PROPERTY_AARCH64_FEATURE_1_AND");
2057 return false;
2058 }
2059 /* We will extract GNU_PROPERTY_AARCH64_FEATURE_1_BTI later. */
2060 info->note_flags = *data;
2061 }
2062 return true;
2063 }
2064 #define ARCH_USE_GNU_PROPERTY 1
2065
2066 #else
2067
2068 static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2069 const uint32_t *data,
2070 struct image_info *info,
2071 Error **errp)
2072 {
2073 g_assert_not_reached();
2074 }
2075 #define ARCH_USE_GNU_PROPERTY 0
2076
2077 #endif
2078
2079 struct exec
2080 {
2081 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
2082 unsigned int a_text; /* length of text, in bytes */
2083 unsigned int a_data; /* length of data, in bytes */
2084 unsigned int a_bss; /* length of uninitialized data area, in bytes */
2085 unsigned int a_syms; /* length of symbol table data in file, in bytes */
2086 unsigned int a_entry; /* start address */
2087 unsigned int a_trsize; /* length of relocation info for text, in bytes */
2088 unsigned int a_drsize; /* length of relocation info for data, in bytes */
2089 };
2090
2091
2092 #define N_MAGIC(exec) ((exec).a_info & 0xffff)
2093 #define OMAGIC 0407
2094 #define NMAGIC 0410
2095 #define ZMAGIC 0413
2096 #define QMAGIC 0314
2097
2098 #define DLINFO_ITEMS 16
2099
2100 static inline void memcpy_fromfs(void * to, const void * from, unsigned long n)
2101 {
2102 memcpy(to, from, n);
2103 }
2104
2105 #ifdef BSWAP_NEEDED
2106 static void bswap_ehdr(struct elfhdr *ehdr)
2107 {
2108 bswap16s(&ehdr->e_type); /* Object file type */
2109 bswap16s(&ehdr->e_machine); /* Architecture */
2110 bswap32s(&ehdr->e_version); /* Object file version */
2111 bswaptls(&ehdr->e_entry); /* Entry point virtual address */
2112 bswaptls(&ehdr->e_phoff); /* Program header table file offset */
2113 bswaptls(&ehdr->e_shoff); /* Section header table file offset */
2114 bswap32s(&ehdr->e_flags); /* Processor-specific flags */
2115 bswap16s(&ehdr->e_ehsize); /* ELF header size in bytes */
2116 bswap16s(&ehdr->e_phentsize); /* Program header table entry size */
2117 bswap16s(&ehdr->e_phnum); /* Program header table entry count */
2118 bswap16s(&ehdr->e_shentsize); /* Section header table entry size */
2119 bswap16s(&ehdr->e_shnum); /* Section header table entry count */
2120 bswap16s(&ehdr->e_shstrndx); /* Section header string table index */
2121 }
2122
2123 static void bswap_phdr(struct elf_phdr *phdr, int phnum)
2124 {
2125 int i;
2126 for (i = 0; i < phnum; ++i, ++phdr) {
2127 bswap32s(&phdr->p_type); /* Segment type */
2128 bswap32s(&phdr->p_flags); /* Segment flags */
2129 bswaptls(&phdr->p_offset); /* Segment file offset */
2130 bswaptls(&phdr->p_vaddr); /* Segment virtual address */
2131 bswaptls(&phdr->p_paddr); /* Segment physical address */
2132 bswaptls(&phdr->p_filesz); /* Segment size in file */
2133 bswaptls(&phdr->p_memsz); /* Segment size in memory */
2134 bswaptls(&phdr->p_align); /* Segment alignment */
2135 }
2136 }
2137
2138 static void bswap_shdr(struct elf_shdr *shdr, int shnum)
2139 {
2140 int i;
2141 for (i = 0; i < shnum; ++i, ++shdr) {
2142 bswap32s(&shdr->sh_name);
2143 bswap32s(&shdr->sh_type);
2144 bswaptls(&shdr->sh_flags);
2145 bswaptls(&shdr->sh_addr);
2146 bswaptls(&shdr->sh_offset);
2147 bswaptls(&shdr->sh_size);
2148 bswap32s(&shdr->sh_link);
2149 bswap32s(&shdr->sh_info);
2150 bswaptls(&shdr->sh_addralign);
2151 bswaptls(&shdr->sh_entsize);
2152 }
2153 }
2154
2155 static void bswap_sym(struct elf_sym *sym)
2156 {
2157 bswap32s(&sym->st_name);
2158 bswaptls(&sym->st_value);
2159 bswaptls(&sym->st_size);
2160 bswap16s(&sym->st_shndx);
2161 }
2162
2163 #ifdef TARGET_MIPS
2164 static void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags)
2165 {
2166 bswap16s(&abiflags->version);
2167 bswap32s(&abiflags->ases);
2168 bswap32s(&abiflags->isa_ext);
2169 bswap32s(&abiflags->flags1);
2170 bswap32s(&abiflags->flags2);
2171 }
2172 #endif
2173 #else
2174 static inline void bswap_ehdr(struct elfhdr *ehdr) { }
2175 static inline void bswap_phdr(struct elf_phdr *phdr, int phnum) { }
2176 static inline void bswap_shdr(struct elf_shdr *shdr, int shnum) { }
2177 static inline void bswap_sym(struct elf_sym *sym) { }
2178 #ifdef TARGET_MIPS
2179 static inline void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags) { }
2180 #endif
2181 #endif
2182
2183 #ifdef USE_ELF_CORE_DUMP
2184 static int elf_core_dump(int, const CPUArchState *);
2185 #endif /* USE_ELF_CORE_DUMP */
2186 static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
2187 abi_ulong load_bias);
2188
2189 /* Verify the portions of EHDR within E_IDENT for the target.
2190 This can be performed before bswapping the entire header. */
2191 static bool elf_check_ident(struct elfhdr *ehdr)
2192 {
2193 return (ehdr->e_ident[EI_MAG0] == ELFMAG0
2194 && ehdr->e_ident[EI_MAG1] == ELFMAG1
2195 && ehdr->e_ident[EI_MAG2] == ELFMAG2
2196 && ehdr->e_ident[EI_MAG3] == ELFMAG3
2197 && ehdr->e_ident[EI_CLASS] == ELF_CLASS
2198 && ehdr->e_ident[EI_DATA] == ELF_DATA
2199 && ehdr->e_ident[EI_VERSION] == EV_CURRENT);
2200 }
2201
2202 /* Verify the portions of EHDR outside of E_IDENT for the target.
2203 This has to wait until after bswapping the header. */
2204 static bool elf_check_ehdr(struct elfhdr *ehdr)
2205 {
2206 return (elf_check_arch(ehdr->e_machine)
2207 && elf_check_abi(ehdr->e_flags)
2208 && ehdr->e_ehsize == sizeof(struct elfhdr)
2209 && ehdr->e_phentsize == sizeof(struct elf_phdr)
2210 && (ehdr->e_type == ET_EXEC || ehdr->e_type == ET_DYN));
2211 }
2212
2213 /*
2214 * 'copy_elf_strings()' copies argument/envelope strings from user
2215 * memory to free pages in kernel mem. These are in a format ready
2216 * to be put directly into the top of new user memory.
2217 *
2218 */
2219 static abi_ulong copy_elf_strings(int argc, char **argv, char *scratch,
2220 abi_ulong p, abi_ulong stack_limit)
2221 {
2222 char *tmp;
2223 int len, i;
2224 abi_ulong top = p;
2225
2226 if (!p) {
2227 return 0; /* bullet-proofing */
2228 }
2229
2230 if (STACK_GROWS_DOWN) {
2231 int offset = ((p - 1) % TARGET_PAGE_SIZE) + 1;
2232 for (i = argc - 1; i >= 0; --i) {
2233 tmp = argv[i];
2234 if (!tmp) {
2235 fprintf(stderr, "VFS: argc is wrong");
2236 exit(-1);
2237 }
2238 len = strlen(tmp) + 1;
2239 tmp += len;
2240
2241 if (len > (p - stack_limit)) {
2242 return 0;
2243 }
2244 while (len) {
2245 int bytes_to_copy = (len > offset) ? offset : len;
2246 tmp -= bytes_to_copy;
2247 p -= bytes_to_copy;
2248 offset -= bytes_to_copy;
2249 len -= bytes_to_copy;
2250
2251 memcpy_fromfs(scratch + offset, tmp, bytes_to_copy);
2252
2253 if (offset == 0) {
2254 memcpy_to_target(p, scratch, top - p);
2255 top = p;
2256 offset = TARGET_PAGE_SIZE;
2257 }
2258 }
2259 }
2260 if (p != top) {
2261 memcpy_to_target(p, scratch + offset, top - p);
2262 }
2263 } else {
2264 int remaining = TARGET_PAGE_SIZE - (p % TARGET_PAGE_SIZE);
2265 for (i = 0; i < argc; ++i) {
2266 tmp = argv[i];
2267 if (!tmp) {
2268 fprintf(stderr, "VFS: argc is wrong");
2269 exit(-1);
2270 }
2271 len = strlen(tmp) + 1;
2272 if (len > (stack_limit - p)) {
2273 return 0;
2274 }
2275 while (len) {
2276 int bytes_to_copy = (len > remaining) ? remaining : len;
2277
2278 memcpy_fromfs(scratch + (p - top), tmp, bytes_to_copy);
2279
2280 tmp += bytes_to_copy;
2281 remaining -= bytes_to_copy;
2282 p += bytes_to_copy;
2283 len -= bytes_to_copy;
2284
2285 if (remaining == 0) {
2286 memcpy_to_target(top, scratch, p - top);
2287 top = p;
2288 remaining = TARGET_PAGE_SIZE;
2289 }
2290 }
2291 }
2292 if (p != top) {
2293 memcpy_to_target(top, scratch, p - top);
2294 }
2295 }
2296
2297 return p;
2298 }
2299
2300 /* Older linux kernels provide up to MAX_ARG_PAGES (default: 32) of
2301 * argument/environment space. Newer kernels (>2.6.33) allow more,
2302 * dependent on stack size, but guarantee at least 32 pages for
2303 * backwards compatibility.
2304 */
2305 #define STACK_LOWER_LIMIT (32 * TARGET_PAGE_SIZE)
2306
2307 static abi_ulong setup_arg_pages(struct linux_binprm *bprm,
2308 struct image_info *info)
2309 {
2310 abi_ulong size, error, guard;
2311 int prot;
2312
2313 size = guest_stack_size;
2314 if (size < STACK_LOWER_LIMIT) {
2315 size = STACK_LOWER_LIMIT;
2316 }
2317
2318 if (STACK_GROWS_DOWN) {
2319 guard = TARGET_PAGE_SIZE;
2320 if (guard < qemu_real_host_page_size()) {
2321 guard = qemu_real_host_page_size();
2322 }
2323 } else {
2324 /* no guard page for hppa target where stack grows upwards. */
2325 guard = 0;
2326 }
2327
2328 prot = PROT_READ | PROT_WRITE;
2329 if (info->exec_stack) {
2330 prot |= PROT_EXEC;
2331 }
2332 error = target_mmap(0, size + guard, prot,
2333 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
2334 if (error == -1) {
2335 perror("mmap stack");
2336 exit(-1);
2337 }
2338
2339 /* We reserve one extra page at the top of the stack as guard. */
2340 if (STACK_GROWS_DOWN) {
2341 target_mprotect(error, guard, PROT_NONE);
2342 info->stack_limit = error + guard;
2343 return info->stack_limit + size - sizeof(void *);
2344 } else {
2345 info->stack_limit = error + size;
2346 return error;
2347 }
2348 }
2349
2350 /**
2351 * zero_bss:
2352 *
2353 * Map and zero the bss. We need to explicitly zero any fractional pages
2354 * after the data section (i.e. bss). Return false on mapping failure.
2355 */
2356 static bool zero_bss(abi_ulong start_bss, abi_ulong end_bss,
2357 int prot, Error **errp)
2358 {
2359 abi_ulong align_bss;
2360
2361 /* We only expect writable bss; the code segment shouldn't need this. */
2362 if (!(prot & PROT_WRITE)) {
2363 error_setg(errp, "PT_LOAD with non-writable bss");
2364 return false;
2365 }
2366
2367 align_bss = TARGET_PAGE_ALIGN(start_bss);
2368 end_bss = TARGET_PAGE_ALIGN(end_bss);
2369
2370 if (start_bss < align_bss) {
2371 int flags = page_get_flags(start_bss);
2372
2373 if (!(flags & PAGE_RWX)) {
2374 /*
2375 * The whole address space of the executable was reserved
2376 * at the start, therefore all pages will be VALID.
2377 * But assuming there are no PROT_NONE PT_LOAD segments,
2378 * a PROT_NONE page means no data all bss, and we can
2379 * simply extend the new anon mapping back to the start
2380 * of the page of bss.
2381 */
2382 align_bss -= TARGET_PAGE_SIZE;
2383 } else {
2384 /*
2385 * The start of the bss shares a page with something.
2386 * The only thing that we expect is the data section,
2387 * which would already be marked writable.
2388 * Overlapping the RX code segment seems malformed.
2389 */
2390 if (!(flags & PAGE_WRITE)) {
2391 error_setg(errp, "PT_LOAD with bss overlapping "
2392 "non-writable page");
2393 return false;
2394 }
2395
2396 /* The page is already mapped and writable. */
2397 memset(g2h_untagged(start_bss), 0, align_bss - start_bss);
2398 }
2399 }
2400
2401 if (align_bss < end_bss &&
2402 target_mmap(align_bss, end_bss - align_bss, prot,
2403 MAP_FIXED | MAP_PRIVATE | MAP_ANON, -1, 0) == -1) {
2404 error_setg_errno(errp, errno, "Error mapping bss");
2405 return false;
2406 }
2407 return true;
2408 }
2409
2410 #if defined(TARGET_ARM)
2411 static int elf_is_fdpic(struct elfhdr *exec)
2412 {
2413 return exec->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC;
2414 }
2415 #elif defined(TARGET_XTENSA)
2416 static int elf_is_fdpic(struct elfhdr *exec)
2417 {
2418 return exec->e_ident[EI_OSABI] == ELFOSABI_XTENSA_FDPIC;
2419 }
2420 #else
2421 /* Default implementation, always false. */
2422 static int elf_is_fdpic(struct elfhdr *exec)
2423 {
2424 return 0;
2425 }
2426 #endif
2427
2428 static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp)
2429 {
2430 uint16_t n;
2431 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs;
2432
2433 /* elf32_fdpic_loadseg */
2434 n = info->nsegs;
2435 while (n--) {
2436 sp -= 12;
2437 put_user_u32(loadsegs[n].addr, sp+0);
2438 put_user_u32(loadsegs[n].p_vaddr, sp+4);
2439 put_user_u32(loadsegs[n].p_memsz, sp+8);
2440 }
2441
2442 /* elf32_fdpic_loadmap */
2443 sp -= 4;
2444 put_user_u16(0, sp+0); /* version */
2445 put_user_u16(info->nsegs, sp+2); /* nsegs */
2446
2447 info->personality = PER_LINUX_FDPIC;
2448 info->loadmap_addr = sp;
2449
2450 return sp;
2451 }
2452
2453 static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc,
2454 struct elfhdr *exec,
2455 struct image_info *info,
2456 struct image_info *interp_info,
2457 struct image_info *vdso_info)
2458 {
2459 abi_ulong sp;
2460 abi_ulong u_argc, u_argv, u_envp, u_auxv;
2461 int size;
2462 int i;
2463 abi_ulong u_rand_bytes;
2464 uint8_t k_rand_bytes[16];
2465 abi_ulong u_platform, u_base_platform;
2466 const char *k_platform, *k_base_platform;
2467 const int n = sizeof(elf_addr_t);
2468
2469 sp = p;
2470
2471 /* Needs to be before we load the env/argc/... */
2472 if (elf_is_fdpic(exec)) {
2473 /* Need 4 byte alignment for these structs */
2474 sp &= ~3;
2475 sp = loader_build_fdpic_loadmap(info, sp);
2476 info->other_info = interp_info;
2477 if (interp_info) {
2478 interp_info->other_info = info;
2479 sp = loader_build_fdpic_loadmap(interp_info, sp);
2480 info->interpreter_loadmap_addr = interp_info->loadmap_addr;
2481 info->interpreter_pt_dynamic_addr = interp_info->pt_dynamic_addr;
2482 } else {
2483 info->interpreter_loadmap_addr = 0;
2484 info->interpreter_pt_dynamic_addr = 0;
2485 }
2486 }
2487
2488 u_base_platform = 0;
2489 k_base_platform = ELF_BASE_PLATFORM;
2490 if (k_base_platform) {
2491 size_t len = strlen(k_base_platform) + 1;
2492 if (STACK_GROWS_DOWN) {
2493 sp -= (len + n - 1) & ~(n - 1);
2494 u_base_platform = sp;
2495 /* FIXME - check return value of memcpy_to_target() for failure */
2496 memcpy_to_target(sp, k_base_platform, len);
2497 } else {
2498 memcpy_to_target(sp, k_base_platform, len);
2499 u_base_platform = sp;
2500 sp += len + 1;
2501 }
2502 }
2503
2504 u_platform = 0;
2505 k_platform = ELF_PLATFORM;
2506 if (k_platform) {
2507 size_t len = strlen(k_platform) + 1;
2508 if (STACK_GROWS_DOWN) {
2509 sp -= (len + n - 1) & ~(n - 1);
2510 u_platform = sp;
2511 /* FIXME - check return value of memcpy_to_target() for failure */
2512 memcpy_to_target(sp, k_platform, len);
2513 } else {
2514 memcpy_to_target(sp, k_platform, len);
2515 u_platform = sp;
2516 sp += len + 1;
2517 }
2518 }
2519
2520 /* Provide 16 byte alignment for the PRNG, and basic alignment for
2521 * the argv and envp pointers.
2522 */
2523 if (STACK_GROWS_DOWN) {
2524 sp = QEMU_ALIGN_DOWN(sp, 16);
2525 } else {
2526 sp = QEMU_ALIGN_UP(sp, 16);
2527 }
2528
2529 /*
2530 * Generate 16 random bytes for userspace PRNG seeding.
2531 */
2532 qemu_guest_getrandom_nofail(k_rand_bytes, sizeof(k_rand_bytes));
2533 if (STACK_GROWS_DOWN) {
2534 sp -= 16;
2535 u_rand_bytes = sp;
2536 /* FIXME - check return value of memcpy_to_target() for failure */
2537 memcpy_to_target(sp, k_rand_bytes, 16);
2538 } else {
2539 memcpy_to_target(sp, k_rand_bytes, 16);
2540 u_rand_bytes = sp;
2541 sp += 16;
2542 }
2543
2544 size = (DLINFO_ITEMS + 1) * 2;
2545 if (k_base_platform) {
2546 size += 2;
2547 }
2548 if (k_platform) {
2549 size += 2;
2550 }
2551 if (vdso_info) {
2552 size += 2;
2553 }
2554 #ifdef DLINFO_ARCH_ITEMS
2555 size += DLINFO_ARCH_ITEMS * 2;
2556 #endif
2557 #ifdef ELF_HWCAP2
2558 size += 2;
2559 #endif
2560 info->auxv_len = size * n;
2561
2562 size += envc + argc + 2;
2563 size += 1; /* argc itself */
2564 size *= n;
2565
2566 /* Allocate space and finalize stack alignment for entry now. */
2567 if (STACK_GROWS_DOWN) {
2568 u_argc = QEMU_ALIGN_DOWN(sp - size, STACK_ALIGNMENT);
2569 sp = u_argc;
2570 } else {
2571 u_argc = sp;
2572 sp = QEMU_ALIGN_UP(sp + size, STACK_ALIGNMENT);
2573 }
2574
2575 u_argv = u_argc + n;
2576 u_envp = u_argv + (argc + 1) * n;
2577 u_auxv = u_envp + (envc + 1) * n;
2578 info->saved_auxv = u_auxv;
2579 info->argc = argc;
2580 info->envc = envc;
2581 info->argv = u_argv;
2582 info->envp = u_envp;
2583
2584 /* This is correct because Linux defines
2585 * elf_addr_t as Elf32_Off / Elf64_Off
2586 */
2587 #define NEW_AUX_ENT(id, val) do { \
2588 put_user_ual(id, u_auxv); u_auxv += n; \
2589 put_user_ual(val, u_auxv); u_auxv += n; \
2590 } while(0)
2591
2592 #ifdef ARCH_DLINFO
2593 /*
2594 * ARCH_DLINFO must come first so platform specific code can enforce
2595 * special alignment requirements on the AUXV if necessary (eg. PPC).
2596 */
2597 ARCH_DLINFO;
2598 #endif
2599 /* There must be exactly DLINFO_ITEMS entries here, or the assert
2600 * on info->auxv_len will trigger.
2601 */
2602 NEW_AUX_ENT(AT_PHDR, (abi_ulong)(info->load_addr + exec->e_phoff));
2603 NEW_AUX_ENT(AT_PHENT, (abi_ulong)(sizeof (struct elf_phdr)));
2604 NEW_AUX_ENT(AT_PHNUM, (abi_ulong)(exec->e_phnum));
2605 NEW_AUX_ENT(AT_PAGESZ, (abi_ulong)(TARGET_PAGE_SIZE));
2606 NEW_AUX_ENT(AT_BASE, (abi_ulong)(interp_info ? interp_info->load_addr : 0));
2607 NEW_AUX_ENT(AT_FLAGS, (abi_ulong)0);
2608 NEW_AUX_ENT(AT_ENTRY, info->entry);
2609 NEW_AUX_ENT(AT_UID, (abi_ulong) getuid());
2610 NEW_AUX_ENT(AT_EUID, (abi_ulong) geteuid());
2611 NEW_AUX_ENT(AT_GID, (abi_ulong) getgid());
2612 NEW_AUX_ENT(AT_EGID, (abi_ulong) getegid());
2613 NEW_AUX_ENT(AT_HWCAP, (abi_ulong) ELF_HWCAP);
2614 NEW_AUX_ENT(AT_CLKTCK, (abi_ulong) sysconf(_SC_CLK_TCK));
2615 NEW_AUX_ENT(AT_RANDOM, (abi_ulong) u_rand_bytes);
2616 NEW_AUX_ENT(AT_SECURE, (abi_ulong) qemu_getauxval(AT_SECURE));
2617 NEW_AUX_ENT(AT_EXECFN, info->file_string);
2618
2619 #ifdef ELF_HWCAP2
2620 NEW_AUX_ENT(AT_HWCAP2, (abi_ulong) ELF_HWCAP2);
2621 #endif
2622
2623 if (u_base_platform) {
2624 NEW_AUX_ENT(AT_BASE_PLATFORM, u_base_platform);
2625 }
2626 if (u_platform) {
2627 NEW_AUX_ENT(AT_PLATFORM, u_platform);
2628 }
2629 if (vdso_info) {
2630 NEW_AUX_ENT(AT_SYSINFO_EHDR, vdso_info->load_addr);
2631 }
2632 NEW_AUX_ENT (AT_NULL, 0);
2633 #undef NEW_AUX_ENT
2634
2635 /* Check that our initial calculation of the auxv length matches how much
2636 * we actually put into it.
2637 */
2638 assert(info->auxv_len == u_auxv - info->saved_auxv);
2639
2640 put_user_ual(argc, u_argc);
2641
2642 p = info->arg_strings;
2643 for (i = 0; i < argc; ++i) {
2644 put_user_ual(p, u_argv);
2645 u_argv += n;
2646 p += target_strlen(p) + 1;
2647 }
2648 put_user_ual(0, u_argv);
2649
2650 p = info->env_strings;
2651 for (i = 0; i < envc; ++i) {
2652 put_user_ual(p, u_envp);
2653 u_envp += n;
2654 p += target_strlen(p) + 1;
2655 }
2656 put_user_ual(0, u_envp);
2657
2658 return sp;
2659 }
2660
2661 #if defined(HI_COMMPAGE)
2662 #define LO_COMMPAGE -1
2663 #elif defined(LO_COMMPAGE)
2664 #define HI_COMMPAGE 0
2665 #else
2666 #define HI_COMMPAGE 0
2667 #define LO_COMMPAGE -1
2668 #ifndef INIT_GUEST_COMMPAGE
2669 #define init_guest_commpage() true
2670 #endif
2671 #endif
2672
2673 /**
2674 * pgb_try_mmap:
2675 * @addr: host start address
2676 * @addr_last: host last address
2677 * @keep: do not unmap the probe region
2678 *
2679 * Return 1 if [@addr, @addr_last] is not mapped in the host,
2680 * return 0 if it is not available to map, and -1 on mmap error.
2681 * If @keep, the region is left mapped on success, otherwise unmapped.
2682 */
2683 static int pgb_try_mmap(uintptr_t addr, uintptr_t addr_last, bool keep)
2684 {
2685 size_t size = addr_last - addr + 1;
2686 void *p = mmap((void *)addr, size, PROT_NONE,
2687 MAP_ANONYMOUS | MAP_PRIVATE |
2688 MAP_NORESERVE | MAP_FIXED_NOREPLACE, -1, 0);
2689 int ret;
2690
2691 if (p == MAP_FAILED) {
2692 return errno == EEXIST ? 0 : -1;
2693 }
2694 ret = p == (void *)addr;
2695 if (!keep || !ret) {
2696 munmap(p, size);
2697 }
2698 return ret;
2699 }
2700
2701 /**
2702 * pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t size, uintptr_t brk)
2703 * @addr: host address
2704 * @addr_last: host last address
2705 * @brk: host brk
2706 *
2707 * Like pgb_try_mmap, but additionally reserve some memory following brk.
2708 */
2709 static int pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t addr_last,
2710 uintptr_t brk, bool keep)
2711 {
2712 uintptr_t brk_last = brk + 16 * MiB - 1;
2713
2714 /* Do not map anything close to the host brk. */
2715 if (addr <= brk_last && brk <= addr_last) {
2716 return 0;
2717 }
2718 return pgb_try_mmap(addr, addr_last, keep);
2719 }
2720
2721 /**
2722 * pgb_try_mmap_set:
2723 * @ga: set of guest addrs
2724 * @base: guest_base
2725 * @brk: host brk
2726 *
2727 * Return true if all @ga can be mapped by the host at @base.
2728 * On success, retain the mapping at index 0 for reserved_va.
2729 */
2730
2731 typedef struct PGBAddrs {
2732 uintptr_t bounds[3][2]; /* start/last pairs */
2733 int nbounds;
2734 } PGBAddrs;
2735
2736 static bool pgb_try_mmap_set(const PGBAddrs *ga, uintptr_t base, uintptr_t brk)
2737 {
2738 for (int i = ga->nbounds - 1; i >= 0; --i) {
2739 if (pgb_try_mmap_skip_brk(ga->bounds[i][0] + base,
2740 ga->bounds[i][1] + base,
2741 brk, i == 0 && reserved_va) <= 0) {
2742 return false;
2743 }
2744 }
2745 return true;
2746 }
2747
2748 /**
2749 * pgb_addr_set:
2750 * @ga: output set of guest addrs
2751 * @guest_loaddr: guest image low address
2752 * @guest_loaddr: guest image high address
2753 * @identity: create for identity mapping
2754 *
2755 * Fill in @ga with the image, COMMPAGE and NULL page.
2756 */
2757 static bool pgb_addr_set(PGBAddrs *ga, abi_ulong guest_loaddr,
2758 abi_ulong guest_hiaddr, bool try_identity)
2759 {
2760 int n;
2761
2762 /*
2763 * With a low commpage, or a guest mapped very low,
2764 * we may not be able to use the identity map.
2765 */
2766 if (try_identity) {
2767 if (LO_COMMPAGE != -1 && LO_COMMPAGE < mmap_min_addr) {
2768 return false;
2769 }
2770 if (guest_loaddr != 0 && guest_loaddr < mmap_min_addr) {
2771 return false;
2772 }
2773 }
2774
2775 memset(ga, 0, sizeof(*ga));
2776 n = 0;
2777
2778 if (reserved_va) {
2779 ga->bounds[n][0] = try_identity ? mmap_min_addr : 0;
2780 ga->bounds[n][1] = reserved_va;
2781 n++;
2782 /* LO_COMMPAGE and NULL handled by reserving from 0. */
2783 } else {
2784 /* Add any LO_COMMPAGE or NULL page. */
2785 if (LO_COMMPAGE != -1) {
2786 ga->bounds[n][0] = 0;
2787 ga->bounds[n][1] = LO_COMMPAGE + TARGET_PAGE_SIZE - 1;
2788 n++;
2789 } else if (!try_identity) {
2790 ga->bounds[n][0] = 0;
2791 ga->bounds[n][1] = TARGET_PAGE_SIZE - 1;
2792 n++;
2793 }
2794
2795 /* Add the guest image for ET_EXEC. */
2796 if (guest_loaddr) {
2797 ga->bounds[n][0] = guest_loaddr;
2798 ga->bounds[n][1] = guest_hiaddr;
2799 n++;
2800 }
2801 }
2802
2803 /*
2804 * Temporarily disable
2805 * "comparison is always false due to limited range of data type"
2806 * due to comparison between unsigned and (possible) 0.
2807 */
2808 #pragma GCC diagnostic push
2809 #pragma GCC diagnostic ignored "-Wtype-limits"
2810
2811 /* Add any HI_COMMPAGE not covered by reserved_va. */
2812 if (reserved_va < HI_COMMPAGE) {
2813 ga->bounds[n][0] = HI_COMMPAGE & qemu_real_host_page_mask();
2814 ga->bounds[n][1] = HI_COMMPAGE + TARGET_PAGE_SIZE - 1;
2815 n++;
2816 }
2817
2818 #pragma GCC diagnostic pop
2819
2820 ga->nbounds = n;
2821 return true;
2822 }
2823
2824 static void pgb_fail_in_use(const char *image_name)
2825 {
2826 error_report("%s: requires virtual address space that is in use "
2827 "(omit the -B option or choose a different value)",
2828 image_name);
2829 exit(EXIT_FAILURE);
2830 }
2831
2832 static void pgb_fixed(const char *image_name, uintptr_t guest_loaddr,
2833 uintptr_t guest_hiaddr, uintptr_t align)
2834 {
2835 PGBAddrs ga;
2836 uintptr_t brk = (uintptr_t)sbrk(0);
2837
2838 if (!QEMU_IS_ALIGNED(guest_base, align)) {
2839 fprintf(stderr, "Requested guest base %p does not satisfy "
2840 "host minimum alignment (0x%" PRIxPTR ")\n",
2841 (void *)guest_base, align);
2842 exit(EXIT_FAILURE);
2843 }
2844
2845 if (!pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, !guest_base)
2846 || !pgb_try_mmap_set(&ga, guest_base, brk)) {
2847 pgb_fail_in_use(image_name);
2848 }
2849 }
2850
2851 /**
2852 * pgb_find_fallback:
2853 *
2854 * This is a fallback method for finding holes in the host address space
2855 * if we don't have the benefit of being able to access /proc/self/map.
2856 * It can potentially take a very long time as we can only dumbly iterate
2857 * up the host address space seeing if the allocation would work.
2858 */
2859 static uintptr_t pgb_find_fallback(const PGBAddrs *ga, uintptr_t align,
2860 uintptr_t brk)
2861 {
2862 /* TODO: come up with a better estimate of how much to skip. */
2863 uintptr_t skip = sizeof(uintptr_t) == 4 ? MiB : GiB;
2864
2865 for (uintptr_t base = skip; ; base += skip) {
2866 base = ROUND_UP(base, align);
2867 if (pgb_try_mmap_set(ga, base, brk)) {
2868 return base;
2869 }
2870 if (base >= -skip) {
2871 return -1;
2872 }
2873 }
2874 }
2875
2876 static uintptr_t pgb_try_itree(const PGBAddrs *ga, uintptr_t base,
2877 IntervalTreeRoot *root)
2878 {
2879 for (int i = ga->nbounds - 1; i >= 0; --i) {
2880 uintptr_t s = base + ga->bounds[i][0];
2881 uintptr_t l = base + ga->bounds[i][1];
2882 IntervalTreeNode *n;
2883
2884 if (l < s) {
2885 /* Wraparound. Skip to advance S to mmap_min_addr. */
2886 return mmap_min_addr - s;
2887 }
2888
2889 n = interval_tree_iter_first(root, s, l);
2890 if (n != NULL) {
2891 /* Conflict. Skip to advance S to LAST + 1. */
2892 return n->last - s + 1;
2893 }
2894 }
2895 return 0; /* success */
2896 }
2897
2898 static uintptr_t pgb_find_itree(const PGBAddrs *ga, IntervalTreeRoot *root,
2899 uintptr_t align, uintptr_t brk)
2900 {
2901 uintptr_t last = mmap_min_addr;
2902 uintptr_t base, skip;
2903
2904 while (true) {
2905 base = ROUND_UP(last, align);
2906 if (base < last) {
2907 return -1;
2908 }
2909
2910 skip = pgb_try_itree(ga, base, root);
2911 if (skip == 0) {
2912 break;
2913 }
2914
2915 last = base + skip;
2916 if (last < base) {
2917 return -1;
2918 }
2919 }
2920
2921 /*
2922 * We've chosen 'base' based on holes in the interval tree,
2923 * but we don't yet know if it is a valid host address.
2924 * Because it is the first matching hole, if the host addresses
2925 * are invalid we know there are no further matches.
2926 */
2927 return pgb_try_mmap_set(ga, base, brk) ? base : -1;
2928 }
2929
2930 static void pgb_dynamic(const char *image_name, uintptr_t guest_loaddr,
2931 uintptr_t guest_hiaddr, uintptr_t align)
2932 {
2933 IntervalTreeRoot *root;
2934 uintptr_t brk, ret;
2935 PGBAddrs ga;
2936
2937 /* Try the identity map first. */
2938 if (pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, true)) {
2939 brk = (uintptr_t)sbrk(0);
2940 if (pgb_try_mmap_set(&ga, 0, brk)) {
2941 guest_base = 0;
2942 return;
2943 }
2944 }
2945
2946 /*
2947 * Rebuild the address set for non-identity map.
2948 * This differs in the mapping of the guest NULL page.
2949 */
2950 pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, false);
2951
2952 root = read_self_maps();
2953
2954 /* Read brk after we've read the maps, which will malloc. */
2955 brk = (uintptr_t)sbrk(0);
2956
2957 if (!root) {
2958 ret = pgb_find_fallback(&ga, align, brk);
2959 } else {
2960 /*
2961 * Reserve the area close to the host brk.
2962 * This will be freed with the rest of the tree.
2963 */
2964 IntervalTreeNode *b = g_new0(IntervalTreeNode, 1);
2965 b->start = brk;
2966 b->last = brk + 16 * MiB - 1;
2967 interval_tree_insert(b, root);
2968
2969 ret = pgb_find_itree(&ga, root, align, brk);
2970 free_self_maps(root);
2971 }
2972
2973 if (ret == -1) {
2974 int w = TARGET_LONG_BITS / 4;
2975
2976 error_report("%s: Unable to find a guest_base to satisfy all "
2977 "guest address mapping requirements", image_name);
2978
2979 for (int i = 0; i < ga.nbounds; ++i) {
2980 error_printf(" %0*" PRIx64 "-%0*" PRIx64 "\n",
2981 w, (uint64_t)ga.bounds[i][0],
2982 w, (uint64_t)ga.bounds[i][1]);
2983 }
2984 exit(EXIT_FAILURE);
2985 }
2986 guest_base = ret;
2987 }
2988
2989 void probe_guest_base(const char *image_name, abi_ulong guest_loaddr,
2990 abi_ulong guest_hiaddr)
2991 {
2992 /* In order to use host shmat, we must be able to honor SHMLBA. */
2993 uintptr_t align = MAX(SHMLBA, TARGET_PAGE_SIZE);
2994
2995 /* Sanity check the guest binary. */
2996 if (reserved_va) {
2997 if (guest_hiaddr > reserved_va) {
2998 error_report("%s: requires more than reserved virtual "
2999 "address space (0x%" PRIx64 " > 0x%lx)",
3000 image_name, (uint64_t)guest_hiaddr, reserved_va);
3001 exit(EXIT_FAILURE);
3002 }
3003 } else {
3004 if (guest_hiaddr != (uintptr_t)guest_hiaddr) {
3005 error_report("%s: requires more virtual address space "
3006 "than the host can provide (0x%" PRIx64 ")",
3007 image_name, (uint64_t)guest_hiaddr + 1);
3008 exit(EXIT_FAILURE);
3009 }
3010 }
3011
3012 if (have_guest_base) {
3013 pgb_fixed(image_name, guest_loaddr, guest_hiaddr, align);
3014 } else {
3015 pgb_dynamic(image_name, guest_loaddr, guest_hiaddr, align);
3016 }
3017
3018 /* Reserve and initialize the commpage. */
3019 if (!init_guest_commpage()) {
3020 /* We have already probed for the commpage being free. */
3021 g_assert_not_reached();
3022 }
3023
3024 assert(QEMU_IS_ALIGNED(guest_base, align));
3025 qemu_log_mask(CPU_LOG_PAGE, "Locating guest address space "
3026 "@ 0x%" PRIx64 "\n", (uint64_t)guest_base);
3027 }
3028
3029 enum {
3030 /* The string "GNU\0" as a magic number. */
3031 GNU0_MAGIC = const_le32('G' | 'N' << 8 | 'U' << 16),
3032 NOTE_DATA_SZ = 1 * KiB,
3033 NOTE_NAME_SZ = 4,
3034 ELF_GNU_PROPERTY_ALIGN = ELF_CLASS == ELFCLASS32 ? 4 : 8,
3035 };
3036
3037 /*
3038 * Process a single gnu_property entry.
3039 * Return false for error.
3040 */
3041 static bool parse_elf_property(const uint32_t *data, int *off, int datasz,
3042 struct image_info *info, bool have_prev_type,
3043 uint32_t *prev_type, Error **errp)
3044 {
3045 uint32_t pr_type, pr_datasz, step;
3046
3047 if (*off > datasz || !QEMU_IS_ALIGNED(*off, ELF_GNU_PROPERTY_ALIGN)) {
3048 goto error_data;
3049 }
3050 datasz -= *off;
3051 data += *off / sizeof(uint32_t);
3052
3053 if (datasz < 2 * sizeof(uint32_t)) {
3054 goto error_data;
3055 }
3056 pr_type = data[0];
3057 pr_datasz = data[1];
3058 data += 2;
3059 datasz -= 2 * sizeof(uint32_t);
3060 step = ROUND_UP(pr_datasz, ELF_GNU_PROPERTY_ALIGN);
3061 if (step > datasz) {
3062 goto error_data;
3063 }
3064
3065 /* Properties are supposed to be unique and sorted on pr_type. */
3066 if (have_prev_type && pr_type <= *prev_type) {
3067 if (pr_type == *prev_type) {
3068 error_setg(errp, "Duplicate property in PT_GNU_PROPERTY");
3069 } else {
3070 error_setg(errp, "Unsorted property in PT_GNU_PROPERTY");
3071 }
3072 return false;
3073 }
3074 *prev_type = pr_type;
3075
3076 if (!arch_parse_elf_property(pr_type, pr_datasz, data, info, errp)) {
3077 return false;
3078 }
3079
3080 *off += 2 * sizeof(uint32_t) + step;
3081 return true;
3082
3083 error_data:
3084 error_setg(errp, "Ill-formed property in PT_GNU_PROPERTY");
3085 return false;
3086 }
3087
3088 /* Process NT_GNU_PROPERTY_TYPE_0. */
3089 static bool parse_elf_properties(const ImageSource *src,
3090 struct image_info *info,
3091 const struct elf_phdr *phdr,
3092 Error **errp)
3093 {
3094 union {
3095 struct elf_note nhdr;
3096 uint32_t data[NOTE_DATA_SZ / sizeof(uint32_t)];
3097 } note;
3098
3099 int n, off, datasz;
3100 bool have_prev_type;
3101 uint32_t prev_type;
3102
3103 /* Unless the arch requires properties, ignore them. */
3104 if (!ARCH_USE_GNU_PROPERTY) {
3105 return true;
3106 }
3107
3108 /* If the properties are crazy large, that's too bad. */
3109 n = phdr->p_filesz;
3110 if (n > sizeof(note)) {
3111 error_setg(errp, "PT_GNU_PROPERTY too large");
3112 return false;
3113 }
3114 if (n < sizeof(note.nhdr)) {
3115 error_setg(errp, "PT_GNU_PROPERTY too small");
3116 return false;
3117 }
3118
3119 if (!imgsrc_read(&note, phdr->p_offset, n, src, errp)) {
3120 return false;
3121 }
3122
3123 /*
3124 * The contents of a valid PT_GNU_PROPERTY is a sequence of uint32_t.
3125 * Swap most of them now, beyond the header and namesz.
3126 */
3127 #ifdef BSWAP_NEEDED
3128 for (int i = 4; i < n / 4; i++) {
3129 bswap32s(note.data + i);
3130 }
3131 #endif
3132
3133 /*
3134 * Note that nhdr is 3 words, and that the "name" described by namesz
3135 * immediately follows nhdr and is thus at the 4th word. Further, all
3136 * of the inputs to the kernel's round_up are multiples of 4.
3137 */
3138 if (tswap32(note.nhdr.n_type) != NT_GNU_PROPERTY_TYPE_0 ||
3139 tswap32(note.nhdr.n_namesz) != NOTE_NAME_SZ ||
3140 note.data[3] != GNU0_MAGIC) {
3141 error_setg(errp, "Invalid note in PT_GNU_PROPERTY");
3142 return false;
3143 }
3144 off = sizeof(note.nhdr) + NOTE_NAME_SZ;
3145
3146 datasz = tswap32(note.nhdr.n_descsz) + off;
3147 if (datasz > n) {
3148 error_setg(errp, "Invalid note size in PT_GNU_PROPERTY");
3149 return false;
3150 }
3151
3152 have_prev_type = false;
3153 prev_type = 0;
3154 while (1) {
3155 if (off == datasz) {
3156 return true; /* end, exit ok */
3157 }
3158 if (!parse_elf_property(note.data, &off, datasz, info,
3159 have_prev_type, &prev_type, errp)) {
3160 return false;
3161 }
3162 have_prev_type = true;
3163 }
3164 }
3165
3166 /**
3167 * load_elf_image: Load an ELF image into the address space.
3168 * @image_name: the filename of the image, to use in error messages.
3169 * @src: the ImageSource from which to read.
3170 * @info: info collected from the loaded image.
3171 * @ehdr: the ELF header, not yet bswapped.
3172 * @pinterp_name: record any PT_INTERP string found.
3173 *
3174 * On return: @info values will be filled in, as necessary or available.
3175 */
3176
3177 static void load_elf_image(const char *image_name, const ImageSource *src,
3178 struct image_info *info, struct elfhdr *ehdr,
3179 char **pinterp_name)
3180 {
3181 g_autofree struct elf_phdr *phdr = NULL;
3182 abi_ulong load_addr, load_bias, loaddr, hiaddr, error;
3183 int i, prot_exec;
3184 Error *err = NULL;
3185
3186 /*
3187 * First of all, some simple consistency checks.
3188 * Note that we rely on the bswapped ehdr staying in bprm_buf,
3189 * for later use by load_elf_binary and create_elf_tables.
3190 */
3191 if (!imgsrc_read(ehdr, 0, sizeof(*ehdr), src, &err)) {
3192 goto exit_errmsg;
3193 }
3194 if (!elf_check_ident(ehdr)) {
3195 error_setg(&err, "Invalid ELF image for this architecture");
3196 goto exit_errmsg;
3197 }
3198 bswap_ehdr(ehdr);
3199 if (!elf_check_ehdr(ehdr)) {
3200 error_setg(&err, "Invalid ELF image for this architecture");
3201 goto exit_errmsg;
3202 }
3203
3204 phdr = imgsrc_read_alloc(ehdr->e_phoff,
3205 ehdr->e_phnum * sizeof(struct elf_phdr),
3206 src, &err);
3207 if (phdr == NULL) {
3208 goto exit_errmsg;
3209 }
3210 bswap_phdr(phdr, ehdr->e_phnum);
3211
3212 info->nsegs = 0;
3213 info->pt_dynamic_addr = 0;
3214
3215 mmap_lock();
3216
3217 /*
3218 * Find the maximum size of the image and allocate an appropriate
3219 * amount of memory to handle that. Locate the interpreter, if any.
3220 */
3221 loaddr = -1, hiaddr = 0;
3222 info->alignment = 0;
3223 info->exec_stack = EXSTACK_DEFAULT;
3224 for (i = 0; i < ehdr->e_phnum; ++i) {
3225 struct elf_phdr *eppnt = phdr + i;
3226 if (eppnt->p_type == PT_LOAD) {
3227 abi_ulong a = eppnt->p_vaddr & TARGET_PAGE_MASK;
3228 if (a < loaddr) {
3229 loaddr = a;
3230 }
3231 a = eppnt->p_vaddr + eppnt->p_memsz - 1;
3232 if (a > hiaddr) {
3233 hiaddr = a;
3234 }
3235 ++info->nsegs;
3236 info->alignment |= eppnt->p_align;
3237 } else if (eppnt->p_type == PT_INTERP && pinterp_name) {
3238 g_autofree char *interp_name = NULL;
3239
3240 if (*pinterp_name) {
3241 error_setg(&err, "Multiple PT_INTERP entries");
3242 goto exit_errmsg;
3243 }
3244
3245 interp_name = imgsrc_read_alloc(eppnt->p_offset, eppnt->p_filesz,
3246 src, &err);
3247 if (interp_name == NULL) {
3248 goto exit_errmsg;
3249 }
3250 if (interp_name[eppnt->p_filesz - 1] != 0) {
3251 error_setg(&err, "Invalid PT_INTERP entry");
3252 goto exit_errmsg;
3253 }
3254 *pinterp_name = g_steal_pointer(&interp_name);
3255 } else if (eppnt->p_type == PT_GNU_PROPERTY) {
3256 if (!parse_elf_properties(src, info, eppnt, &err)) {
3257 goto exit_errmsg;
3258 }
3259 } else if (eppnt->p_type == PT_GNU_STACK) {
3260 info->exec_stack = eppnt->p_flags & PF_X;
3261 }
3262 }
3263
3264 load_addr = loaddr;
3265
3266 if (pinterp_name != NULL) {
3267 if (ehdr->e_type == ET_EXEC) {
3268 /*
3269 * Make sure that the low address does not conflict with
3270 * MMAP_MIN_ADDR or the QEMU application itself.
3271 */
3272 probe_guest_base(image_name, loaddr, hiaddr);
3273 } else {
3274 abi_ulong align;
3275
3276 /*
3277 * The binary is dynamic, but we still need to
3278 * select guest_base. In this case we pass a size.
3279 */
3280 probe_guest_base(image_name, 0, hiaddr - loaddr);
3281
3282 /*
3283 * Avoid collision with the loader by providing a different
3284 * default load address.
3285 */
3286 load_addr += elf_et_dyn_base;
3287
3288 /*
3289 * TODO: Better support for mmap alignment is desirable.
3290 * Since we do not have complete control over the guest
3291 * address space, we prefer the kernel to choose some address
3292 * rather than force the use of LOAD_ADDR via MAP_FIXED.
3293 * But without MAP_FIXED we cannot guarantee alignment,
3294 * only suggest it.
3295 */
3296 align = pow2ceil(info->alignment);
3297 if (align) {
3298 load_addr &= -align;
3299 }
3300 }
3301 }
3302
3303 /*
3304 * Reserve address space for all of this.
3305 *
3306 * In the case of ET_EXEC, we supply MAP_FIXED_NOREPLACE so that we get
3307 * exactly the address range that is required. Without reserved_va,
3308 * the guest address space is not isolated. We have attempted to avoid
3309 * conflict with the host program itself via probe_guest_base, but using
3310 * MAP_FIXED_NOREPLACE instead of MAP_FIXED provides an extra check.
3311 *
3312 * Otherwise this is ET_DYN, and we are searching for a location
3313 * that can hold the memory space required. If the image is
3314 * pre-linked, LOAD_ADDR will be non-zero, and the kernel should
3315 * honor that address if it happens to be free.
3316 *
3317 * In both cases, we will overwrite pages in this range with mappings
3318 * from the executable.
3319 */
3320 load_addr = target_mmap(load_addr, (size_t)hiaddr - loaddr + 1, PROT_NONE,
3321 MAP_PRIVATE | MAP_ANON | MAP_NORESERVE |
3322 (ehdr->e_type == ET_EXEC ? MAP_FIXED_NOREPLACE : 0),
3323 -1, 0);
3324 if (load_addr == -1) {
3325 goto exit_mmap;
3326 }
3327 load_bias = load_addr - loaddr;
3328
3329 if (elf_is_fdpic(ehdr)) {
3330 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs =
3331 g_malloc(sizeof(*loadsegs) * info->nsegs);
3332
3333 for (i = 0; i < ehdr->e_phnum; ++i) {
3334 switch (phdr[i].p_type) {
3335 case PT_DYNAMIC:
3336 info->pt_dynamic_addr = phdr[i].p_vaddr + load_bias;
3337 break;
3338 case PT_LOAD:
3339 loadsegs->addr = phdr[i].p_vaddr + load_bias;
3340 loadsegs->p_vaddr = phdr[i].p_vaddr;
3341 loadsegs->p_memsz = phdr[i].p_memsz;
3342 ++loadsegs;
3343 break;
3344 }
3345 }
3346 }
3347
3348 info->load_bias = load_bias;
3349 info->code_offset = load_bias;
3350 info->data_offset = load_bias;
3351 info->load_addr = load_addr;
3352 info->entry = ehdr->e_entry + load_bias;
3353 info->start_code = -1;
3354 info->end_code = 0;
3355 info->start_data = -1;
3356 info->end_data = 0;
3357 /* Usual start for brk is after all sections of the main executable. */
3358 info->brk = TARGET_PAGE_ALIGN(hiaddr + load_bias);
3359 info->elf_flags = ehdr->e_flags;
3360
3361 prot_exec = PROT_EXEC;
3362 #ifdef TARGET_AARCH64
3363 /*
3364 * If the BTI feature is present, this indicates that the executable
3365 * pages of the startup binary should be mapped with PROT_BTI, so that
3366 * branch targets are enforced.
3367 *
3368 * The startup binary is either the interpreter or the static executable.
3369 * The interpreter is responsible for all pages of a dynamic executable.
3370 *
3371 * Elf notes are backward compatible to older cpus.
3372 * Do not enable BTI unless it is supported.
3373 */
3374 if ((info->note_flags & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
3375 && (pinterp_name == NULL || *pinterp_name == 0)
3376 && cpu_isar_feature(aa64_bti, ARM_CPU(thread_cpu))) {
3377 prot_exec |= TARGET_PROT_BTI;
3378 }
3379 #endif
3380
3381 for (i = 0; i < ehdr->e_phnum; i++) {
3382 struct elf_phdr *eppnt = phdr + i;
3383 if (eppnt->p_type == PT_LOAD) {
3384 abi_ulong vaddr, vaddr_po, vaddr_ps, vaddr_ef, vaddr_em;
3385 int elf_prot = 0;
3386
3387 if (eppnt->p_flags & PF_R) {
3388 elf_prot |= PROT_READ;
3389 }
3390 if (eppnt->p_flags & PF_W) {
3391 elf_prot |= PROT_WRITE;
3392 }
3393 if (eppnt->p_flags & PF_X) {
3394 elf_prot |= prot_exec;
3395 }
3396
3397 vaddr = load_bias + eppnt->p_vaddr;
3398 vaddr_po = vaddr & ~TARGET_PAGE_MASK;
3399 vaddr_ps = vaddr & TARGET_PAGE_MASK;
3400
3401 vaddr_ef = vaddr + eppnt->p_filesz;
3402 vaddr_em = vaddr + eppnt->p_memsz;
3403
3404 /*
3405 * Some segments may be completely empty, with a non-zero p_memsz
3406 * but no backing file segment.
3407 */
3408 if (eppnt->p_filesz != 0) {
3409 error = imgsrc_mmap(vaddr_ps, eppnt->p_filesz + vaddr_po,
3410 elf_prot, MAP_PRIVATE | MAP_FIXED,
3411 src, eppnt->p_offset - vaddr_po);
3412 if (error == -1) {
3413 goto exit_mmap;
3414 }
3415 }
3416
3417 /* If the load segment requests extra zeros (e.g. bss), map it. */
3418 if (vaddr_ef < vaddr_em &&
3419 !zero_bss(vaddr_ef, vaddr_em, elf_prot, &err)) {
3420 goto exit_errmsg;
3421 }
3422
3423 /* Find the full program boundaries. */
3424 if (elf_prot & PROT_EXEC) {
3425 if (vaddr < info->start_code) {
3426 info->start_code = vaddr;
3427 }
3428 if (vaddr_ef > info->end_code) {
3429 info->end_code = vaddr_ef;
3430 }
3431 }
3432 if (elf_prot & PROT_WRITE) {
3433 if (vaddr < info->start_data) {
3434 info->start_data = vaddr;
3435 }
3436 if (vaddr_ef > info->end_data) {
3437 info->end_data = vaddr_ef;
3438 }
3439 }
3440 #ifdef TARGET_MIPS
3441 } else if (eppnt->p_type == PT_MIPS_ABIFLAGS) {
3442 Mips_elf_abiflags_v0 abiflags;
3443
3444 if (!imgsrc_read(&abiflags, eppnt->p_offset, sizeof(abiflags),
3445 src, &err)) {
3446 goto exit_errmsg;
3447 }
3448 bswap_mips_abiflags(&abiflags);
3449 info->fp_abi = abiflags.fp_abi;
3450 #endif
3451 }
3452 }
3453
3454 if (info->end_data == 0) {
3455 info->start_data = info->end_code;
3456 info->end_data = info->end_code;
3457 }
3458
3459 if (qemu_log_enabled()) {
3460 load_symbols(ehdr, src, load_bias);
3461 }
3462
3463 debuginfo_report_elf(image_name, src->fd, load_bias);
3464
3465 mmap_unlock();
3466
3467 close(src->fd);
3468 return;
3469
3470 exit_mmap:
3471 error_setg_errno(&err, errno, "Error mapping file");
3472 goto exit_errmsg;
3473 exit_errmsg:
3474 error_reportf_err(err, "%s: ", image_name);
3475 exit(-1);
3476 }
3477
3478 static void load_elf_interp(const char *filename, struct image_info *info,
3479 char bprm_buf[BPRM_BUF_SIZE])
3480 {
3481 struct elfhdr ehdr;
3482 ImageSource src;
3483 int fd, retval;
3484 Error *err = NULL;
3485
3486 fd = open(path(filename), O_RDONLY);
3487 if (fd < 0) {
3488 error_setg_file_open(&err, errno, filename);
3489 error_report_err(err);
3490 exit(-1);
3491 }
3492
3493 retval = read(fd, bprm_buf, BPRM_BUF_SIZE);
3494 if (retval < 0) {
3495 error_setg_errno(&err, errno, "Error reading file header");
3496 error_reportf_err(err, "%s: ", filename);
3497 exit(-1);
3498 }
3499
3500 src.fd = fd;
3501 src.cache = bprm_buf;
3502 src.cache_size = retval;
3503
3504 load_elf_image(filename, &src, info, &ehdr, NULL);
3505 }
3506
3507 #ifdef VDSO_HEADER
3508 #include VDSO_HEADER
3509 #define vdso_image_info() &vdso_image_info
3510 #else
3511 #define vdso_image_info() NULL
3512 #endif
3513
3514 static void load_elf_vdso(struct image_info *info, const VdsoImageInfo *vdso)
3515 {
3516 ImageSource src;
3517 struct elfhdr ehdr;
3518 abi_ulong load_bias, load_addr;
3519
3520 src.fd = -1;
3521 src.cache = vdso->image;
3522 src.cache_size = vdso->image_size;
3523
3524 load_elf_image("<internal-vdso>", &src, info, &ehdr, NULL);
3525 load_addr = info->load_addr;
3526 load_bias = info->load_bias;
3527
3528 /*
3529 * We need to relocate the VDSO image. The one built into the kernel
3530 * is built for a fixed address. The one built for QEMU is not, since
3531 * that requires close control of the guest address space.
3532 * We pre-processed the image to locate all of the addresses that need
3533 * to be updated.
3534 */
3535 for (unsigned i = 0, n = vdso->reloc_count; i < n; i++) {
3536 abi_ulong *addr = g2h_untagged(load_addr + vdso->relocs[i]);
3537 *addr = tswapal(tswapal(*addr) + load_bias);
3538 }
3539
3540 /* Install signal trampolines, if present. */
3541 if (vdso->sigreturn_ofs) {
3542 default_sigreturn = load_addr + vdso->sigreturn_ofs;
3543 }
3544 if (vdso->rt_sigreturn_ofs) {
3545 default_rt_sigreturn = load_addr + vdso->rt_sigreturn_ofs;
3546 }
3547
3548 /* Remove write from VDSO segment. */
3549 target_mprotect(info->start_data, info->end_data - info->start_data,
3550 PROT_READ | PROT_EXEC);
3551 }
3552
3553 static int symfind(const void *s0, const void *s1)
3554 {
3555 struct elf_sym *sym = (struct elf_sym *)s1;
3556 __typeof(sym->st_value) addr = *(uint64_t *)s0;
3557 int result = 0;
3558
3559 if (addr < sym->st_value) {
3560 result = -1;
3561 } else if (addr >= sym->st_value + sym->st_size) {
3562 result = 1;
3563 }
3564 return result;
3565 }
3566
3567 static const char *lookup_symbolxx(struct syminfo *s, uint64_t orig_addr)
3568 {
3569 #if ELF_CLASS == ELFCLASS32
3570 struct elf_sym *syms = s->disas_symtab.elf32;
3571 #else
3572 struct elf_sym *syms = s->disas_symtab.elf64;
3573 #endif
3574
3575 // binary search
3576 struct elf_sym *sym;
3577
3578 sym = bsearch(&orig_addr, syms, s->disas_num_syms, sizeof(*syms), symfind);
3579 if (sym != NULL) {
3580 return s->disas_strtab + sym->st_name;
3581 }
3582
3583 return "";
3584 }
3585
3586 /* FIXME: This should use elf_ops.h.inc */
3587 static int symcmp(const void *s0, const void *s1)
3588 {
3589 struct elf_sym *sym0 = (struct elf_sym *)s0;
3590 struct elf_sym *sym1 = (struct elf_sym *)s1;
3591 return (sym0->st_value < sym1->st_value)
3592 ? -1
3593 : ((sym0->st_value > sym1->st_value) ? 1 : 0);
3594 }
3595
3596 /* Best attempt to load symbols from this ELF object. */
3597 static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
3598 abi_ulong load_bias)
3599 {
3600 int i, shnum, nsyms, sym_idx = 0, str_idx = 0;
3601 g_autofree struct elf_shdr *shdr = NULL;
3602 char *strings = NULL;
3603 struct elf_sym *syms = NULL;
3604 struct elf_sym *new_syms;
3605 uint64_t segsz;
3606
3607 shnum = hdr->e_shnum;
3608 shdr = imgsrc_read_alloc(hdr->e_shoff, shnum * sizeof(struct elf_shdr),
3609 src, NULL);
3610 if (shdr == NULL) {
3611 return;
3612 }
3613
3614 bswap_shdr(shdr, shnum);
3615 for (i = 0; i < shnum; ++i) {
3616 if (shdr[i].sh_type == SHT_SYMTAB) {
3617 sym_idx = i;
3618 str_idx = shdr[i].sh_link;
3619 goto found;
3620 }
3621 }
3622
3623 /* There will be no symbol table if the file was stripped. */
3624 return;
3625
3626 found:
3627 /* Now know where the strtab and symtab are. Snarf them. */
3628
3629 segsz = shdr[str_idx].sh_size;
3630 strings = g_try_malloc(segsz);
3631 if (!strings) {
3632 goto give_up;
3633 }
3634 if (!imgsrc_read(strings, shdr[str_idx].sh_offset, segsz, src, NULL)) {
3635 goto give_up;
3636 }
3637
3638 segsz = shdr[sym_idx].sh_size;
3639 if (segsz / sizeof(struct elf_sym) > INT_MAX) {
3640 /*
3641 * Implausibly large symbol table: give up rather than ploughing
3642 * on with the number of symbols calculation overflowing.
3643 */
3644 goto give_up;
3645 }
3646 nsyms = segsz / sizeof(struct elf_sym);
3647 syms = g_try_malloc(segsz);
3648 if (!syms) {
3649 goto give_up;
3650 }
3651 if (!imgsrc_read(syms, shdr[sym_idx].sh_offset, segsz, src, NULL)) {
3652 goto give_up;
3653 }
3654
3655 for (i = 0; i < nsyms; ) {
3656 bswap_sym(syms + i);
3657 /* Throw away entries which we do not need. */
3658 if (syms[i].st_shndx == SHN_UNDEF
3659 || syms[i].st_shndx >= SHN_LORESERVE
3660 || ELF_ST_TYPE(syms[i].st_info) != STT_FUNC) {
3661 if (i < --nsyms) {
3662 syms[i] = syms[nsyms];
3663 }
3664 } else {
3665 #if defined(TARGET_ARM) || defined (TARGET_MIPS)
3666 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
3667 syms[i].st_value &= ~(target_ulong)1;
3668 #endif
3669 syms[i].st_value += load_bias;
3670 i++;
3671 }
3672 }
3673
3674 /* No "useful" symbol. */
3675 if (nsyms == 0) {
3676 goto give_up;
3677 }
3678
3679 /*
3680 * Attempt to free the storage associated with the local symbols
3681 * that we threw away. Whether or not this has any effect on the
3682 * memory allocation depends on the malloc implementation and how
3683 * many symbols we managed to discard.
3684 */
3685 new_syms = g_try_renew(struct elf_sym, syms, nsyms);
3686 if (new_syms == NULL) {
3687 goto give_up;
3688 }
3689 syms = new_syms;
3690
3691 qsort(syms, nsyms, sizeof(*syms), symcmp);
3692
3693 {
3694 struct syminfo *s = g_new(struct syminfo, 1);
3695
3696 s->disas_strtab = strings;
3697 s->disas_num_syms = nsyms;
3698 #if ELF_CLASS == ELFCLASS32
3699 s->disas_symtab.elf32 = syms;
3700 #else
3701 s->disas_symtab.elf64 = syms;
3702 #endif
3703 s->lookup_symbol = lookup_symbolxx;
3704 s->next = syminfos;
3705 syminfos = s;
3706 }
3707 return;
3708
3709 give_up:
3710 g_free(strings);
3711 g_free(syms);
3712 }
3713
3714 uint32_t get_elf_eflags(int fd)
3715 {
3716 struct elfhdr ehdr;
3717 off_t offset;
3718 int ret;
3719
3720 /* Read ELF header */
3721 offset = lseek(fd, 0, SEEK_SET);
3722 if (offset == (off_t) -1) {
3723 return 0;
3724 }
3725 ret = read(fd, &ehdr, sizeof(ehdr));
3726 if (ret < sizeof(ehdr)) {
3727 return 0;
3728 }
3729 offset = lseek(fd, offset, SEEK_SET);
3730 if (offset == (off_t) -1) {
3731 return 0;
3732 }
3733
3734 /* Check ELF signature */
3735 if (!elf_check_ident(&ehdr)) {
3736 return 0;
3737 }
3738
3739 /* check header */
3740 bswap_ehdr(&ehdr);
3741 if (!elf_check_ehdr(&ehdr)) {
3742 return 0;
3743 }
3744
3745 /* return architecture id */
3746 return ehdr.e_flags;
3747 }
3748
3749 int load_elf_binary(struct linux_binprm *bprm, struct image_info *info)
3750 {
3751 /*
3752 * We need a copy of the elf header for passing to create_elf_tables.
3753 * We will have overwritten the original when we re-use bprm->buf
3754 * while loading the interpreter. Allocate the storage for this now
3755 * and let elf_load_image do any swapping that may be required.
3756 */
3757 struct elfhdr ehdr;
3758 struct image_info interp_info, vdso_info;
3759 char *elf_interpreter = NULL;
3760 char *scratch;
3761
3762 memset(&interp_info, 0, sizeof(interp_info));
3763 #ifdef TARGET_MIPS
3764 interp_info.fp_abi = MIPS_ABI_FP_UNKNOWN;
3765 #endif
3766
3767 load_elf_image(bprm->filename, &bprm->src, info, &ehdr, &elf_interpreter);
3768
3769 /* Do this so that we can load the interpreter, if need be. We will
3770 change some of these later */
3771 bprm->p = setup_arg_pages(bprm, info);
3772
3773 scratch = g_new0(char, TARGET_PAGE_SIZE);
3774 if (STACK_GROWS_DOWN) {
3775 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3776 bprm->p, info->stack_limit);
3777 info->file_string = bprm->p;
3778 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3779 bprm->p, info->stack_limit);
3780 info->env_strings = bprm->p;
3781 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3782 bprm->p, info->stack_limit);
3783 info->arg_strings = bprm->p;
3784 } else {
3785 info->arg_strings = bprm->p;
3786 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3787 bprm->p, info->stack_limit);
3788 info->env_strings = bprm->p;
3789 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3790 bprm->p, info->stack_limit);
3791 info->file_string = bprm->p;
3792 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3793 bprm->p, info->stack_limit);
3794 }
3795
3796 g_free(scratch);
3797
3798 if (!bprm->p) {
3799 fprintf(stderr, "%s: %s\n", bprm->filename, strerror(E2BIG));
3800 exit(-1);
3801 }
3802
3803 if (elf_interpreter) {
3804 load_elf_interp(elf_interpreter, &interp_info, bprm->buf);
3805
3806 /*
3807 * While unusual because of ELF_ET_DYN_BASE, if we are unlucky
3808 * with the mappings the interpreter can be loaded above but
3809 * near the main executable, which can leave very little room
3810 * for the heap.
3811 * If the current brk has less than 16MB, use the end of the
3812 * interpreter.
3813 */
3814 if (interp_info.brk > info->brk &&
3815 interp_info.load_bias - info->brk < 16 * MiB) {
3816 info->brk = interp_info.brk;
3817 }
3818
3819 /* If the program interpreter is one of these two, then assume
3820 an iBCS2 image. Otherwise assume a native linux image. */
3821
3822 if (strcmp(elf_interpreter, "/usr/lib/libc.so.1") == 0
3823 || strcmp(elf_interpreter, "/usr/lib/ld.so.1") == 0) {
3824 info->personality = PER_SVR4;
3825
3826 /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
3827 and some applications "depend" upon this behavior. Since
3828 we do not have the power to recompile these, we emulate
3829 the SVr4 behavior. Sigh. */
3830 target_mmap(0, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC,
3831 MAP_FIXED_NOREPLACE | MAP_PRIVATE | MAP_ANONYMOUS,
3832 -1, 0);
3833 }
3834 #ifdef TARGET_MIPS
3835 info->interp_fp_abi = interp_info.fp_abi;
3836 #endif
3837 }
3838
3839 /*
3840 * Load a vdso if available, which will amongst other things contain the
3841 * signal trampolines. Otherwise, allocate a separate page for them.
3842 */
3843 const VdsoImageInfo *vdso = vdso_image_info();
3844 if (vdso) {
3845 load_elf_vdso(&vdso_info, vdso);
3846 info->vdso = vdso_info.load_bias;
3847 } else if (TARGET_ARCH_HAS_SIGTRAMP_PAGE) {
3848 abi_long tramp_page = target_mmap(0, TARGET_PAGE_SIZE,
3849 PROT_READ | PROT_WRITE,
3850 MAP_PRIVATE | MAP_ANON, -1, 0);
3851 if (tramp_page == -1) {
3852 return -errno;
3853 }
3854
3855 setup_sigtramp(tramp_page);
3856 target_mprotect(tramp_page, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC);
3857 }
3858
3859 bprm->p = create_elf_tables(bprm->p, bprm->argc, bprm->envc, &ehdr, info,
3860 elf_interpreter ? &interp_info : NULL,
3861 vdso ? &vdso_info : NULL);
3862 info->start_stack = bprm->p;
3863
3864 /* If we have an interpreter, set that as the program's entry point.
3865 Copy the load_bias as well, to help PPC64 interpret the entry
3866 point as a function descriptor. Do this after creating elf tables
3867 so that we copy the original program entry point into the AUXV. */
3868 if (elf_interpreter) {
3869 info->load_bias = interp_info.load_bias;
3870 info->entry = interp_info.entry;
3871 g_free(elf_interpreter);
3872 }
3873
3874 #ifdef USE_ELF_CORE_DUMP
3875 bprm->core_dump = &elf_core_dump;
3876 #endif
3877
3878 return 0;
3879 }
3880
3881 #ifdef USE_ELF_CORE_DUMP
3882 #include "exec/translate-all.h"
3883
3884 /*
3885 * Definitions to generate Intel SVR4-like core files.
3886 * These mostly have the same names as the SVR4 types with "target_elf_"
3887 * tacked on the front to prevent clashes with linux definitions,
3888 * and the typedef forms have been avoided. This is mostly like
3889 * the SVR4 structure, but more Linuxy, with things that Linux does
3890 * not support and which gdb doesn't really use excluded.
3891 *
3892 * Fields we don't dump (their contents is zero) in linux-user qemu
3893 * are marked with XXX.
3894 *
3895 * Core dump code is copied from linux kernel (fs/binfmt_elf.c).
3896 *
3897 * Porting ELF coredump for target is (quite) simple process. First you
3898 * define USE_ELF_CORE_DUMP in target ELF code (where init_thread() for
3899 * the target resides):
3900 *
3901 * #define USE_ELF_CORE_DUMP
3902 *
3903 * Next you define type of register set used for dumping. ELF specification
3904 * says that it needs to be array of elf_greg_t that has size of ELF_NREG.
3905 *
3906 * typedef <target_regtype> target_elf_greg_t;
3907 * #define ELF_NREG <number of registers>
3908 * typedef taret_elf_greg_t target_elf_gregset_t[ELF_NREG];
3909 *
3910 * Last step is to implement target specific function that copies registers
3911 * from given cpu into just specified register set. Prototype is:
3912 *
3913 * static void elf_core_copy_regs(taret_elf_gregset_t *regs,
3914 * const CPUArchState *env);
3915 *
3916 * Parameters:
3917 * regs - copy register values into here (allocated and zeroed by caller)
3918 * env - copy registers from here
3919 *
3920 * Example for ARM target is provided in this file.
3921 */
3922
3923 struct target_elf_siginfo {
3924 abi_int si_signo; /* signal number */
3925 abi_int si_code; /* extra code */
3926 abi_int si_errno; /* errno */
3927 };
3928
3929 struct target_elf_prstatus {
3930 struct target_elf_siginfo pr_info; /* Info associated with signal */
3931 abi_short pr_cursig; /* Current signal */
3932 abi_ulong pr_sigpend; /* XXX */
3933 abi_ulong pr_sighold; /* XXX */
3934 target_pid_t pr_pid;
3935 target_pid_t pr_ppid;
3936 target_pid_t pr_pgrp;
3937 target_pid_t pr_sid;
3938 struct target_timeval pr_utime; /* XXX User time */
3939 struct target_timeval pr_stime; /* XXX System time */
3940 struct target_timeval pr_cutime; /* XXX Cumulative user time */
3941 struct target_timeval pr_cstime; /* XXX Cumulative system time */
3942 target_elf_gregset_t pr_reg; /* GP registers */
3943 abi_int pr_fpvalid; /* XXX */
3944 };
3945
3946 #define ELF_PRARGSZ (80) /* Number of chars for args */
3947
3948 struct target_elf_prpsinfo {
3949 char pr_state; /* numeric process state */
3950 char pr_sname; /* char for pr_state */
3951 char pr_zomb; /* zombie */
3952 char pr_nice; /* nice val */
3953 abi_ulong pr_flag; /* flags */
3954 target_uid_t pr_uid;
3955 target_gid_t pr_gid;
3956 target_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
3957 /* Lots missing */
3958 char pr_fname[16] QEMU_NONSTRING; /* filename of executable */
3959 char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
3960 };
3961
3962 #ifdef BSWAP_NEEDED
3963 static void bswap_prstatus(struct target_elf_prstatus *prstatus)
3964 {
3965 prstatus->pr_info.si_signo = tswap32(prstatus->pr_info.si_signo);
3966 prstatus->pr_info.si_code = tswap32(prstatus->pr_info.si_code);
3967 prstatus->pr_info.si_errno = tswap32(prstatus->pr_info.si_errno);
3968 prstatus->pr_cursig = tswap16(prstatus->pr_cursig);
3969 prstatus->pr_sigpend = tswapal(prstatus->pr_sigpend);
3970 prstatus->pr_sighold = tswapal(prstatus->pr_sighold);
3971 prstatus->pr_pid = tswap32(prstatus->pr_pid);
3972 prstatus->pr_ppid = tswap32(prstatus->pr_ppid);
3973 prstatus->pr_pgrp = tswap32(prstatus->pr_pgrp);
3974 prstatus->pr_sid = tswap32(prstatus->pr_sid);
3975 /* cpu times are not filled, so we skip them */
3976 /* regs should be in correct format already */
3977 prstatus->pr_fpvalid = tswap32(prstatus->pr_fpvalid);
3978 }
3979
3980 static void bswap_psinfo(struct target_elf_prpsinfo *psinfo)
3981 {
3982 psinfo->pr_flag = tswapal(psinfo->pr_flag);
3983 psinfo->pr_uid = tswap16(psinfo->pr_uid);
3984 psinfo->pr_gid = tswap16(psinfo->pr_gid);
3985 psinfo->pr_pid = tswap32(psinfo->pr_pid);
3986 psinfo->pr_ppid = tswap32(psinfo->pr_ppid);
3987 psinfo->pr_pgrp = tswap32(psinfo->pr_pgrp);
3988 psinfo->pr_sid = tswap32(psinfo->pr_sid);
3989 }
3990
3991 static void bswap_note(struct elf_note *en)
3992 {
3993 bswap32s(&en->n_namesz);
3994 bswap32s(&en->n_descsz);
3995 bswap32s(&en->n_type);
3996 }
3997 #else
3998 static inline void bswap_prstatus(struct target_elf_prstatus *p) { }
3999 static inline void bswap_psinfo(struct target_elf_prpsinfo *p) {}
4000 static inline void bswap_note(struct elf_note *en) { }
4001 #endif /* BSWAP_NEEDED */
4002
4003 /*
4004 * Calculate file (dump) size of given memory region.
4005 */
4006 static size_t vma_dump_size(target_ulong start, target_ulong end,
4007 unsigned long flags)
4008 {
4009 /* The area must be readable. */
4010 if (!(flags & PAGE_READ)) {
4011 return 0;
4012 }
4013
4014 /*
4015 * Usually we don't dump executable pages as they contain
4016 * non-writable code that debugger can read directly from
4017 * target library etc. If there is no elf header, we dump it.
4018 */
4019 if (!(flags & PAGE_WRITE_ORG) &&
4020 (flags & PAGE_EXEC) &&
4021 memcmp(g2h_untagged(start), ELFMAG, SELFMAG) == 0) {
4022 return 0;
4023 }
4024
4025 return end - start;
4026 }
4027
4028 static size_t size_note(const char *name, size_t datasz)
4029 {
4030 size_t namesz = strlen(name) + 1;
4031
4032 namesz = ROUND_UP(namesz, 4);
4033 datasz = ROUND_UP(datasz, 4);
4034
4035 return sizeof(struct elf_note) + namesz + datasz;
4036 }
4037
4038 static void *fill_note(void **pptr, int type, const char *name, size_t datasz)
4039 {
4040 void *ptr = *pptr;
4041 struct elf_note *n = ptr;
4042 size_t namesz = strlen(name) + 1;
4043
4044 n->n_namesz = namesz;
4045 n->n_descsz = datasz;
4046 n->n_type = type;
4047 bswap_note(n);
4048
4049 ptr += sizeof(*n);
4050 memcpy(ptr, name, namesz);
4051
4052 namesz = ROUND_UP(namesz, 4);
4053 datasz = ROUND_UP(datasz, 4);
4054
4055 *pptr = ptr + namesz + datasz;
4056 return ptr + namesz;
4057 }
4058
4059 static void fill_elf_header(struct elfhdr *elf, int segs, uint16_t machine,
4060 uint32_t flags)
4061 {
4062 memcpy(elf->e_ident, ELFMAG, SELFMAG);
4063
4064 elf->e_ident[EI_CLASS] = ELF_CLASS;
4065 elf->e_ident[EI_DATA] = ELF_DATA;
4066 elf->e_ident[EI_VERSION] = EV_CURRENT;
4067 elf->e_ident[EI_OSABI] = ELF_OSABI;
4068
4069 elf->e_type = ET_CORE;
4070 elf->e_machine = machine;
4071 elf->e_version = EV_CURRENT;
4072 elf->e_phoff = sizeof(struct elfhdr);
4073 elf->e_flags = flags;
4074 elf->e_ehsize = sizeof(struct elfhdr);
4075 elf->e_phentsize = sizeof(struct elf_phdr);
4076 elf->e_phnum = segs;
4077
4078 bswap_ehdr(elf);
4079 }
4080
4081 static void fill_elf_note_phdr(struct elf_phdr *phdr, size_t sz, off_t offset)
4082 {
4083 phdr->p_type = PT_NOTE;
4084 phdr->p_offset = offset;
4085 phdr->p_filesz = sz;
4086
4087 bswap_phdr(phdr, 1);
4088 }
4089
4090 static void fill_prstatus_note(void *data, CPUState *cpu, int signr)
4091 {
4092 /*
4093 * Because note memory is only aligned to 4, and target_elf_prstatus
4094 * may well have higher alignment requirements, fill locally and
4095 * memcpy to the destination afterward.
4096 */
4097 struct target_elf_prstatus prstatus = {
4098 .pr_info.si_signo = signr,
4099 .pr_cursig = signr,
4100 .pr_pid = get_task_state(cpu)->ts_tid,
4101 .pr_ppid = getppid(),
4102 .pr_pgrp = getpgrp(),
4103 .pr_sid = getsid(0),
4104 };
4105
4106 elf_core_copy_regs(&prstatus.pr_reg, cpu_env(cpu));
4107 bswap_prstatus(&prstatus);
4108 memcpy(data, &prstatus, sizeof(prstatus));
4109 }
4110
4111 static void fill_prpsinfo_note(void *data, const TaskState *ts)
4112 {
4113 /*
4114 * Because note memory is only aligned to 4, and target_elf_prpsinfo
4115 * may well have higher alignment requirements, fill locally and
4116 * memcpy to the destination afterward.
4117 */
4118 struct target_elf_prpsinfo psinfo = {
4119 .pr_pid = getpid(),
4120 .pr_ppid = getppid(),
4121 .pr_pgrp = getpgrp(),
4122 .pr_sid = getsid(0),
4123 .pr_uid = getuid(),
4124 .pr_gid = getgid(),
4125 };
4126 char *base_filename;
4127 size_t len;
4128
4129 len = ts->info->env_strings - ts->info->arg_strings;
4130 len = MIN(len, ELF_PRARGSZ);
4131 memcpy(&psinfo.pr_psargs, g2h_untagged(ts->info->arg_strings), len);
4132 for (size_t i = 0; i < len; i++) {
4133 if (psinfo.pr_psargs[i] == 0) {
4134 psinfo.pr_psargs[i] = ' ';
4135 }
4136 }
4137
4138 base_filename = g_path_get_basename(ts->bprm->filename);
4139 /*
4140 * Using strncpy here is fine: at max-length,
4141 * this field is not NUL-terminated.
4142 */
4143 strncpy(psinfo.pr_fname, base_filename, sizeof(psinfo.pr_fname));
4144 g_free(base_filename);
4145
4146 bswap_psinfo(&psinfo);
4147 memcpy(data, &psinfo, sizeof(psinfo));
4148 }
4149
4150 static void fill_auxv_note(void *data, const TaskState *ts)
4151 {
4152 memcpy(data, g2h_untagged(ts->info->saved_auxv), ts->info->auxv_len);
4153 }
4154
4155 /*
4156 * Constructs name of coredump file. We have following convention
4157 * for the name:
4158 * qemu_<basename-of-target-binary>_<date>-<time>_<pid>.core
4159 *
4160 * Returns the filename
4161 */
4162 static char *core_dump_filename(const TaskState *ts)
4163 {
4164 g_autoptr(GDateTime) now = g_date_time_new_now_local();
4165 g_autofree char *nowstr = g_date_time_format(now, "%Y%m%d-%H%M%S");
4166 g_autofree char *base_filename = g_path_get_basename(ts->bprm->filename);
4167
4168 return g_strdup_printf("qemu_%s_%s_%d.core",
4169 base_filename, nowstr, (int)getpid());
4170 }
4171
4172 static int dump_write(int fd, const void *ptr, size_t size)
4173 {
4174 const char *bufp = (const char *)ptr;
4175 ssize_t bytes_written, bytes_left;
4176
4177 bytes_written = 0;
4178 bytes_left = size;
4179
4180 /*
4181 * In normal conditions, single write(2) should do but
4182 * in case of socket etc. this mechanism is more portable.
4183 */
4184 do {
4185 bytes_written = write(fd, bufp, bytes_left);
4186 if (bytes_written < 0) {
4187 if (errno == EINTR)
4188 continue;
4189 return (-1);
4190 } else if (bytes_written == 0) { /* eof */
4191 return (-1);
4192 }
4193 bufp += bytes_written;
4194 bytes_left -= bytes_written;
4195 } while (bytes_left > 0);
4196
4197 return (0);
4198 }
4199
4200 static int wmr_page_unprotect_regions(void *opaque, target_ulong start,
4201 target_ulong end, unsigned long flags)
4202 {
4203 if ((flags & (PAGE_WRITE | PAGE_WRITE_ORG)) == PAGE_WRITE_ORG) {
4204 size_t step = MAX(TARGET_PAGE_SIZE, qemu_real_host_page_size());
4205
4206 while (1) {
4207 page_unprotect(start, 0);
4208 if (end - start <= step) {
4209 break;
4210 }
4211 start += step;
4212 }
4213 }
4214 return 0;
4215 }
4216
4217 typedef struct {
4218 unsigned count;
4219 size_t size;
4220 } CountAndSizeRegions;
4221
4222 static int wmr_count_and_size_regions(void *opaque, target_ulong start,
4223 target_ulong end, unsigned long flags)
4224 {
4225 CountAndSizeRegions *css = opaque;
4226
4227 css->count++;
4228 css->size += vma_dump_size(start, end, flags);
4229 return 0;
4230 }
4231
4232 typedef struct {
4233 struct elf_phdr *phdr;
4234 off_t offset;
4235 } FillRegionPhdr;
4236
4237 static int wmr_fill_region_phdr(void *opaque, target_ulong start,
4238 target_ulong end, unsigned long flags)
4239 {
4240 FillRegionPhdr *d = opaque;
4241 struct elf_phdr *phdr = d->phdr;
4242
4243 phdr->p_type = PT_LOAD;
4244 phdr->p_vaddr = start;
4245 phdr->p_paddr = 0;
4246 phdr->p_filesz = vma_dump_size(start, end, flags);
4247 phdr->p_offset = d->offset;
4248 d->offset += phdr->p_filesz;
4249 phdr->p_memsz = end - start;
4250 phdr->p_flags = (flags & PAGE_READ ? PF_R : 0)
4251 | (flags & PAGE_WRITE_ORG ? PF_W : 0)
4252 | (flags & PAGE_EXEC ? PF_X : 0);
4253 phdr->p_align = ELF_EXEC_PAGESIZE;
4254
4255 bswap_phdr(phdr, 1);
4256 d->phdr = phdr + 1;
4257 return 0;
4258 }
4259
4260 static int wmr_write_region(void *opaque, target_ulong start,
4261 target_ulong end, unsigned long flags)
4262 {
4263 int fd = *(int *)opaque;
4264 size_t size = vma_dump_size(start, end, flags);
4265
4266 if (!size) {
4267 return 0;
4268 }
4269 return dump_write(fd, g2h_untagged(start), size);
4270 }
4271
4272 /*
4273 * Write out ELF coredump.
4274 *
4275 * See documentation of ELF object file format in:
4276 * http://www.caldera.com/developers/devspecs/gabi41.pdf
4277 *
4278 * Coredump format in linux is following:
4279 *
4280 * 0 +----------------------+ \
4281 * | ELF header | ET_CORE |
4282 * +----------------------+ |
4283 * | ELF program headers | |--- headers
4284 * | - NOTE section | |
4285 * | - PT_LOAD sections | |
4286 * +----------------------+ /
4287 * | NOTEs: |
4288 * | - NT_PRSTATUS |
4289 * | - NT_PRSINFO |
4290 * | - NT_AUXV |
4291 * +----------------------+ <-- aligned to target page
4292 * | Process memory dump |
4293 * : :
4294 * . .
4295 * : :
4296 * | |
4297 * +----------------------+
4298 *
4299 * NT_PRSTATUS -> struct elf_prstatus (per thread)
4300 * NT_PRSINFO -> struct elf_prpsinfo
4301 * NT_AUXV is array of { type, value } pairs (see fill_auxv_note()).
4302 *
4303 * Format follows System V format as close as possible. Current
4304 * version limitations are as follows:
4305 * - no floating point registers are dumped
4306 *
4307 * Function returns 0 in case of success, negative errno otherwise.
4308 *
4309 * TODO: make this work also during runtime: it should be
4310 * possible to force coredump from running process and then
4311 * continue processing. For example qemu could set up SIGUSR2
4312 * handler (provided that target process haven't registered
4313 * handler for that) that does the dump when signal is received.
4314 */
4315 static int elf_core_dump(int signr, const CPUArchState *env)
4316 {
4317 const CPUState *cpu = env_cpu_const(env);
4318 const TaskState *ts = (const TaskState *)get_task_state((CPUState *)cpu);
4319 struct rlimit dumpsize;
4320 CountAndSizeRegions css;
4321 off_t offset, note_offset, data_offset;
4322 size_t note_size;
4323 int cpus, ret;
4324 int fd = -1;
4325 CPUState *cpu_iter;
4326
4327 if (prctl(PR_GET_DUMPABLE) == 0) {
4328 return 0;
4329 }
4330
4331 if (getrlimit(RLIMIT_CORE, &dumpsize) < 0 || dumpsize.rlim_cur == 0) {
4332 return 0;
4333 }
4334
4335 cpu_list_lock();
4336 mmap_lock();
4337
4338 /* By unprotecting, we merge vmas that might be split. */
4339 walk_memory_regions(NULL, wmr_page_unprotect_regions);
4340
4341 /*
4342 * Walk through target process memory mappings and
4343 * set up structure containing this information.
4344 */
4345 memset(&css, 0, sizeof(css));
4346 walk_memory_regions(&css, wmr_count_and_size_regions);
4347
4348 cpus = 0;
4349 CPU_FOREACH(cpu_iter) {
4350 cpus++;
4351 }
4352
4353 offset = sizeof(struct elfhdr);
4354 offset += (css.count + 1) * sizeof(struct elf_phdr);
4355 note_offset = offset;
4356
4357 offset += size_note("CORE", ts->info->auxv_len);
4358 offset += size_note("CORE", sizeof(struct target_elf_prpsinfo));
4359 offset += size_note("CORE", sizeof(struct target_elf_prstatus)) * cpus;
4360 note_size = offset - note_offset;
4361 data_offset = ROUND_UP(offset, ELF_EXEC_PAGESIZE);
4362
4363 /* Do not dump if the corefile size exceeds the limit. */
4364 if (dumpsize.rlim_cur != RLIM_INFINITY
4365 && dumpsize.rlim_cur < data_offset + css.size) {
4366 errno = 0;
4367 goto out;
4368 }
4369
4370 {
4371 g_autofree char *corefile = core_dump_filename(ts);
4372 fd = open(corefile, O_WRONLY | O_CREAT | O_TRUNC,
4373 S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
4374 }
4375 if (fd < 0) {
4376 goto out;
4377 }
4378
4379 /*
4380 * There is a fair amount of alignment padding within the notes
4381 * as well as preceeding the process memory. Allocate a zeroed
4382 * block to hold it all. Write all of the headers directly into
4383 * this buffer and then write it out as a block.
4384 */
4385 {
4386 g_autofree void *header = g_malloc0(data_offset);
4387 FillRegionPhdr frp;
4388 void *hptr, *dptr;
4389
4390 /* Create elf file header. */
4391 hptr = header;
4392 fill_elf_header(hptr, css.count + 1, ELF_MACHINE, 0);
4393 hptr += sizeof(struct elfhdr);
4394
4395 /* Create elf program headers. */
4396 fill_elf_note_phdr(hptr, note_size, note_offset);
4397 hptr += sizeof(struct elf_phdr);
4398
4399 frp.phdr = hptr;
4400 frp.offset = data_offset;
4401 walk_memory_regions(&frp, wmr_fill_region_phdr);
4402 hptr = frp.phdr;
4403
4404 /* Create the notes. */
4405 dptr = fill_note(&hptr, NT_AUXV, "CORE", ts->info->auxv_len);
4406 fill_auxv_note(dptr, ts);
4407
4408 dptr = fill_note(&hptr, NT_PRPSINFO, "CORE",
4409 sizeof(struct target_elf_prpsinfo));
4410 fill_prpsinfo_note(dptr, ts);
4411
4412 CPU_FOREACH(cpu_iter) {
4413 dptr = fill_note(&hptr, NT_PRSTATUS, "CORE",
4414 sizeof(struct target_elf_prstatus));
4415 fill_prstatus_note(dptr, cpu_iter, cpu_iter == cpu ? signr : 0);
4416 }
4417
4418 if (dump_write(fd, header, data_offset) < 0) {
4419 goto out;
4420 }
4421 }
4422
4423 /*
4424 * Finally write process memory into the corefile as well.
4425 */
4426 if (walk_memory_regions(&fd, wmr_write_region) < 0) {
4427 goto out;
4428 }
4429 errno = 0;
4430
4431 out:
4432 ret = -errno;
4433 mmap_unlock();
4434 cpu_list_unlock();
4435 if (fd >= 0) {
4436 close(fd);
4437 }
4438 return ret;
4439 }
4440 #endif /* USE_ELF_CORE_DUMP */
4441
4442 void do_init_thread(struct target_pt_regs *regs, struct image_info *infop)
4443 {
4444 init_thread(regs, infop);
4445 }
armbru's QEMU hackery