1 /* SPDX-License-Identifier: MIT */
3 * Define target-specific register size
4 * Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
7 #ifndef TCG_TARGET_REG_BITS_H
8 #define TCG_TARGET_REG_BITS_H
11 * Loongson removed the (incomplete) 32-bit support from kernel and toolchain
12 * for the initial upstreaming of this architecture, so don't bother and just
13 * support the LP64* ABI for now.
15 #if defined(__loongarch64)
16 # define TCG_TARGET_REG_BITS 64
18 # error unsupported LoongArch register size