2 * SPDX-License-Identifier: GPL-2.0-or-later
3 * Host specific cpu identification for AArch64.
6 #include "qemu/osdep.h"
7 #include "host/cpuinfo.h"
10 # ifdef CONFIG_GETAUXVAL
11 # include <sys/auxv.h>
13 # include <asm/hwcap.h>
17 # define HWCAP2_BTI 0 /* added in glibc 2.32 */
20 #ifdef CONFIG_ELF_AUX_INFO
24 # include <sys/sysctl.h>
26 #if defined(__OpenBSD__) && !defined(CONFIG_ELF_AUX_INFO)
27 # include <machine/armreg.h>
28 # include <machine/cpu.h>
29 # include <sys/types.h>
30 # include <sys/sysctl.h>
36 static bool sysctl_for_bool(const char *name
)
39 size_t len
= sizeof(val
);
41 if (sysctlbyname(name
, &val
, &len
, NULL
, 0) == 0) {
46 * We might in the future ask for properties not present in older kernels,
47 * but we're only asking about static properties, all of which should be
48 * 'int'. So we shouldn't see ENOMEM (val too small), or any of the other
51 assert(errno
== ENOENT
);
56 /* Called both as constructor and (possibly) via other constructors. */
57 unsigned __attribute__((constructor
)) cpuinfo_init(void)
59 unsigned info
= cpuinfo
;
65 info
= CPUINFO_ALWAYS
;
67 #if defined(CONFIG_LINUX) || defined(CONFIG_ELF_AUX_INFO)
68 unsigned long hwcap
= qemu_getauxval(AT_HWCAP
);
69 info
|= (hwcap
& HWCAP_ATOMICS
? CPUINFO_LSE
: 0);
70 info
|= (hwcap
& HWCAP_USCAT
? CPUINFO_LSE2
: 0);
71 info
|= (hwcap
& HWCAP_AES
? CPUINFO_AES
: 0);
72 info
|= (hwcap
& HWCAP_PMULL
? CPUINFO_PMULL
: 0);
74 unsigned long hwcap2
= qemu_getauxval(AT_HWCAP2
);
75 info
|= (hwcap2
& HWCAP2_BTI
? CPUINFO_BTI
: 0);
78 info
|= sysctl_for_bool("hw.optional.arm.FEAT_LSE") * CPUINFO_LSE
;
79 info
|= sysctl_for_bool("hw.optional.arm.FEAT_LSE2") * CPUINFO_LSE2
;
80 info
|= sysctl_for_bool("hw.optional.arm.FEAT_AES") * CPUINFO_AES
;
81 info
|= sysctl_for_bool("hw.optional.arm.FEAT_PMULL") * CPUINFO_PMULL
;
82 info
|= sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI
;
84 #if defined(__OpenBSD__) && !defined(CONFIG_ELF_AUX_INFO)
91 mib
[1] = CPU_ID_AA64ISAR0
;
93 if (sysctl(mib
, 2, &isar0
, &len
, NULL
, 0) != -1) {
94 if (ID_AA64ISAR0_ATOMIC(isar0
) >= ID_AA64ISAR0_ATOMIC_IMPL
) {
97 if (ID_AA64ISAR0_AES(isar0
) >= ID_AA64ISAR0_AES_BASE
) {
100 if (ID_AA64ISAR0_AES(isar0
) >= ID_AA64ISAR0_AES_PMULL
) {
101 info
|= CPUINFO_PMULL
;
105 mib
[0] = CTL_MACHDEP
;
106 mib
[1] = CPU_ID_AA64PFR1
;
108 if (sysctl(mib
, 2, &pfr1
, &len
, NULL
, 0) != -1) {
109 if (ID_AA64PFR1_BT(pfr1
) >= ID_AA64PFR1_BT_IMPL
) {