MAINTAINERS: Make section QOM cover hw/core/*bus.c as well
[qemu/armbru.git] / include / hw / i386 / pc.h
blob8d764f965cd399a2e4f09b7f777884e5e4a52a49
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu/notify.h"
5 #include "qapi/qapi-types-common.h"
6 #include "hw/boards.h"
7 #include "hw/block/fdc.h"
8 #include "hw/block/flash.h"
9 #include "hw/i386/x86.h"
11 #include "hw/acpi/acpi_dev_interface.h"
12 #include "hw/hotplug.h"
14 #define HPET_INTCAP "hpet-intcap"
16 /**
17 * PCMachineState:
18 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
19 * @boot_cpus: number of present VCPUs
20 * @smp_dies: number of dies per one package
22 struct PCMachineState {
23 /*< private >*/
24 X86MachineState parent_obj;
26 /* <public> */
28 /* State for other subsystems/APIs: */
29 Notifier machine_done;
31 /* Pointers to devices and objects: */
32 HotplugHandler *acpi_dev;
33 PCIBus *bus;
34 I2CBus *smbus;
35 PFlashCFI01 *flash[2];
37 /* Configuration options: */
38 OnOffAuto vmport;
40 bool acpi_build_enabled;
41 bool smbus_enabled;
42 bool sata_enabled;
43 bool pit_enabled;
45 /* NUMA information: */
46 uint64_t numa_nodes;
47 uint64_t *node_mem;
49 /* ACPI Memory hotplug IO base address */
50 hwaddr memhp_io_base;
53 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
54 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
55 #define PC_MACHINE_VMPORT "vmport"
56 #define PC_MACHINE_SMBUS "smbus"
57 #define PC_MACHINE_SATA "sata"
58 #define PC_MACHINE_PIT "pit"
60 /**
61 * PCMachineClass:
63 * Compat fields:
65 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
66 * backend's alignment value if provided
67 * @acpi_data_size: Size of the chunk of memory at the top of RAM
68 * for the BIOS ACPI tables and other BIOS
69 * datastructures.
70 * @gigabyte_align: Make sure that guest addresses aligned at
71 * 1Gbyte boundaries get mapped to host
72 * addresses aligned at 1Gbyte boundaries. This
73 * way we can use 1GByte pages in the host.
76 typedef struct PCMachineClass {
77 /*< private >*/
78 X86MachineClass parent_class;
80 /*< public >*/
82 /* Device configuration: */
83 bool pci_enabled;
84 bool kvmclock_enabled;
85 const char *default_nic_model;
87 /* Compat options: */
89 /* Default CPU model version. See x86_cpu_set_default_version(). */
90 int default_cpu_version;
92 /* ACPI compat: */
93 bool has_acpi_build;
94 bool rsdp_in_ram;
95 int legacy_acpi_table_size;
96 unsigned acpi_data_size;
97 bool do_not_add_smb_acpi;
99 /* SMBIOS compat: */
100 bool smbios_defaults;
101 bool smbios_legacy_mode;
102 bool smbios_uuid_encoded;
104 /* RAM / address space compat: */
105 bool gigabyte_align;
106 bool has_reserved_memory;
107 bool enforce_aligned_dimm;
108 bool broken_reserved_end;
110 /* generate legacy CPU hotplug AML */
111 bool legacy_cpu_hotplug;
113 /* use DMA capable linuxboot option rom */
114 bool linuxboot_dma_enabled;
116 /* use PVH to load kernels that support this feature */
117 bool pvh_enabled;
118 } PCMachineClass;
120 #define TYPE_PC_MACHINE "generic-pc-machine"
121 #define PC_MACHINE(obj) \
122 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
123 #define PC_MACHINE_GET_CLASS(obj) \
124 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
125 #define PC_MACHINE_CLASS(klass) \
126 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
128 /* ioapic.c */
130 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
132 /* pc.c */
133 extern int fd_bootchk;
135 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
137 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp);
138 void pc_smp_parse(MachineState *ms, QemuOpts *opts);
140 void pc_guest_info_init(PCMachineState *pcms);
142 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
143 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
144 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
145 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
146 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
147 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
148 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
151 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
152 MemoryRegion *pci_address_space);
154 void xen_load_linux(PCMachineState *pcms);
155 void pc_memory_init(PCMachineState *pcms,
156 MemoryRegion *system_memory,
157 MemoryRegion *rom_memory,
158 MemoryRegion **ram_memory);
159 uint64_t pc_pci_hole64_start(void);
160 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
161 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
162 ISADevice **rtc_state,
163 bool create_fdctrl,
164 bool no_vmport,
165 bool has_pit,
166 uint32_t hpet_irqs);
167 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
168 void pc_cmos_init(PCMachineState *pcms,
169 BusState *ide0, BusState *ide1,
170 ISADevice *s);
171 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
172 void pc_pci_device_init(PCIBus *pci_bus);
174 typedef void (*cpu_set_smm_t)(int smm, void *arg);
176 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
178 ISADevice *pc_find_fdc0(void);
179 int cmos_get_fd_drive_type(FloppyDriveType fd0);
181 /* port92.c */
182 #define PORT92_A20_LINE "a20"
184 #define TYPE_PORT92 "port92"
186 /* pc_sysfw.c */
187 void pc_system_flash_create(PCMachineState *pcms);
188 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
190 /* acpi-build.c */
191 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
192 const CPUArchIdList *apic_ids, GArray *entry);
194 extern GlobalProperty pc_compat_5_0[];
195 extern const size_t pc_compat_5_0_len;
197 extern GlobalProperty pc_compat_4_2[];
198 extern const size_t pc_compat_4_2_len;
200 extern GlobalProperty pc_compat_4_1[];
201 extern const size_t pc_compat_4_1_len;
203 extern GlobalProperty pc_compat_4_0[];
204 extern const size_t pc_compat_4_0_len;
206 extern GlobalProperty pc_compat_3_1[];
207 extern const size_t pc_compat_3_1_len;
209 extern GlobalProperty pc_compat_3_0[];
210 extern const size_t pc_compat_3_0_len;
212 extern GlobalProperty pc_compat_2_12[];
213 extern const size_t pc_compat_2_12_len;
215 extern GlobalProperty pc_compat_2_11[];
216 extern const size_t pc_compat_2_11_len;
218 extern GlobalProperty pc_compat_2_10[];
219 extern const size_t pc_compat_2_10_len;
221 extern GlobalProperty pc_compat_2_9[];
222 extern const size_t pc_compat_2_9_len;
224 extern GlobalProperty pc_compat_2_8[];
225 extern const size_t pc_compat_2_8_len;
227 extern GlobalProperty pc_compat_2_7[];
228 extern const size_t pc_compat_2_7_len;
230 extern GlobalProperty pc_compat_2_6[];
231 extern const size_t pc_compat_2_6_len;
233 extern GlobalProperty pc_compat_2_5[];
234 extern const size_t pc_compat_2_5_len;
236 extern GlobalProperty pc_compat_2_4[];
237 extern const size_t pc_compat_2_4_len;
239 extern GlobalProperty pc_compat_2_3[];
240 extern const size_t pc_compat_2_3_len;
242 extern GlobalProperty pc_compat_2_2[];
243 extern const size_t pc_compat_2_2_len;
245 extern GlobalProperty pc_compat_2_1[];
246 extern const size_t pc_compat_2_1_len;
248 extern GlobalProperty pc_compat_2_0[];
249 extern const size_t pc_compat_2_0_len;
251 extern GlobalProperty pc_compat_1_7[];
252 extern const size_t pc_compat_1_7_len;
254 extern GlobalProperty pc_compat_1_6[];
255 extern const size_t pc_compat_1_6_len;
257 extern GlobalProperty pc_compat_1_5[];
258 extern const size_t pc_compat_1_5_len;
260 extern GlobalProperty pc_compat_1_4[];
261 extern const size_t pc_compat_1_4_len;
263 /* Helper for setting model-id for CPU models that changed model-id
264 * depending on QEMU versions up to QEMU 2.4.
266 #define PC_CPU_MODEL_IDS(v) \
267 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
268 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
269 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
271 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
272 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
274 MachineClass *mc = MACHINE_CLASS(oc); \
275 optsfn(mc); \
276 mc->init = initfn; \
278 static const TypeInfo pc_machine_type_##suffix = { \
279 .name = namestr TYPE_MACHINE_SUFFIX, \
280 .parent = TYPE_PC_MACHINE, \
281 .class_init = pc_machine_##suffix##_class_init, \
282 }; \
283 static void pc_machine_init_##suffix(void) \
285 type_register(&pc_machine_type_##suffix); \
287 type_init(pc_machine_init_##suffix)
289 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
290 #endif