include/hw/pci/pcie_port.h

   1 /*
   2  * pcie_port.h
   3  *
   4  * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
   5  *                    VA Linux Systems Japan K.K.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #ifndef QEMU_PCIE_PORT_H
  22 #define QEMU_PCIE_PORT_H
  23
  24 #include "hw/pci/pci_bridge.h"
  25 #include "hw/pci/pci_bus.h"
  26
  27 #define TYPE_PCIE_PORT "pcie-port"
  28 #define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT)
  29
  30 struct PCIEPort {
  31     /*< private >*/
  32     PCIBridge   parent_obj;
  33     /*< public >*/
  34
  35     /* pci express switch port */
  36     uint8_t     port;
  37 };
  38
  39 void pcie_port_init_reg(PCIDevice *d);
  40
  41 #define TYPE_PCIE_SLOT "pcie-slot"
  42 #define PCIE_SLOT(obj) OBJECT_CHECK(PCIESlot, (obj), TYPE_PCIE_SLOT)
  43
  44 struct PCIESlot {
  45     /*< private >*/
  46     PCIEPort    parent_obj;
  47     /*< public >*/
  48
  49     /* pci express switch port with slot */
  50     uint8_t     chassis;
  51     uint16_t    slot;
  52
  53     PCIExpLinkSpeed speed;
  54     PCIExpLinkWidth width;
  55
  56     /* Disable ACS (really for a pcie_root_port) */
  57     bool        disable_acs;
  58
  59     /* Indicates whether hot-plug is enabled on the slot */
  60     bool        hotplug;
  61     QLIST_ENTRY(PCIESlot) next;
  62 };
  63
  64 void pcie_chassis_create(uint8_t chassis_number);
  65 PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot);
  66 int pcie_chassis_add_slot(struct PCIESlot *slot);
  67 void pcie_chassis_del_slot(PCIESlot *s);
  68
  69 #define TYPE_PCIE_ROOT_PORT         "pcie-root-port-base"
  70 #define PCIE_ROOT_PORT_CLASS(klass) \
  71      OBJECT_CLASS_CHECK(PCIERootPortClass, (klass), TYPE_PCIE_ROOT_PORT)
  72 #define PCIE_ROOT_PORT_GET_CLASS(obj) \
  73      OBJECT_GET_CLASS(PCIERootPortClass, (obj), TYPE_PCIE_ROOT_PORT)
  74
  75 typedef struct PCIERootPortClass {
  76     PCIDeviceClass parent_class;
  77     DeviceRealize parent_realize;
  78     DeviceReset parent_reset;
  79
  80     uint8_t (*aer_vector)(const PCIDevice *dev);
  81     int (*interrupts_init)(PCIDevice *dev, Error **errp);
  82     void (*interrupts_uninit)(PCIDevice *dev);
  83
  84     int exp_offset;
  85     int aer_offset;
  86     int ssvid_offset;
  87     int acs_offset;    /* If nonzero, optional ACS capability offset */
  88     int ssid;
  89 } PCIERootPortClass;
  90
  91 #endif /* QEMU_PCIE_PORT_H */