MAINTAINERS: Make section QOM cover hw/core/*bus.c as well
[qemu/armbru.git] / include / hw / usb / hcd-musb.h
blobc874b9f292f97c16c12403d52226337be821e254
1 /*
2 * "Inventra" High-speed Dual-Role Controller (MUSB-HDRC), Mentor Graphics,
3 * USB2.0 OTG compliant core used in various chips.
5 * Only host-mode and non-DMA accesses are currently supported.
7 * Copyright (C) 2008 Nokia Corporation
8 * Written by Andrzej Zaborowski <balrog@zabor.org>
10 * SPDX-License-Identifier: GPL-2.0-or-later
13 #ifndef HW_USB_MUSB_H
14 #define HW_USB_MUSB_H
16 enum musb_irq_source_e {
17 musb_irq_suspend = 0,
18 musb_irq_resume,
19 musb_irq_rst_babble,
20 musb_irq_sof,
21 musb_irq_connect,
22 musb_irq_disconnect,
23 musb_irq_vbus_request,
24 musb_irq_vbus_error,
25 musb_irq_rx,
26 musb_irq_tx,
27 musb_set_vbus,
28 musb_set_session,
29 /* Add new interrupts here */
30 musb_irq_max /* total number of interrupts defined */
33 /* TODO convert hcd-musb to QOM/qdev and remove MUSBReadFunc/MUSBWriteFunc */
34 typedef void MUSBWriteFunc(void *opaque, hwaddr addr, uint32_t value);
35 typedef uint32_t MUSBReadFunc(void *opaque, hwaddr addr);
36 extern MUSBReadFunc * const musb_read[];
37 extern MUSBWriteFunc * const musb_write[];
39 typedef struct MUSBState MUSBState;
41 MUSBState *musb_init(DeviceState *parent_device, int gpio_base);
42 void musb_reset(MUSBState *s);
43 uint32_t musb_core_intr_get(MUSBState *s);
44 void musb_core_intr_clear(MUSBState *s, uint32_t mask);
45 void musb_set_size(MUSBState *s, int epnum, int size, int is_tx);
47 #endif