MAINTAINERS: Make section QOM cover hw/core/*bus.c as well
[qemu/armbru.git] / include / hw / usb / uhci-regs.h
blobfd45d29db0f2dc99aebb4fdd8ecb7db096a6ceef
1 #ifndef HW_USB_UHCI_REGS_H
2 #define HW_USB_UHCI_REGS_H
4 #define UHCI_CMD_FGR (1 << 4)
5 #define UHCI_CMD_EGSM (1 << 3)
6 #define UHCI_CMD_GRESET (1 << 2)
7 #define UHCI_CMD_HCRESET (1 << 1)
8 #define UHCI_CMD_RS (1 << 0)
10 #define UHCI_STS_HCHALTED (1 << 5)
11 #define UHCI_STS_HCPERR (1 << 4)
12 #define UHCI_STS_HSERR (1 << 3)
13 #define UHCI_STS_RD (1 << 2)
14 #define UHCI_STS_USBERR (1 << 1)
15 #define UHCI_STS_USBINT (1 << 0)
17 #define TD_CTRL_SPD (1 << 29)
18 #define TD_CTRL_ERROR_SHIFT 27
19 #define TD_CTRL_IOS (1 << 25)
20 #define TD_CTRL_IOC (1 << 24)
21 #define TD_CTRL_ACTIVE (1 << 23)
22 #define TD_CTRL_STALL (1 << 22)
23 #define TD_CTRL_BABBLE (1 << 20)
24 #define TD_CTRL_NAK (1 << 19)
25 #define TD_CTRL_TIMEOUT (1 << 18)
27 #define UHCI_PORT_SUSPEND (1 << 12)
28 #define UHCI_PORT_RESET (1 << 9)
29 #define UHCI_PORT_LSDA (1 << 8)
30 #define UHCI_PORT_RSVD1 (1 << 7)
31 #define UHCI_PORT_RD (1 << 6)
32 #define UHCI_PORT_ENC (1 << 3)
33 #define UHCI_PORT_EN (1 << 2)
34 #define UHCI_PORT_CSC (1 << 1)
35 #define UHCI_PORT_CCS (1 << 0)
37 #define UHCI_PORT_READ_ONLY (0x1bb)
38 #define UHCI_PORT_WRITE_CLEAR (UHCI_PORT_CSC | UHCI_PORT_ENC)
40 #endif /* HW_USB_UHCI_REGS_H */