2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu-common.h"
26 #include "qemu/datadir.h"
27 #include "sysemu/sysemu.h"
29 #include "hw/boards.h"
30 #include "hw/or-irq.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "hw/char/escc.h"
35 #include "hw/sysbus.h"
36 #include "hw/scsi/esp.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
40 #include "hw/misc/mac_via.h"
41 #include "hw/input/adb.h"
42 #include "hw/nubus/mac-nubus-bridge.h"
43 #include "hw/display/macfb.h"
44 #include "hw/block/swim.h"
46 #include "qapi/error.h"
47 #include "sysemu/qtest.h"
48 #include "sysemu/runstate.h"
49 #include "sysemu/reset.h"
50 #include "migration/vmstate.h"
52 #define MACROM_ADDR 0x40800000
53 #define MACROM_SIZE 0x00100000
55 #define MACROM_FILENAME "MacROM.bin"
57 #define IO_BASE 0x50000000
58 #define IO_SLICE 0x00040000
59 #define IO_SIZE 0x04000000
61 #define VIA_BASE (IO_BASE + 0x00000)
62 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
63 #define SONIC_BASE (IO_BASE + 0x0a000)
64 #define SCC_BASE (IO_BASE + 0x0c020)
65 #define ESP_BASE (IO_BASE + 0x10000)
66 #define ESP_PDMA (IO_BASE + 0x10100)
67 #define ASC_BASE (IO_BASE + 0x14000)
68 #define SWIM_BASE (IO_BASE + 0x1E000)
70 #define SONIC_PROM_SIZE 0x1000
73 * the video base, whereas it a Nubus address,
74 * is needed by the kernel to have early display and
75 * thus provided by the bootloader
77 #define VIDEO_BASE 0xf9001000
79 #define MAC_CLOCK 3686418
82 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
83 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800
85 #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
89 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
90 * that performs a variety of functions (RAM management, clock generation, ...).
91 * The GLUE chip receives interrupt requests from various devices,
92 * assign priority to each, and asserts one or more interrupt line to the
96 #define TYPE_GLUE "q800-glue"
97 OBJECT_DECLARE_SIMPLE_TYPE(GLUEState
, GLUE
)
100 SysBusDevice parent_obj
;
105 static void GLUE_set_irq(void *opaque
, int irq
, int level
)
107 GLUEState
*s
= opaque
;
113 s
->ipr
&= ~(1 << irq
);
116 for (i
= 7; i
>= 0; i
--) {
117 if ((s
->ipr
>> i
) & 1) {
118 m68k_set_irq_level(s
->cpu
, i
+ 1, i
+ 25);
122 m68k_set_irq_level(s
->cpu
, 0, 0);
125 static void glue_reset(DeviceState
*dev
)
127 GLUEState
*s
= GLUE(dev
);
132 static const VMStateDescription vmstate_glue
= {
135 .minimum_version_id
= 0,
136 .fields
= (VMStateField
[]) {
137 VMSTATE_UINT8(ipr
, GLUEState
),
138 VMSTATE_END_OF_LIST(),
143 * If the m68k CPU implemented its inbound irq lines as GPIO lines
144 * rather than via the m68k_set_irq_level() function we would not need
145 * this cpu link property and could instead provide outbound IRQ lines
146 * that the board could wire up to the CPU.
148 static Property glue_properties
[] = {
149 DEFINE_PROP_LINK("cpu", GLUEState
, cpu
, TYPE_M68K_CPU
, M68kCPU
*),
150 DEFINE_PROP_END_OF_LIST(),
153 static void glue_init(Object
*obj
)
155 DeviceState
*dev
= DEVICE(obj
);
157 qdev_init_gpio_in(dev
, GLUE_set_irq
, 8);
160 static void glue_class_init(ObjectClass
*klass
, void *data
)
162 DeviceClass
*dc
= DEVICE_CLASS(klass
);
164 dc
->vmsd
= &vmstate_glue
;
165 dc
->reset
= glue_reset
;
166 device_class_set_props(dc
, glue_properties
);
169 static const TypeInfo glue_info
= {
171 .parent
= TYPE_SYS_BUS_DEVICE
,
172 .instance_size
= sizeof(GLUEState
),
173 .instance_init
= glue_init
,
174 .class_init
= glue_class_init
,
177 static void main_cpu_reset(void *opaque
)
179 M68kCPU
*cpu
= opaque
;
180 CPUState
*cs
= CPU(cpu
);
183 cpu
->env
.aregs
[7] = ldl_phys(cs
->as
, 0);
184 cpu
->env
.pc
= ldl_phys(cs
->as
, 4);
187 static uint8_t fake_mac_rom
[] = {
188 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
190 /* offset: 0xa - mac_reset */
192 /* via2[vDirB] |= VIA2B_vPower */
193 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
194 0x10, 0x10, /* moveb %a0@,%d0 */
195 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
196 0x10, 0x80, /* moveb %d0,%a0@ */
198 /* via2[vBufB] &= ~VIA2B_vPower */
199 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
200 0x10, 0x10, /* moveb %a0@,%d0 */
201 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
202 0x10, 0x80, /* moveb %d0,%a0@ */
205 0x60, 0xFE /* bras [self] */
208 static void q800_init(MachineState
*machine
)
216 ram_addr_t initrd_base
;
220 MemoryRegion
*dp8393x_prom
= g_new(MemoryRegion
, 1);
222 const int io_slice_nb
= (IO_SIZE
/ IO_SLICE
) - 1;
224 ram_addr_t ram_size
= machine
->ram_size
;
225 const char *kernel_filename
= machine
->kernel_filename
;
226 const char *initrd_filename
= machine
->initrd_filename
;
227 const char *kernel_cmdline
= machine
->kernel_cmdline
;
228 const char *bios_name
= machine
->firmware
?: MACROM_FILENAME
;
229 hwaddr parameters_base
;
232 DeviceState
*via1_dev
, *via2_dev
;
233 DeviceState
*escc_orgate
;
234 SysBusESPState
*sysbus_esp
;
236 SysBusDevice
*sysbus
;
242 linux_boot
= (kernel_filename
!= NULL
);
244 if (ram_size
> 1 * GiB
) {
245 error_report("Too much memory for this machine: %" PRId64
" MiB, "
246 "maximum 1024 MiB", ram_size
/ MiB
);
251 cpu
= M68K_CPU(cpu_create(machine
->cpu_type
));
252 qemu_register_reset(main_cpu_reset
, cpu
);
255 memory_region_add_subregion(get_system_memory(), 0, machine
->ram
);
258 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
259 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
261 io
= g_new(MemoryRegion
, io_slice_nb
);
262 for (i
= 0; i
< io_slice_nb
; i
++) {
263 char *name
= g_strdup_printf("mac_m68k.io[%d]", i
+ 1);
265 memory_region_init_alias(&io
[i
], NULL
, name
, get_system_memory(),
267 memory_region_add_subregion(get_system_memory(),
268 IO_BASE
+ (i
+ 1) * IO_SLICE
, &io
[i
]);
273 glue
= qdev_new(TYPE_GLUE
);
274 object_property_set_link(OBJECT(glue
), "cpu", OBJECT(cpu
), &error_abort
);
275 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue
), &error_fatal
);
278 via1_dev
= qdev_new(TYPE_MOS6522_Q800_VIA1
);
279 dinfo
= drive_get(IF_MTD
, 0, 0);
281 qdev_prop_set_drive(via1_dev
, "drive", blk_by_legacy_dinfo(dinfo
));
283 sysbus
= SYS_BUS_DEVICE(via1_dev
);
284 sysbus_realize_and_unref(sysbus
, &error_fatal
);
285 sysbus_mmio_map(sysbus
, 1, VIA_BASE
);
286 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in(glue
, 0));
288 adb_bus
= qdev_get_child_bus(via1_dev
, "adb.0");
289 dev
= qdev_new(TYPE_ADB_KEYBOARD
);
290 qdev_realize_and_unref(dev
, adb_bus
, &error_fatal
);
291 dev
= qdev_new(TYPE_ADB_MOUSE
);
292 qdev_realize_and_unref(dev
, adb_bus
, &error_fatal
);
295 via2_dev
= qdev_new(TYPE_MOS6522_Q800_VIA2
);
296 sysbus
= SYS_BUS_DEVICE(via2_dev
);
297 sysbus_realize_and_unref(sysbus
, &error_fatal
);
298 sysbus_mmio_map(sysbus
, 1, VIA_BASE
+ VIA_SIZE
);
299 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in(glue
, 1));
304 error_report("q800 can only have one ethernet interface");
308 qemu_check_nic_model(&nd_table
[0], "dp83932");
311 * MacSonic driver needs an Apple MAC address
314 * 00:80:19 Dayna Communications, Inc.
317 * (Q800 use the last one)
319 nd_table
[0].macaddr
.a
[0] = 0x08;
320 nd_table
[0].macaddr
.a
[1] = 0x00;
321 nd_table
[0].macaddr
.a
[2] = 0x07;
323 dev
= qdev_new("dp8393x");
324 qdev_set_nic_properties(dev
, &nd_table
[0]);
325 qdev_prop_set_uint8(dev
, "it_shift", 2);
326 qdev_prop_set_bit(dev
, "big_endian", true);
327 object_property_set_link(OBJECT(dev
), "dma_mr",
328 OBJECT(get_system_memory()), &error_abort
);
329 sysbus
= SYS_BUS_DEVICE(dev
);
330 sysbus_realize_and_unref(sysbus
, &error_fatal
);
331 sysbus_mmio_map(sysbus
, 0, SONIC_BASE
);
332 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in(glue
, 2));
334 memory_region_init_rom(dp8393x_prom
, NULL
, "dp8393x-q800.prom",
335 SONIC_PROM_SIZE
, &error_fatal
);
336 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE
,
339 /* Add MAC address with valid checksum to PROM */
340 prom
= memory_region_get_ram_ptr(dp8393x_prom
);
342 for (i
= 0; i
< 6; i
++) {
343 prom
[i
] = revbit8(nd_table
[0].macaddr
.a
[i
]);
346 prom
[7] = 0xff - checksum
;
350 dev
= qdev_new(TYPE_ESCC
);
351 qdev_prop_set_uint32(dev
, "disabled", 0);
352 qdev_prop_set_uint32(dev
, "frequency", MAC_CLOCK
);
353 qdev_prop_set_uint32(dev
, "it_shift", 1);
354 qdev_prop_set_bit(dev
, "bit_swap", true);
355 qdev_prop_set_chr(dev
, "chrA", serial_hd(0));
356 qdev_prop_set_chr(dev
, "chrB", serial_hd(1));
357 qdev_prop_set_uint32(dev
, "chnBtype", 0);
358 qdev_prop_set_uint32(dev
, "chnAtype", 0);
359 sysbus
= SYS_BUS_DEVICE(dev
);
360 sysbus_realize_and_unref(sysbus
, &error_fatal
);
362 /* Logically OR both its IRQs together */
363 escc_orgate
= DEVICE(object_new(TYPE_OR_IRQ
));
364 object_property_set_int(OBJECT(escc_orgate
), "num-lines", 2, &error_fatal
);
365 qdev_realize_and_unref(escc_orgate
, NULL
, &error_fatal
);
366 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in(escc_orgate
, 0));
367 sysbus_connect_irq(sysbus
, 1, qdev_get_gpio_in(escc_orgate
, 1));
368 qdev_connect_gpio_out(DEVICE(escc_orgate
), 0, qdev_get_gpio_in(glue
, 3));
369 sysbus_mmio_map(sysbus
, 0, SCC_BASE
);
373 dev
= qdev_new(TYPE_SYSBUS_ESP
);
374 sysbus_esp
= SYSBUS_ESP(dev
);
375 esp
= &sysbus_esp
->esp
;
376 esp
->dma_memory_read
= NULL
;
377 esp
->dma_memory_write
= NULL
;
378 esp
->dma_opaque
= NULL
;
379 sysbus_esp
->it_shift
= 4;
380 esp
->dma_enabled
= 1;
382 sysbus
= SYS_BUS_DEVICE(dev
);
383 sysbus_realize_and_unref(sysbus
, &error_fatal
);
384 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in(via2_dev
,
386 sysbus_connect_irq(sysbus
, 1, qdev_get_gpio_in(via2_dev
,
387 VIA2_IRQ_SCSI_DATA_BIT
));
388 sysbus_mmio_map(sysbus
, 0, ESP_BASE
);
389 sysbus_mmio_map(sysbus
, 1, ESP_PDMA
);
391 scsi_bus_legacy_handle_cmdline(&esp
->bus
);
393 /* SWIM floppy controller */
395 dev
= qdev_new(TYPE_SWIM
);
396 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
397 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, SWIM_BASE
);
401 dev
= qdev_new(TYPE_MAC_NUBUS_BRIDGE
);
402 qdev_prop_set_uint32(dev
, "slot-available-mask",
403 Q800_NUBUS_SLOTS_AVAILABLE
);
404 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
405 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0,
406 MAC_NUBUS_FIRST_SLOT
* NUBUS_SUPER_SLOT_SIZE
);
407 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 1, NUBUS_SLOT_BASE
+
408 MAC_NUBUS_FIRST_SLOT
* NUBUS_SLOT_SIZE
);
410 for (i
= 0; i
< VIA2_NUBUS_IRQ_NB
; i
++) {
411 qdev_connect_gpio_out(dev
, 9 + i
,
412 qdev_get_gpio_in_named(via2_dev
, "nubus-irq",
413 VIA2_NUBUS_IRQ_9
+ i
));
416 nubus
= &NUBUS_BRIDGE(dev
)->bus
;
418 /* framebuffer in nubus slot #9 */
420 dev
= qdev_new(TYPE_NUBUS_MACFB
);
421 qdev_prop_set_uint32(dev
, "width", graphic_width
);
422 qdev_prop_set_uint32(dev
, "height", graphic_height
);
423 qdev_prop_set_uint8(dev
, "depth", graphic_depth
);
424 qdev_realize_and_unref(dev
, BUS(nubus
), &error_fatal
);
429 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
, NULL
,
430 &elf_entry
, NULL
, &high
, NULL
, 1,
432 if (kernel_size
< 0) {
433 error_report("could not load kernel '%s'", kernel_filename
);
436 stl_phys(cs
->as
, 4, elf_entry
); /* reset initial PC */
437 parameters_base
= (high
+ 1) & ~1;
439 BOOTINFO1(cs
->as
, parameters_base
, BI_MACHTYPE
, MACH_MAC
);
440 BOOTINFO1(cs
->as
, parameters_base
, BI_FPUTYPE
, FPU_68040
);
441 BOOTINFO1(cs
->as
, parameters_base
, BI_MMUTYPE
, MMU_68040
);
442 BOOTINFO1(cs
->as
, parameters_base
, BI_CPUTYPE
, CPU_68040
);
443 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_CPUID
, CPUB_68040
);
444 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_MODEL
, MAC_MODEL_Q800
);
445 BOOTINFO1(cs
->as
, parameters_base
,
446 BI_MAC_MEMSIZE
, ram_size
>> 20); /* in MB */
447 BOOTINFO2(cs
->as
, parameters_base
, BI_MEMCHUNK
, 0, ram_size
);
448 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VADDR
, VIDEO_BASE
);
449 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VDEPTH
, graphic_depth
);
450 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VDIM
,
451 (graphic_height
<< 16) | graphic_width
);
452 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VROW
,
453 (graphic_width
* graphic_depth
+ 7) / 8);
454 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_SCCBASE
, SCC_BASE
);
456 rom
= g_malloc(sizeof(*rom
));
457 memory_region_init_ram_ptr(rom
, NULL
, "m68k_fake_mac.rom",
458 sizeof(fake_mac_rom
), fake_mac_rom
);
459 memory_region_set_readonly(rom
, true);
460 memory_region_add_subregion(get_system_memory(), MACROM_ADDR
, rom
);
462 if (kernel_cmdline
) {
463 BOOTINFOSTR(cs
->as
, parameters_base
, BI_COMMAND_LINE
,
468 if (initrd_filename
) {
469 initrd_size
= get_image_size(initrd_filename
);
470 if (initrd_size
< 0) {
471 error_report("could not load initial ram disk '%s'",
476 initrd_base
= (ram_size
- initrd_size
) & TARGET_PAGE_MASK
;
477 load_image_targphys(initrd_filename
, initrd_base
,
478 ram_size
- initrd_base
);
479 BOOTINFO2(cs
->as
, parameters_base
, BI_RAMDISK
, initrd_base
,
485 BOOTINFO0(cs
->as
, parameters_base
, BI_LAST
);
488 /* allocate and load BIOS */
489 rom
= g_malloc(sizeof(*rom
));
490 memory_region_init_rom(rom
, NULL
, "m68k_mac.rom", MACROM_SIZE
,
492 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
493 memory_region_add_subregion(get_system_memory(), MACROM_ADDR
, rom
);
495 /* Load MacROM binary */
497 bios_size
= load_image_targphys(filename
, MACROM_ADDR
, MACROM_SIZE
);
503 /* Remove qtest_enabled() check once firmware files are in the tree */
504 if (!qtest_enabled()) {
505 if (bios_size
< 0 || bios_size
> MACROM_SIZE
) {
506 error_report("could not load MacROM '%s'", bios_name
);
510 ptr
= rom_ptr(MACROM_ADDR
, MACROM_SIZE
);
511 stl_phys(cs
->as
, 0, ldl_p(ptr
)); /* reset initial SP */
513 MACROM_ADDR
+ ldl_p(ptr
+ 4)); /* reset initial PC */
518 static void q800_machine_class_init(ObjectClass
*oc
, void *data
)
520 MachineClass
*mc
= MACHINE_CLASS(oc
);
521 mc
->desc
= "Macintosh Quadra 800";
522 mc
->init
= q800_init
;
523 mc
->default_cpu_type
= M68K_CPU_TYPE_NAME("m68040");
525 mc
->block_default_type
= IF_SCSI
;
526 mc
->default_ram_id
= "m68k_mac.ram";
529 static const TypeInfo q800_machine_typeinfo
= {
530 .name
= MACHINE_TYPE_NAME("q800"),
531 .parent
= TYPE_MACHINE
,
532 .class_init
= q800_machine_class_init
,
535 static void q800_machine_register_types(void)
537 type_register_static(&q800_machine_typeinfo
);
538 type_register_static(&glue_info
);
541 type_init(q800_machine_register_types
)