2 * QEMU model of the EFUSE eFuse
4 * Copyright (c) 2015 Xilinx Inc.
6 * Written by Edgar E. Iglesias <edgari@xilinx.com>
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "hw/nvram/xlnx-efuse.h"
30 #include "qemu/error-report.h"
32 #include "qapi/error.h"
33 #include "sysemu/blockdev.h"
34 #include "hw/qdev-properties.h"
35 #include "hw/qdev-properties-system.h"
37 #define TBIT0_OFFSET 28
38 #define TBIT1_OFFSET 29
39 #define TBIT2_OFFSET 30
40 #define TBIT3_OFFSET 31
41 #define TBITS_PATTERN (0x0AU << TBIT0_OFFSET)
42 #define TBITS_MASK (0x0FU << TBIT0_OFFSET)
44 bool xlnx_efuse_get_bit(XlnxEFuse
*s
, unsigned int bit
)
46 bool b
= s
->fuse32
[bit
/ 32] & (1 << (bit
% 32));
50 static int efuse_bytes(XlnxEFuse
*s
)
52 return ROUND_UP((s
->efuse_nr
* s
->efuse_size
) / 8, 4);
55 static int efuse_bdrv_read(XlnxEFuse
*s
, Error
**errp
)
57 uint32_t *ram
= s
->fuse32
;
58 int nr
= efuse_bytes(s
);
64 s
->blk_ro
= !blk_supports_write_perm(s
->blk
);
68 rc
= blk_set_perm(s
->blk
,
69 (BLK_PERM_CONSISTENT_READ
| BLK_PERM_WRITE
),
76 warn_report("%s: Skip saving updates to read-only eFUSE backstore.",
80 if (blk_pread(s
->blk
, 0, ram
, nr
) < 0) {
81 error_setg(errp
, "%s: Failed to read %u bytes from eFUSE backstore.",
82 blk_name(s
->blk
), nr
);
86 /* Convert from little-endian backstore for each 32-bit row */
89 ram
[nr
] = le32_to_cpu(ram
[nr
]);
95 static void efuse_bdrv_sync(XlnxEFuse
*s
, unsigned int bit
)
97 unsigned int row_offset
;
100 if (!s
->blk
|| s
->blk_ro
) {
101 return; /* Silent on read-only backend to avoid message flood */
104 /* Backstore is always in little-endian */
105 le32
= cpu_to_le32(xlnx_efuse_get_row(s
, bit
));
107 row_offset
= (bit
/ 32) * 4;
108 if (blk_pwrite(s
->blk
, row_offset
, &le32
, 4, 0) < 0) {
109 error_report("%s: Failed to write offset %u of eFUSE backstore.",
110 blk_name(s
->blk
), row_offset
);
114 static int efuse_ro_bits_cmp(const void *a
, const void *b
)
116 uint32_t i
= *(const uint32_t *)a
;
117 uint32_t j
= *(const uint32_t *)b
;
119 return (i
> j
) - (i
< j
);
122 static void efuse_ro_bits_sort(XlnxEFuse
*s
)
124 uint32_t *ary
= s
->ro_bits
;
125 const uint32_t cnt
= s
->ro_bits_cnt
;
127 if (ary
&& cnt
> 1) {
128 qsort(ary
, cnt
, sizeof(ary
[0]), efuse_ro_bits_cmp
);
132 static bool efuse_ro_bits_find(XlnxEFuse
*s
, uint32_t k
)
134 const uint32_t *ary
= s
->ro_bits
;
135 const uint32_t cnt
= s
->ro_bits_cnt
;
141 return bsearch(&k
, ary
, cnt
, sizeof(ary
[0]), efuse_ro_bits_cmp
) != NULL
;
144 bool xlnx_efuse_set_bit(XlnxEFuse
*s
, unsigned int bit
)
146 if (efuse_ro_bits_find(s
, bit
)) {
147 qemu_log_mask(LOG_GUEST_ERROR
, "%s: WARN: "
148 "Ignored setting of readonly efuse bit<%u,%u>!\n",
149 object_get_canonical_path(OBJECT(s
)),
150 (bit
/ 32), (bit
% 32));
154 s
->fuse32
[bit
/ 32] |= 1 << (bit
% 32);
155 efuse_bdrv_sync(s
, bit
);
159 bool xlnx_efuse_k256_check(XlnxEFuse
*s
, uint32_t crc
, unsigned start
)
163 /* A key always occupies multiple of whole rows */
164 assert((start
% 32) == 0);
166 calc
= xlnx_efuse_calc_crc(&s
->fuse32
[start
/ 32], (256 / 32), 0);
170 uint32_t xlnx_efuse_tbits_check(XlnxEFuse
*s
)
175 for (nr
= s
->efuse_nr
; nr
-- > 0; ) {
176 int efuse_start_row_num
= (s
->efuse_size
* nr
) / 32;
177 uint32_t data
= s
->fuse32
[efuse_start_row_num
];
180 * If the option is on, auto-init blank T-bits.
181 * (non-blank will still be reported as '0' in the check, e.g.,
182 * for error-injection tests)
184 if ((data
& TBITS_MASK
) == 0 && s
->init_tbits
) {
185 data
|= TBITS_PATTERN
;
187 s
->fuse32
[efuse_start_row_num
] = data
;
188 efuse_bdrv_sync(s
, (efuse_start_row_num
* 32 + TBIT0_OFFSET
));
191 check
= (check
<< 1) | ((data
& TBITS_MASK
) == TBITS_PATTERN
);
197 static void efuse_realize(DeviceState
*dev
, Error
**errp
)
199 XlnxEFuse
*s
= XLNX_EFUSE(dev
);
201 /* Sort readonly-list for bsearch lookup */
202 efuse_ro_bits_sort(s
);
204 if ((s
->efuse_size
% 32) != 0) {
206 "%s.efuse-size: %u: property value not multiple of 32.",
207 object_get_canonical_path(OBJECT(dev
)), s
->efuse_size
);
211 s
->fuse32
= g_malloc0(efuse_bytes(s
));
212 if (efuse_bdrv_read(s
, errp
)) {
217 static void efuse_prop_set_drive(Object
*obj
, Visitor
*v
, const char *name
,
218 void *opaque
, Error
**errp
)
220 DeviceState
*dev
= DEVICE(obj
);
222 qdev_prop_drive
.set(obj
, v
, name
, opaque
, errp
);
224 /* Fill initial data if backend is attached after realized */
226 efuse_bdrv_read(XLNX_EFUSE(obj
), errp
);
230 static void efuse_prop_get_drive(Object
*obj
, Visitor
*v
, const char *name
,
231 void *opaque
, Error
**errp
)
233 qdev_prop_drive
.get(obj
, v
, name
, opaque
, errp
);
236 static void efuse_prop_release_drive(Object
*obj
, const char *name
,
239 qdev_prop_drive
.release(obj
, name
, opaque
);
242 static const PropertyInfo efuse_prop_drive
= {
244 .description
= "Node name or ID of a block device to use as eFUSE backend",
245 .realized_set_allowed
= true,
246 .get
= efuse_prop_get_drive
,
247 .set
= efuse_prop_set_drive
,
248 .release
= efuse_prop_release_drive
,
251 static Property efuse_properties
[] = {
252 DEFINE_PROP("drive", XlnxEFuse
, blk
, efuse_prop_drive
, BlockBackend
*),
253 DEFINE_PROP_UINT8("efuse-nr", XlnxEFuse
, efuse_nr
, 3),
254 DEFINE_PROP_UINT32("efuse-size", XlnxEFuse
, efuse_size
, 64 * 32),
255 DEFINE_PROP_BOOL("init-factory-tbits", XlnxEFuse
, init_tbits
, true),
256 DEFINE_PROP_ARRAY("read-only", XlnxEFuse
, ro_bits_cnt
, ro_bits
,
257 qdev_prop_uint32
, uint32_t),
258 DEFINE_PROP_END_OF_LIST(),
261 static void efuse_class_init(ObjectClass
*klass
, void *data
)
263 DeviceClass
*dc
= DEVICE_CLASS(klass
);
265 dc
->realize
= efuse_realize
;
266 device_class_set_props(dc
, efuse_properties
);
269 static const TypeInfo efuse_info
= {
270 .name
= TYPE_XLNX_EFUSE
,
271 .parent
= TYPE_DEVICE
,
272 .instance_size
= sizeof(XlnxEFuse
),
273 .class_init
= efuse_class_init
,
276 static void efuse_register_types(void)
278 type_register_static(&efuse_info
);
280 type_init(efuse_register_types
)