2 * s390x SIGP instruction handling
4 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
5 * Copyright IBM Corp. 2012
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
13 #include "s390x-internal.h"
14 #include "sysemu/hw_accel.h"
15 #include "sysemu/runstate.h"
16 #include "exec/address-spaces.h"
17 #include "exec/exec-all.h"
18 #include "sysemu/tcg.h"
20 #include "qapi/qapi-types-machine.h"
22 QemuMutex qemu_sigp_mutex
;
24 typedef struct SigpInfo
{
30 static void set_sigp_status(SigpInfo
*si
, uint64_t status
)
32 *si
->status_reg
&= 0xffffffff00000000ULL
;
33 *si
->status_reg
|= status
;
34 si
->cc
= SIGP_CC_STATUS_STORED
;
37 static void sigp_sense(S390CPU
*dst_cpu
, SigpInfo
*si
)
39 uint8_t state
= s390_cpu_get_state(dst_cpu
);
40 bool ext_call
= dst_cpu
->env
.pending_int
& INTERRUPT_EXTERNAL_CALL
;
45 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
49 /* sensing without locks is racy, but it's the same for real hw */
50 if (state
!= S390_CPU_STATE_STOPPED
&& !ext_call
) {
51 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
54 status
|= SIGP_STAT_EXT_CALL_PENDING
;
56 if (state
== S390_CPU_STATE_STOPPED
) {
57 status
|= SIGP_STAT_STOPPED
;
59 set_sigp_status(si
, status
);
63 static void sigp_external_call(S390CPU
*src_cpu
, S390CPU
*dst_cpu
, SigpInfo
*si
)
69 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
73 ret
= cpu_inject_external_call(dst_cpu
, src_cpu
->env
.core_id
);
75 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
77 set_sigp_status(si
, SIGP_STAT_EXT_CALL_PENDING
);
81 static void sigp_emergency(S390CPU
*src_cpu
, S390CPU
*dst_cpu
, SigpInfo
*si
)
85 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
89 cpu_inject_emergency_signal(dst_cpu
, src_cpu
->env
.core_id
);
90 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
93 static void sigp_start(CPUState
*cs
, run_on_cpu_data arg
)
95 S390CPU
*cpu
= S390_CPU(cs
);
96 SigpInfo
*si
= arg
.host_ptr
;
98 if (s390_cpu_get_state(cpu
) != S390_CPU_STATE_STOPPED
) {
99 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
103 s390_cpu_set_state(S390_CPU_STATE_OPERATING
, cpu
);
104 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
107 static void sigp_stop(CPUState
*cs
, run_on_cpu_data arg
)
109 S390CPU
*cpu
= S390_CPU(cs
);
110 SigpInfo
*si
= arg
.host_ptr
;
112 if (s390_cpu_get_state(cpu
) != S390_CPU_STATE_OPERATING
) {
113 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
117 /* disabled wait - sleeping in user space */
119 s390_cpu_set_state(S390_CPU_STATE_STOPPED
, cpu
);
121 /* execute the stop function */
122 cpu
->env
.sigp_order
= SIGP_STOP
;
123 cpu_inject_stop(cpu
);
125 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
128 static void sigp_stop_and_store_status(CPUState
*cs
, run_on_cpu_data arg
)
130 S390CPU
*cpu
= S390_CPU(cs
);
131 SigpInfo
*si
= arg
.host_ptr
;
133 /* disabled wait - sleeping in user space */
134 if (s390_cpu_get_state(cpu
) == S390_CPU_STATE_OPERATING
&& cs
->halted
) {
135 s390_cpu_set_state(S390_CPU_STATE_STOPPED
, cpu
);
138 switch (s390_cpu_get_state(cpu
)) {
139 case S390_CPU_STATE_OPERATING
:
140 cpu
->env
.sigp_order
= SIGP_STOP_STORE_STATUS
;
141 cpu_inject_stop(cpu
);
142 /* store will be performed in do_stop_interrup() */
144 case S390_CPU_STATE_STOPPED
:
145 /* already stopped, just store the status */
146 cpu_synchronize_state(cs
);
147 s390_store_status(cpu
, S390_STORE_STATUS_DEF_ADDR
, true);
150 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
153 static void sigp_store_status_at_address(CPUState
*cs
, run_on_cpu_data arg
)
155 S390CPU
*cpu
= S390_CPU(cs
);
156 SigpInfo
*si
= arg
.host_ptr
;
157 uint32_t address
= si
->param
& 0x7ffffe00u
;
159 /* cpu has to be stopped */
160 if (s390_cpu_get_state(cpu
) != S390_CPU_STATE_STOPPED
) {
161 set_sigp_status(si
, SIGP_STAT_INCORRECT_STATE
);
165 cpu_synchronize_state(cs
);
167 if (s390_store_status(cpu
, address
, false)) {
168 set_sigp_status(si
, SIGP_STAT_INVALID_PARAMETER
);
171 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
174 #define ADTL_SAVE_LC_MASK 0xfUL
175 static void sigp_store_adtl_status(CPUState
*cs
, run_on_cpu_data arg
)
177 S390CPU
*cpu
= S390_CPU(cs
);
178 SigpInfo
*si
= arg
.host_ptr
;
179 uint8_t lc
= si
->param
& ADTL_SAVE_LC_MASK
;
180 hwaddr addr
= si
->param
& ~ADTL_SAVE_LC_MASK
;
181 hwaddr len
= 1UL << (lc
? lc
: 10);
183 if (!s390_has_feat(S390_FEAT_VECTOR
) &&
184 !s390_has_feat(S390_FEAT_GUARDED_STORAGE
)) {
185 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
189 /* cpu has to be stopped */
190 if (s390_cpu_get_state(cpu
) != S390_CPU_STATE_STOPPED
) {
191 set_sigp_status(si
, SIGP_STAT_INCORRECT_STATE
);
195 /* address must be aligned to length */
196 if (addr
& (len
- 1)) {
197 set_sigp_status(si
, SIGP_STAT_INVALID_PARAMETER
);
201 /* no GS: only lc == 0 is valid */
202 if (!s390_has_feat(S390_FEAT_GUARDED_STORAGE
) &&
204 set_sigp_status(si
, SIGP_STAT_INVALID_PARAMETER
);
208 /* GS: 0, 10, 11, 12 are valid */
209 if (s390_has_feat(S390_FEAT_GUARDED_STORAGE
) &&
214 set_sigp_status(si
, SIGP_STAT_INVALID_PARAMETER
);
218 cpu_synchronize_state(cs
);
220 if (s390_store_adtl_status(cpu
, addr
, len
)) {
221 set_sigp_status(si
, SIGP_STAT_INVALID_PARAMETER
);
224 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
227 static void sigp_restart(CPUState
*cs
, run_on_cpu_data arg
)
229 S390CPU
*cpu
= S390_CPU(cs
);
230 SigpInfo
*si
= arg
.host_ptr
;
232 switch (s390_cpu_get_state(cpu
)) {
233 case S390_CPU_STATE_STOPPED
:
234 /* the restart irq has to be delivered prior to any other pending irq */
235 cpu_synchronize_state(cs
);
237 * Set OPERATING (and unhalting) before loading the restart PSW.
238 * s390_cpu_set_psw() will then properly halt the CPU again if
241 s390_cpu_set_state(S390_CPU_STATE_OPERATING
, cpu
);
242 do_restart_interrupt(&cpu
->env
);
244 case S390_CPU_STATE_OPERATING
:
245 cpu_inject_restart(cpu
);
248 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
251 static void sigp_initial_cpu_reset(CPUState
*cs
, run_on_cpu_data arg
)
253 S390CPU
*cpu
= S390_CPU(cs
);
254 S390CPUClass
*scc
= S390_CPU_GET_CLASS(cpu
);
255 SigpInfo
*si
= arg
.host_ptr
;
257 cpu_synchronize_state(cs
);
258 scc
->reset(cs
, S390_CPU_RESET_INITIAL
);
259 cpu_synchronize_post_reset(cs
);
260 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
263 static void sigp_cpu_reset(CPUState
*cs
, run_on_cpu_data arg
)
265 S390CPU
*cpu
= S390_CPU(cs
);
266 S390CPUClass
*scc
= S390_CPU_GET_CLASS(cpu
);
267 SigpInfo
*si
= arg
.host_ptr
;
269 cpu_synchronize_state(cs
);
270 scc
->reset(cs
, S390_CPU_RESET_NORMAL
);
271 cpu_synchronize_post_reset(cs
);
272 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
275 static void sigp_set_prefix(CPUState
*cs
, run_on_cpu_data arg
)
277 S390CPU
*cpu
= S390_CPU(cs
);
278 SigpInfo
*si
= arg
.host_ptr
;
279 uint32_t addr
= si
->param
& 0x7fffe000u
;
281 cpu_synchronize_state(cs
);
283 if (!address_space_access_valid(&address_space_memory
, addr
,
284 sizeof(struct LowCore
), false,
285 MEMTXATTRS_UNSPECIFIED
)) {
286 set_sigp_status(si
, SIGP_STAT_INVALID_PARAMETER
);
290 /* cpu has to be stopped */
291 if (s390_cpu_get_state(cpu
) != S390_CPU_STATE_STOPPED
) {
292 set_sigp_status(si
, SIGP_STAT_INCORRECT_STATE
);
298 cpu_synchronize_post_init(cs
);
299 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
302 static void sigp_cond_emergency(S390CPU
*src_cpu
, S390CPU
*dst_cpu
,
305 const uint64_t psw_int_mask
= PSW_MASK_IO
| PSW_MASK_EXT
;
306 uint16_t p_asn
, s_asn
, asn
;
307 uint64_t psw_addr
, psw_mask
;
310 if (!tcg_enabled()) {
312 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
316 /* this looks racy, but these values are only used when STOPPED */
317 idle
= CPU(dst_cpu
)->halted
;
318 psw_addr
= dst_cpu
->env
.psw
.addr
;
319 psw_mask
= dst_cpu
->env
.psw
.mask
;
321 p_asn
= dst_cpu
->env
.cregs
[4] & 0xffff; /* Primary ASN */
322 s_asn
= dst_cpu
->env
.cregs
[3] & 0xffff; /* Secondary ASN */
324 if (s390_cpu_get_state(dst_cpu
) != S390_CPU_STATE_STOPPED
||
325 (psw_mask
& psw_int_mask
) != psw_int_mask
||
326 (idle
&& psw_addr
!= 0) ||
327 (!idle
&& (asn
== p_asn
|| asn
== s_asn
))) {
328 cpu_inject_emergency_signal(dst_cpu
, src_cpu
->env
.core_id
);
330 set_sigp_status(si
, SIGP_STAT_INCORRECT_STATE
);
333 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
336 static void sigp_sense_running(S390CPU
*dst_cpu
, SigpInfo
*si
)
338 if (!tcg_enabled()) {
340 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
344 /* sensing without locks is racy, but it's the same for real hw */
345 if (!s390_has_feat(S390_FEAT_SENSE_RUNNING_STATUS
)) {
346 set_sigp_status(si
, SIGP_STAT_INVALID_ORDER
);
350 /* If halted (which includes also STOPPED), it is not running */
351 if (CPU(dst_cpu
)->halted
) {
352 set_sigp_status(si
, SIGP_STAT_NOT_RUNNING
);
354 si
->cc
= SIGP_CC_ORDER_CODE_ACCEPTED
;
358 static int handle_sigp_single_dst(S390CPU
*cpu
, S390CPU
*dst_cpu
, uint8_t order
,
359 uint64_t param
, uint64_t *status_reg
)
363 .status_reg
= status_reg
,
367 if (dst_cpu
== NULL
) {
368 return SIGP_CC_NOT_OPERATIONAL
;
371 /* only resets can break pending orders */
372 if (dst_cpu
->env
.sigp_order
!= 0 &&
373 order
!= SIGP_CPU_RESET
&&
374 order
!= SIGP_INITIAL_CPU_RESET
) {
380 sigp_sense(dst_cpu
, &si
);
382 case SIGP_EXTERNAL_CALL
:
383 sigp_external_call(cpu
, dst_cpu
, &si
);
386 sigp_emergency(cpu
, dst_cpu
, &si
);
389 run_on_cpu(CPU(dst_cpu
), sigp_start
, RUN_ON_CPU_HOST_PTR(&si
));
392 run_on_cpu(CPU(dst_cpu
), sigp_stop
, RUN_ON_CPU_HOST_PTR(&si
));
395 run_on_cpu(CPU(dst_cpu
), sigp_restart
, RUN_ON_CPU_HOST_PTR(&si
));
397 case SIGP_STOP_STORE_STATUS
:
398 run_on_cpu(CPU(dst_cpu
), sigp_stop_and_store_status
, RUN_ON_CPU_HOST_PTR(&si
));
400 case SIGP_STORE_STATUS_ADDR
:
401 run_on_cpu(CPU(dst_cpu
), sigp_store_status_at_address
, RUN_ON_CPU_HOST_PTR(&si
));
403 case SIGP_STORE_ADTL_STATUS
:
404 run_on_cpu(CPU(dst_cpu
), sigp_store_adtl_status
, RUN_ON_CPU_HOST_PTR(&si
));
406 case SIGP_SET_PREFIX
:
407 run_on_cpu(CPU(dst_cpu
), sigp_set_prefix
, RUN_ON_CPU_HOST_PTR(&si
));
409 case SIGP_INITIAL_CPU_RESET
:
410 run_on_cpu(CPU(dst_cpu
), sigp_initial_cpu_reset
, RUN_ON_CPU_HOST_PTR(&si
));
413 run_on_cpu(CPU(dst_cpu
), sigp_cpu_reset
, RUN_ON_CPU_HOST_PTR(&si
));
415 case SIGP_COND_EMERGENCY
:
416 sigp_cond_emergency(cpu
, dst_cpu
, &si
);
418 case SIGP_SENSE_RUNNING
:
419 sigp_sense_running(dst_cpu
, &si
);
422 set_sigp_status(&si
, SIGP_STAT_INVALID_ORDER
);
428 static int sigp_set_architecture(S390CPU
*cpu
, uint32_t param
,
429 uint64_t *status_reg
)
433 bool all_stopped
= true;
435 CPU_FOREACH(cur_cs
) {
436 cur_cpu
= S390_CPU(cur_cs
);
438 if (cur_cpu
== cpu
) {
441 if (s390_cpu_get_state(cur_cpu
) != S390_CPU_STATE_STOPPED
) {
446 *status_reg
&= 0xffffffff00000000ULL
;
448 /* Reject set arch order, with czam we're always in z/Arch mode. */
449 *status_reg
|= (all_stopped
? SIGP_STAT_INVALID_PARAMETER
:
450 SIGP_STAT_INCORRECT_STATE
);
451 return SIGP_CC_STATUS_STORED
;
454 int handle_sigp(CPUS390XState
*env
, uint8_t order
, uint64_t r1
, uint64_t r3
)
456 uint64_t *status_reg
= &env
->regs
[r1
];
457 uint64_t param
= (r1
% 2) ? env
->regs
[r1
] : env
->regs
[r1
+ 1];
458 S390CPU
*cpu
= env_archcpu(env
);
459 S390CPU
*dst_cpu
= NULL
;
462 if (qemu_mutex_trylock(&qemu_sigp_mutex
)) {
469 ret
= sigp_set_architecture(cpu
, param
, status_reg
);
472 /* all other sigp orders target a single vcpu */
473 dst_cpu
= s390_cpu_addr2state(env
->regs
[r3
]);
474 ret
= handle_sigp_single_dst(cpu
, dst_cpu
, order
, param
, status_reg
);
476 qemu_mutex_unlock(&qemu_sigp_mutex
);
479 trace_sigp_finished(order
, CPU(cpu
)->cpu_index
,
480 dst_cpu
? CPU(dst_cpu
)->cpu_index
: -1, ret
);
486 int s390_cpu_restart(S390CPU
*cpu
)
490 run_on_cpu(CPU(cpu
), sigp_restart
, RUN_ON_CPU_HOST_PTR(&si
));
494 void do_stop_interrupt(CPUS390XState
*env
)
496 S390CPU
*cpu
= env_archcpu(env
);
498 if (s390_cpu_set_state(S390_CPU_STATE_STOPPED
, cpu
) == 0) {
499 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN
);
501 if (cpu
->env
.sigp_order
== SIGP_STOP_STORE_STATUS
) {
502 s390_store_status(cpu
, S390_STORE_STATUS_DEF_ADDR
, true);
505 env
->pending_int
&= ~INTERRUPT_STOP
;
508 void s390_init_sigp(void)
510 qemu_mutex_init(&qemu_sigp_mutex
);