4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 * Generate inline load/store functions for all MMU modes (typically
21 * at least _user and _kernel) as well as _data versions, for all data
24 * Used by target op helpers.
26 * The syntax for the accessors is:
28 * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
30 * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)
33 * (empty): for 32 and 64 bit sizes
43 * mmusuffix is one of the generic suffixes "data" or "code", or
44 * (for softmmu configs) a target-specific MMU mode suffix as defined
50 #if defined(CONFIG_USER_ONLY)
51 /* sparc32plus has 64bit long but 32bit space address
52 * this can make bad result with g2h() and h2g()
54 #if TARGET_VIRT_ADDR_SPACE_BITS <= 32
55 typedef uint32_t abi_ptr
;
56 #define TARGET_ABI_FMT_ptr "%x"
58 typedef uint64_t abi_ptr
;
59 #define TARGET_ABI_FMT_ptr "%"PRIx64
62 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */
63 #define g2h(x) ((void *)((unsigned long)(abi_ptr)(x) + guest_base))
65 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
66 #define guest_addr_valid(x) (1)
68 #define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX)
70 #define h2g_valid(x) guest_addr_valid((unsigned long)(x) - guest_base)
72 static inline int guest_range_valid(unsigned long start
, unsigned long len
)
74 return len
- 1 <= GUEST_ADDR_MAX
&& start
<= GUEST_ADDR_MAX
- len
+ 1;
77 #define h2g_nocheck(x) ({ \
78 unsigned long __ret = (unsigned long)(x) - guest_base; \
83 /* Check if given address fits target address space */ \
84 assert(h2g_valid(x)); \
88 typedef target_ulong abi_ptr
;
89 #define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx
92 #if defined(CONFIG_USER_ONLY)
94 extern __thread
uintptr_t helper_retaddr
;
96 static inline void set_helper_retaddr(uintptr_t ra
)
100 * Ensure that this write is visible to the SIGSEGV handler that
101 * may be invoked due to a subsequent invalid memory operation.
106 static inline void clear_helper_retaddr(void)
109 * Ensure that previous memory operations have succeeded before
110 * removing the data visible to the signal handler.
116 /* In user-only mode we provide only the _code and _data accessors. */
118 #define MEMSUFFIX _data
120 #include "exec/cpu_ldst_useronly_template.h"
123 #include "exec/cpu_ldst_useronly_template.h"
126 #include "exec/cpu_ldst_useronly_template.h"
129 #include "exec/cpu_ldst_useronly_template.h"
132 #define MEMSUFFIX _code
135 #include "exec/cpu_ldst_useronly_template.h"
138 #include "exec/cpu_ldst_useronly_template.h"
141 #include "exec/cpu_ldst_useronly_template.h"
144 #include "exec/cpu_ldst_useronly_template.h"
150 /* The memory helpers for tcg-generated code need tcg_target_long etc. */
153 static inline target_ulong
tlb_addr_write(const CPUTLBEntry
*entry
)
155 #if TCG_OVERSIZED_GUEST
156 return entry
->addr_write
;
158 return atomic_read(&entry
->addr_write
);
162 /* Find the TLB index corresponding to the mmu_idx + address pair. */
163 static inline uintptr_t tlb_index(CPUArchState
*env
, uintptr_t mmu_idx
,
166 uintptr_t size_mask
= env_tlb(env
)->f
[mmu_idx
].mask
>> CPU_TLB_ENTRY_BITS
;
168 return (addr
>> TARGET_PAGE_BITS
) & size_mask
;
171 static inline size_t tlb_n_entries(CPUArchState
*env
, uintptr_t mmu_idx
)
173 return (env_tlb(env
)->f
[mmu_idx
].mask
>> CPU_TLB_ENTRY_BITS
) + 1;
176 /* Find the TLB entry corresponding to the mmu_idx + address pair. */
177 static inline CPUTLBEntry
*tlb_entry(CPUArchState
*env
, uintptr_t mmu_idx
,
180 return &env_tlb(env
)->f
[mmu_idx
].table
[tlb_index(env
, mmu_idx
, addr
)];
183 #ifdef MMU_MODE0_SUFFIX
184 #define CPU_MMU_INDEX 0
185 #define MEMSUFFIX MMU_MODE0_SUFFIX
187 #include "exec/cpu_ldst_template.h"
190 #include "exec/cpu_ldst_template.h"
193 #include "exec/cpu_ldst_template.h"
196 #include "exec/cpu_ldst_template.h"
201 #if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX)
202 #define CPU_MMU_INDEX 1
203 #define MEMSUFFIX MMU_MODE1_SUFFIX
205 #include "exec/cpu_ldst_template.h"
208 #include "exec/cpu_ldst_template.h"
211 #include "exec/cpu_ldst_template.h"
214 #include "exec/cpu_ldst_template.h"
219 #if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX)
221 #define CPU_MMU_INDEX 2
222 #define MEMSUFFIX MMU_MODE2_SUFFIX
224 #include "exec/cpu_ldst_template.h"
227 #include "exec/cpu_ldst_template.h"
230 #include "exec/cpu_ldst_template.h"
233 #include "exec/cpu_ldst_template.h"
236 #endif /* (NB_MMU_MODES >= 3) */
238 #if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX)
240 #define CPU_MMU_INDEX 3
241 #define MEMSUFFIX MMU_MODE3_SUFFIX
243 #include "exec/cpu_ldst_template.h"
246 #include "exec/cpu_ldst_template.h"
249 #include "exec/cpu_ldst_template.h"
252 #include "exec/cpu_ldst_template.h"
255 #endif /* (NB_MMU_MODES >= 4) */
257 #if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX)
259 #define CPU_MMU_INDEX 4
260 #define MEMSUFFIX MMU_MODE4_SUFFIX
262 #include "exec/cpu_ldst_template.h"
265 #include "exec/cpu_ldst_template.h"
268 #include "exec/cpu_ldst_template.h"
271 #include "exec/cpu_ldst_template.h"
274 #endif /* (NB_MMU_MODES >= 5) */
276 #if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX)
278 #define CPU_MMU_INDEX 5
279 #define MEMSUFFIX MMU_MODE5_SUFFIX
281 #include "exec/cpu_ldst_template.h"
284 #include "exec/cpu_ldst_template.h"
287 #include "exec/cpu_ldst_template.h"
290 #include "exec/cpu_ldst_template.h"
293 #endif /* (NB_MMU_MODES >= 6) */
295 #if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX)
297 #define CPU_MMU_INDEX 6
298 #define MEMSUFFIX MMU_MODE6_SUFFIX
300 #include "exec/cpu_ldst_template.h"
303 #include "exec/cpu_ldst_template.h"
306 #include "exec/cpu_ldst_template.h"
309 #include "exec/cpu_ldst_template.h"
312 #endif /* (NB_MMU_MODES >= 7) */
314 #if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX)
316 #define CPU_MMU_INDEX 7
317 #define MEMSUFFIX MMU_MODE7_SUFFIX
319 #include "exec/cpu_ldst_template.h"
322 #include "exec/cpu_ldst_template.h"
325 #include "exec/cpu_ldst_template.h"
328 #include "exec/cpu_ldst_template.h"
331 #endif /* (NB_MMU_MODES >= 8) */
333 #if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX)
335 #define CPU_MMU_INDEX 8
336 #define MEMSUFFIX MMU_MODE8_SUFFIX
338 #include "exec/cpu_ldst_template.h"
341 #include "exec/cpu_ldst_template.h"
344 #include "exec/cpu_ldst_template.h"
347 #include "exec/cpu_ldst_template.h"
350 #endif /* (NB_MMU_MODES >= 9) */
352 #if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX)
354 #define CPU_MMU_INDEX 9
355 #define MEMSUFFIX MMU_MODE9_SUFFIX
357 #include "exec/cpu_ldst_template.h"
360 #include "exec/cpu_ldst_template.h"
363 #include "exec/cpu_ldst_template.h"
366 #include "exec/cpu_ldst_template.h"
369 #endif /* (NB_MMU_MODES >= 10) */
371 #if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX)
373 #define CPU_MMU_INDEX 10
374 #define MEMSUFFIX MMU_MODE10_SUFFIX
376 #include "exec/cpu_ldst_template.h"
379 #include "exec/cpu_ldst_template.h"
382 #include "exec/cpu_ldst_template.h"
385 #include "exec/cpu_ldst_template.h"
388 #endif /* (NB_MMU_MODES >= 11) */
390 #if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX)
392 #define CPU_MMU_INDEX 11
393 #define MEMSUFFIX MMU_MODE11_SUFFIX
395 #include "exec/cpu_ldst_template.h"
398 #include "exec/cpu_ldst_template.h"
401 #include "exec/cpu_ldst_template.h"
404 #include "exec/cpu_ldst_template.h"
407 #endif /* (NB_MMU_MODES >= 12) */
409 #if (NB_MMU_MODES > 12)
410 #error "NB_MMU_MODES > 12 is not supported for now"
411 #endif /* (NB_MMU_MODES > 12) */
413 /* these access are slower, they must be as rare as possible */
414 #define CPU_MMU_INDEX (cpu_mmu_index(env, false))
415 #define MEMSUFFIX _data
417 #include "exec/cpu_ldst_template.h"
420 #include "exec/cpu_ldst_template.h"
423 #include "exec/cpu_ldst_template.h"
426 #include "exec/cpu_ldst_template.h"
430 #define CPU_MMU_INDEX (cpu_mmu_index(env, true))
431 #define MEMSUFFIX _code
432 #define SOFTMMU_CODE_ACCESS
435 #include "exec/cpu_ldst_template.h"
438 #include "exec/cpu_ldst_template.h"
441 #include "exec/cpu_ldst_template.h"
444 #include "exec/cpu_ldst_template.h"
448 #undef SOFTMMU_CODE_ACCESS
450 #endif /* defined(CONFIG_USER_ONLY) */
455 * @addr: guest virtual address to look up
456 * @access_type: 0 for read, 1 for write, 2 for execute
457 * @mmu_idx: MMU index to use for lookup
459 * Look up the specified guest virtual index in the TCG softmmu TLB.
460 * If we can translate a host virtual address suitable for direct RAM
461 * access, without causing a guest exception, then return it.
462 * Otherwise (TLB entry is for an I/O access, guest software
463 * TLB fill required, etc) return NULL.
465 #ifdef CONFIG_USER_ONLY
466 static inline void *tlb_vaddr_to_host(CPUArchState
*env
, abi_ptr addr
,
467 MMUAccessType access_type
, int mmu_idx
)
472 void *tlb_vaddr_to_host(CPUArchState
*env
, abi_ptr addr
,
473 MMUAccessType access_type
, int mmu_idx
);
476 #endif /* CPU_LDST_H */