Merge branch 'master' of git://repo.or.cz/qemu
[qemu/hppa.git] / target-cris / op.c
bloba446e20d93da007d4fc80a37ae768ea8d0073c94
1 /*
2 * CRIS emulation micro-operations for qemu.
4 * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "exec.h"
21 #include "host-utils.h"
23 #define REGNAME r0
24 #define REG (env->regs[0])
25 #include "op_template.h"
27 #define REGNAME r1
28 #define REG (env->regs[1])
29 #include "op_template.h"
31 #define REGNAME r2
32 #define REG (env->regs[2])
33 #include "op_template.h"
35 #define REGNAME r3
36 #define REG (env->regs[3])
37 #include "op_template.h"
39 #define REGNAME r4
40 #define REG (env->regs[4])
41 #include "op_template.h"
43 #define REGNAME r5
44 #define REG (env->regs[5])
45 #include "op_template.h"
47 #define REGNAME r6
48 #define REG (env->regs[6])
49 #include "op_template.h"
51 #define REGNAME r7
52 #define REG (env->regs[7])
53 #include "op_template.h"
55 #define REGNAME r8
56 #define REG (env->regs[8])
57 #include "op_template.h"
59 #define REGNAME r9
60 #define REG (env->regs[9])
61 #include "op_template.h"
63 #define REGNAME r10
64 #define REG (env->regs[10])
65 #include "op_template.h"
67 #define REGNAME r11
68 #define REG (env->regs[11])
69 #include "op_template.h"
71 #define REGNAME r12
72 #define REG (env->regs[12])
73 #include "op_template.h"
75 #define REGNAME r13
76 #define REG (env->regs[13])
77 #include "op_template.h"
79 #define REGNAME r14
80 #define REG (env->regs[14])
81 #include "op_template.h"
83 #define REGNAME r15
84 #define REG (env->regs[15])
85 #include "op_template.h"
88 #define REGNAME p0
89 #define REG (env->pregs[0])
90 #include "op_template.h"
92 #define REGNAME p1
93 #define REG (env->pregs[1])
94 #include "op_template.h"
96 #define REGNAME p2
97 #define REG (env->pregs[2])
98 #include "op_template.h"
100 #define REGNAME p3
101 #define REG (env->pregs[3])
102 #include "op_template.h"
104 #define REGNAME p4
105 #define REG (env->pregs[4])
106 #include "op_template.h"
108 #define REGNAME p5
109 #define REG (env->pregs[5])
110 #include "op_template.h"
112 #define REGNAME p6
113 #define REG (env->pregs[6])
114 #include "op_template.h"
116 #define REGNAME p7
117 #define REG (env->pregs[7])
118 #include "op_template.h"
120 #define REGNAME p8
121 #define REG (env->pregs[8])
122 #include "op_template.h"
124 #define REGNAME p9
125 #define REG (env->pregs[9])
126 #include "op_template.h"
128 #define REGNAME p10
129 #define REG (env->pregs[10])
130 #include "op_template.h"
132 #define REGNAME p11
133 #define REG (env->pregs[11])
134 #include "op_template.h"
136 #define REGNAME p12
137 #define REG (env->pregs[12])
138 #include "op_template.h"
140 #define REGNAME p13
141 #define REG (env->pregs[13])
142 #include "op_template.h"
144 #define REGNAME p14
145 #define REG (env->pregs[14])
146 #include "op_template.h"
148 #define REGNAME p15
149 #define REG (env->pregs[15])
150 #include "op_template.h"
152 /* Microcode. */
154 void OPPROTO op_break_im(void)
156 env->trap_vector = PARAM1;
157 env->exception_index = EXCP_BREAK;
158 cpu_loop_exit();
161 void OPPROTO op_debug(void)
163 env->exception_index = EXCP_DEBUG;
164 cpu_loop_exit();
167 void OPPROTO op_exec_insn(void)
169 env->stats.exec_insns++;
170 RETURN();
172 void OPPROTO op_exec_load(void)
174 env->stats.exec_loads++;
175 RETURN();
177 void OPPROTO op_exec_store(void)
179 env->stats.exec_stores++;
180 RETURN();
183 void OPPROTO op_ccs_lshift (void)
185 uint32_t ccs;
187 /* Apply the ccs shift. */
188 ccs = env->pregs[PR_CCS];
189 ccs = (ccs & 0xc0000000) | ((ccs << 12) >> 2);
190 env->pregs[PR_CCS] = ccs;
191 RETURN();
193 void OPPROTO op_ccs_rshift (void)
195 register uint32_t ccs;
197 /* Apply the ccs shift. */
198 ccs = env->pregs[PR_CCS];
199 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
200 if (ccs & U_FLAG)
202 /* Enter user mode. */
203 env->ksp = env->regs[R_SP];
204 env->regs[R_SP] = env->pregs[PR_USP];
207 env->pregs[PR_CCS] = ccs;
209 RETURN();
212 void OPPROTO op_setf (void)
214 if (!(env->pregs[PR_CCS] & U_FLAG) && (PARAM1 & U_FLAG))
216 /* Enter user mode. */
217 env->ksp = env->regs[R_SP];
218 env->regs[R_SP] = env->pregs[PR_USP];
221 env->pregs[PR_CCS] |= PARAM1;
222 RETURN();
225 void OPPROTO op_clrf (void)
227 env->pregs[PR_CCS] &= ~PARAM1;
228 RETURN();
231 void OPPROTO op_movl_debug1_T0 (void)
233 env->debug1 = T0;
234 RETURN();
237 void OPPROTO op_movl_debug2_T0 (void)
239 env->debug2 = T0;
240 RETURN();
243 void OPPROTO op_movl_debug3_T0 (void)
245 env->debug3 = T0;
246 RETURN();
248 void OPPROTO op_movl_debug1_T1 (void)
250 env->debug1 = T1;
251 RETURN();
254 void OPPROTO op_movl_debug2_T1 (void)
256 env->debug2 = T1;
257 RETURN();
260 void OPPROTO op_movl_debug3_T1 (void)
262 env->debug3 = T1;
263 RETURN();
265 void OPPROTO op_movl_debug3_im (void)
267 env->debug3 = PARAM1;
268 RETURN();
270 void OPPROTO op_movl_T0_flags (void)
272 T0 = env->pregs[PR_CCS];
273 RETURN();
275 void OPPROTO op_movl_flags_T0 (void)
277 env->pregs[PR_CCS] = T0;
278 RETURN();
281 void OPPROTO op_movl_sreg_T0 (void)
283 uint32_t srs;
284 srs = env->pregs[PR_SRS];
285 srs &= 3;
287 env->sregs[srs][PARAM1] = T0;
288 RETURN();
291 void OPPROTO op_movl_tlb_hi_T0 (void)
293 uint32_t srs;
294 srs = env->pregs[PR_SRS];
295 if (srs == 1 || srs == 2)
297 /* Writes to tlb-hi write to mm_cause as a side effect. */
298 env->sregs[SFR_RW_MM_TLB_HI] = T0;
299 env->sregs[SFR_R_MM_CAUSE] = T0;
301 RETURN();
304 void OPPROTO op_movl_tlb_lo_T0 (void)
306 uint32_t srs;
308 env->pregs[PR_SRS] &= 3;
309 srs = env->pregs[PR_SRS];
311 if (srs == 1 || srs == 2)
313 uint32_t set;
314 uint32_t idx;
315 uint32_t lo, hi;
317 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
318 set >>= 4;
319 set &= 3;
321 idx &= 15;
322 /* We've just made a write to tlb_lo. */
323 lo = env->sregs[SFR_RW_MM_TLB_LO];
324 /* Writes are done via r_mm_cause. */
325 hi = env->sregs[SFR_R_MM_CAUSE];
326 env->tlbsets[srs - 1][set][idx].lo = lo;
327 env->tlbsets[srs - 1][set][idx].hi = hi;
329 RETURN();
332 void OPPROTO op_movl_T0_sreg (void)
334 uint32_t srs;
335 env->pregs[PR_SRS] &= 3;
336 srs = env->pregs[PR_SRS];
338 if (srs == 1 || srs == 2)
340 uint32_t set;
341 uint32_t idx;
342 uint32_t lo, hi;
344 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
345 set >>= 4;
346 set &= 3;
347 idx &= 15;
349 /* Update the mirror regs. */
350 hi = env->tlbsets[srs - 1][set][idx].hi;
351 lo = env->tlbsets[srs - 1][set][idx].lo;
352 env->sregs[SFR_RW_MM_TLB_HI] = hi;
353 env->sregs[SFR_RW_MM_TLB_LO] = lo;
355 T0 = env->sregs[srs][PARAM1];
356 RETURN();
359 void OPPROTO op_update_cc (void)
361 env->cc_op = PARAM1;
362 env->cc_dest = PARAM2;
363 env->cc_src = PARAM3;
364 RETURN();
367 void OPPROTO op_update_cc_op (void)
369 env->cc_op = PARAM1;
370 RETURN();
373 void OPPROTO op_update_cc_mask (void)
375 env->cc_mask = PARAM1;
376 RETURN();
379 void OPPROTO op_update_cc_dest_T0 (void)
381 env->cc_dest = T0;
382 RETURN();
385 void OPPROTO op_update_cc_result_T0 (void)
387 env->cc_result = T0;
388 RETURN();
391 void OPPROTO op_update_cc_size_im (void)
393 env->cc_size = PARAM1;
394 RETURN();
397 void OPPROTO op_update_cc_src_T1 (void)
399 env->cc_src = T1;
400 RETURN();
402 void OPPROTO op_update_cc_x (void)
404 env->cc_x_live = PARAM1;
405 env->cc_x = PARAM2;
406 RETURN();
409 void OPPROTO op_extb_T0_T0 (void)
411 T0 = ((int8_t)T0);
412 RETURN();
414 void OPPROTO op_extb_T1_T0 (void)
416 T1 = ((int8_t)T0);
417 RETURN();
419 void OPPROTO op_extb_T1_T1 (void)
421 T1 = ((int8_t)T1);
422 RETURN();
424 void OPPROTO op_zextb_T0_T0 (void)
426 T0 = ((uint8_t)T0);
427 RETURN();
429 void OPPROTO op_zextb_T1_T0 (void)
431 T1 = ((uint8_t)T0);
432 RETURN();
434 void OPPROTO op_zextb_T1_T1 (void)
436 T1 = ((uint8_t)T1);
437 RETURN();
439 void OPPROTO op_extw_T0_T0 (void)
441 T0 = ((int16_t)T0);
442 RETURN();
444 void OPPROTO op_extw_T1_T0 (void)
446 T1 = ((int16_t)T0);
447 RETURN();
449 void OPPROTO op_extw_T1_T1 (void)
451 T1 = ((int16_t)T1);
452 RETURN();
455 void OPPROTO op_zextw_T0_T0 (void)
457 T0 = ((uint16_t)T0);
458 RETURN();
460 void OPPROTO op_zextw_T1_T0 (void)
462 T1 = ((uint16_t)T0);
463 RETURN();
466 void OPPROTO op_zextw_T1_T1 (void)
468 T1 = ((uint16_t)T1);
469 RETURN();
472 void OPPROTO op_movl_T0_im (void)
474 T0 = PARAM1;
475 RETURN();
477 void OPPROTO op_movl_T1_im (void)
479 T1 = PARAM1;
480 RETURN();
483 void OPPROTO op_addl_T0_im (void)
485 T0 += PARAM1;
486 RETURN();
489 void OPPROTO op_addl_T1_im (void)
491 T1 += PARAM1;
492 RETURN();
495 void OPPROTO op_subl_T0_im (void)
497 T0 -= PARAM1;
498 RETURN();
501 void OPPROTO op_addxl_T0_C (void)
503 if (env->pregs[PR_CCS] & X_FLAG)
504 T0 += !!(env->pregs[PR_CCS] & C_FLAG);
505 RETURN();
507 void OPPROTO op_subxl_T0_C (void)
509 if (env->pregs[PR_CCS] & X_FLAG)
510 T0 -= !!(env->pregs[PR_CCS] & C_FLAG);
511 RETURN();
513 void OPPROTO op_addl_T0_C (void)
515 T0 += !!(env->pregs[PR_CCS] & C_FLAG);
516 RETURN();
518 void OPPROTO op_addl_T0_R (void)
520 T0 += !!(env->pregs[PR_CCS] & R_FLAG);
521 RETURN();
524 void OPPROTO op_clr_R (void)
526 env->pregs[PR_CCS] &= ~R_FLAG;
527 RETURN();
531 void OPPROTO op_andl_T0_im (void)
533 T0 &= PARAM1;
534 RETURN();
537 void OPPROTO op_andl_T1_im (void)
539 T1 &= PARAM1;
540 RETURN();
543 void OPPROTO op_movl_T0_T1 (void)
545 T0 = T1;
546 RETURN();
549 void OPPROTO op_swp_T0_T1 (void)
551 T0 ^= T1;
552 T1 ^= T0;
553 T0 ^= T1;
554 RETURN();
557 void OPPROTO op_movl_T1_T0 (void)
559 T1 = T0;
560 RETURN();
563 void OPPROTO op_movl_pc_T0 (void)
565 env->pc = T0;
566 RETURN();
569 void OPPROTO op_movl_T0_0 (void)
571 T0 = 0;
572 RETURN();
575 void OPPROTO op_addl_T0_T1 (void)
577 T0 += T1;
578 RETURN();
581 void OPPROTO op_subl_T0_T1 (void)
583 T0 -= T1;
584 RETURN();
587 void OPPROTO op_absl_T1_T1 (void)
589 int32_t st = T1;
591 T1 = st < 0 ? -st : st;
592 RETURN();
595 void OPPROTO op_muls_T0_T1 (void)
597 int64_t tmp, t0 ,t1;
599 /* cast into signed values to make GCC sign extend these babies. */
600 t0 = (int32_t)T0;
601 t1 = (int32_t)T1;
603 tmp = t0 * t1;
604 T0 = tmp & 0xffffffff;
605 env->pregs[PR_MOF] = tmp >> 32;
606 RETURN();
609 void OPPROTO op_mulu_T0_T1 (void)
611 uint64_t tmp, t0 ,t1;
612 t0 = T0;
613 t1 = T1;
615 tmp = t0 * t1;
616 T0 = tmp & 0xffffffff;
617 env->pregs[PR_MOF] = tmp >> 32;
618 RETURN();
621 void OPPROTO op_dstep_T0_T1 (void)
623 T0 <<= 1;
624 if (T0 >= T1)
625 T0 -= T1;
626 RETURN();
629 void OPPROTO op_orl_T0_T1 (void)
631 T0 |= T1;
632 RETURN();
635 void OPPROTO op_andl_T0_T1 (void)
637 T0 &= T1;
638 RETURN();
641 void OPPROTO op_xorl_T0_T1 (void)
643 T0 ^= T1;
644 RETURN();
647 void OPPROTO op_lsll_T0_T1 (void)
649 int s = T1;
650 if (s > 31)
651 T0 = 0;
652 else
653 T0 <<= s;
654 RETURN();
657 void OPPROTO op_lsll_T0_im (void)
659 T0 <<= PARAM1;
660 RETURN();
663 void OPPROTO op_lsrl_T0_T1 (void)
665 int s = T1;
666 if (s > 31)
667 T0 = 0;
668 else
669 T0 >>= s;
670 RETURN();
673 /* Rely on GCC emitting an arithmetic shift for signed right shifts. */
674 void OPPROTO op_asrl_T0_T1 (void)
676 int s = T1;
677 if (s > 31)
678 T0 = T0 & 0x80000000 ? -1 : 0;
679 else
680 T0 = (int32_t)T0 >> s;
681 RETURN();
684 void OPPROTO op_btst_T0_T1 (void)
686 /* FIXME: clean this up. */
688 /* des ref:
689 The N flag is set according to the selected bit in the dest reg.
690 The Z flag is set if the selected bit and all bits to the right are
691 zero.
692 The X flag is cleared.
693 Other flags are left untouched.
694 The destination reg is not affected.*/
695 unsigned int fz, sbit, bset, mask, masked_t0;
697 sbit = T1 & 31;
698 bset = !!(T0 & (1 << sbit));
699 mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
700 masked_t0 = T0 & mask;
701 fz = !(masked_t0 | bset);
703 /* Clear the X, N and Z flags. */
704 T0 = env->pregs[PR_CCS] & ~(X_FLAG | N_FLAG | Z_FLAG);
705 /* Set the N and Z flags accordingly. */
706 T0 |= (bset << 3) | (fz << 2);
707 RETURN();
710 void OPPROTO op_bound_T0_T1 (void)
712 if (T0 > T1)
713 T0 = T1;
714 RETURN();
717 void OPPROTO op_lz_T0_T1 (void)
719 T0 = clz32(T1);
720 RETURN();
723 void OPPROTO op_negl_T0_T1 (void)
725 T0 = -T1;
726 RETURN();
729 void OPPROTO op_negl_T1_T1 (void)
731 T1 = -T1;
732 RETURN();
735 void OPPROTO op_not_T0_T0 (void)
737 T0 = ~(T0);
738 RETURN();
740 void OPPROTO op_not_T1_T1 (void)
742 T1 = ~(T1);
743 RETURN();
746 void OPPROTO op_swapw_T0_T0 (void)
748 T0 = (T0 << 16) | ((T0 >> 16));
749 RETURN();
752 void OPPROTO op_swapb_T0_T0 (void)
754 T0 = ((T0 << 8) & 0xff00ff00) | ((T0 >> 8) & 0x00ff00ff);
755 RETURN();
758 void OPPROTO op_swapr_T0_T0 (void)
760 T0 = (((T0 << 7) & 0x80808080) |
761 ((T0 << 5) & 0x40404040) |
762 ((T0 << 3) & 0x20202020) |
763 ((T0 << 1) & 0x10101010) |
764 ((T0 >> 1) & 0x08080808) |
765 ((T0 >> 3) & 0x04040404) |
766 ((T0 >> 5) & 0x02020202) |
767 ((T0 >> 7) & 0x01010101));
768 RETURN();
771 void OPPROTO op_tst_cc_eq (void) {
772 uint32_t flags = env->pregs[PR_CCS];
773 int z_set;
775 z_set = !!(flags & Z_FLAG);
776 T0 = z_set;
777 RETURN();
780 void OPPROTO op_tst_cc_eq_fast (void) {
781 T0 = !(env->cc_result);
782 RETURN();
785 void OPPROTO op_tst_cc_ne (void) {
786 uint32_t flags = env->pregs[PR_CCS];
787 int z_set;
789 z_set = !!(flags & Z_FLAG);
790 T0 = !z_set;
791 RETURN();
793 void OPPROTO op_tst_cc_ne_fast (void) {
794 T0 = !!(env->cc_result);
795 RETURN();
798 void OPPROTO op_tst_cc_cc (void) {
799 uint32_t flags = env->pregs[PR_CCS];
800 int c_set;
802 c_set = !!(flags & C_FLAG);
803 T0 = !c_set;
804 RETURN();
806 void OPPROTO op_tst_cc_cs (void) {
807 uint32_t flags = env->pregs[PR_CCS];
808 int c_set;
810 c_set = !!(flags & C_FLAG);
811 T0 = c_set;
812 RETURN();
815 void OPPROTO op_tst_cc_vc (void) {
816 uint32_t flags = env->pregs[PR_CCS];
817 int v_set;
819 v_set = !!(flags & V_FLAG);
820 T0 = !v_set;
821 RETURN();
823 void OPPROTO op_tst_cc_vs (void) {
824 uint32_t flags = env->pregs[PR_CCS];
825 int v_set;
827 v_set = !!(flags & V_FLAG);
828 T0 = v_set;
829 RETURN();
831 void OPPROTO op_tst_cc_pl (void) {
832 uint32_t flags = env->pregs[PR_CCS];
833 int n_set;
835 n_set = !!(flags & N_FLAG);
836 T0 = !n_set;
837 RETURN();
839 void OPPROTO op_tst_cc_pl_fast (void) {
840 T0 = ((int32_t)env->cc_result) >= 0;
841 RETURN();
844 void OPPROTO op_tst_cc_mi (void) {
845 uint32_t flags = env->pregs[PR_CCS];
846 int n_set;
848 n_set = !!(flags & N_FLAG);
849 T0 = n_set;
850 RETURN();
852 void OPPROTO op_tst_cc_mi_fast (void) {
853 T0 = ((int32_t)env->cc_result) < 0;
854 RETURN();
857 void OPPROTO op_tst_cc_ls (void) {
858 uint32_t flags = env->pregs[PR_CCS];
859 int c_set;
860 int z_set;
862 c_set = !!(flags & C_FLAG);
863 z_set = !!(flags & Z_FLAG);
864 T0 = c_set || z_set;
865 RETURN();
867 void OPPROTO op_tst_cc_hi (void) {
868 uint32_t flags = env->pregs[PR_CCS];
869 int z_set;
870 int c_set;
872 z_set = !!(flags & Z_FLAG);
873 c_set = !!(flags & C_FLAG);
874 T0 = !c_set && !z_set;
875 RETURN();
879 void OPPROTO op_tst_cc_ge (void) {
880 uint32_t flags = env->pregs[PR_CCS];
881 int n_set;
882 int v_set;
884 n_set = !!(flags & N_FLAG);
885 v_set = !!(flags & V_FLAG);
886 T0 = (n_set && v_set) || (!n_set && !v_set);
887 RETURN();
890 void OPPROTO op_tst_cc_ge_fast (void) {
891 T0 = ((int32_t)env->cc_src < (int32_t)env->cc_dest);
892 RETURN();
895 void OPPROTO op_tst_cc_lt (void) {
896 uint32_t flags = env->pregs[PR_CCS];
897 int n_set;
898 int v_set;
900 n_set = !!(flags & N_FLAG);
901 v_set = !!(flags & V_FLAG);
902 T0 = (n_set && !v_set) || (!n_set && v_set);
903 RETURN();
906 void OPPROTO op_tst_cc_gt (void) {
907 uint32_t flags = env->pregs[PR_CCS];
908 int n_set;
909 int v_set;
910 int z_set;
912 n_set = !!(flags & N_FLAG);
913 v_set = !!(flags & V_FLAG);
914 z_set = !!(flags & Z_FLAG);
915 T0 = (n_set && v_set && !z_set)
916 || (!n_set && !v_set && !z_set);
917 RETURN();
920 void OPPROTO op_tst_cc_le (void) {
921 uint32_t flags = env->pregs[PR_CCS];
922 int n_set;
923 int v_set;
924 int z_set;
926 n_set = !!(flags & N_FLAG);
927 v_set = !!(flags & V_FLAG);
928 z_set = !!(flags & Z_FLAG);
929 T0 = z_set || (n_set && !v_set) || (!n_set && v_set);
930 RETURN();
933 void OPPROTO op_tst_cc_p (void) {
934 uint32_t flags = env->pregs[PR_CCS];
935 int p_set;
937 p_set = !!(flags & P_FLAG);
938 T0 = p_set;
939 RETURN();
942 /* Evaluate the if the branch should be taken or not. Needs to be done in
943 the original sequence. The acutal branch is rescheduled to right after the
944 delay-slot. */
945 void OPPROTO op_evaluate_bcc (void)
947 env->btaken = T0;
948 RETURN();
951 /* this one is used on every alu op, optimize it!. */
952 void OPPROTO op_goto_if_not_x (void)
954 if (env->pregs[PR_CCS] & X_FLAG)
955 GOTO_LABEL_PARAM(1);
956 RETURN();
959 void OPPROTO op_cc_jmp (void)
961 if (env->btaken)
962 env->pc = PARAM1;
963 else
964 env->pc = PARAM2;
965 RETURN();
968 void OPPROTO op_cc_ngoto (void)
970 if (!env->btaken)
971 GOTO_LABEL_PARAM(1);
972 RETURN();
975 void OPPROTO op_movl_btarget_T0 (void)
977 env->btarget = T0;
978 RETURN();
981 void OPPROTO op_jmp1 (void)
983 env->pc = env->btarget;
984 RETURN();