gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "monitor.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #endif
  37
  38 #define MAX_PACKET_LENGTH 4096
  39
  40 #include "qemu_socket.h"
  41 #include "kvm.h"
  42
  43
  44 enum {
  45     GDB_SIGNAL_0 = 0,
  46     GDB_SIGNAL_INT = 2,
  47     GDB_SIGNAL_TRAP = 5,
  48     GDB_SIGNAL_UNKNOWN = 143
  49 };
  50
  51 #ifdef CONFIG_USER_ONLY
  52
  53 /* Map target signal numbers to GDB protocol signal numbers and vice
  54  * versa.  For user emulation's currently supported systems, we can
  55  * assume most signals are defined.
  56  */
  57
  58 static int gdb_signal_table[] = {
  59     0,
  60     TARGET_SIGHUP,
  61     TARGET_SIGINT,
  62     TARGET_SIGQUIT,
  63     TARGET_SIGILL,
  64     TARGET_SIGTRAP,
  65     TARGET_SIGABRT,
  66     -1, /* SIGEMT */
  67     TARGET_SIGFPE,
  68     TARGET_SIGKILL,
  69     TARGET_SIGBUS,
  70     TARGET_SIGSEGV,
  71     TARGET_SIGSYS,
  72     TARGET_SIGPIPE,
  73     TARGET_SIGALRM,
  74     TARGET_SIGTERM,
  75     TARGET_SIGURG,
  76     TARGET_SIGSTOP,
  77     TARGET_SIGTSTP,
  78     TARGET_SIGCONT,
  79     TARGET_SIGCHLD,
  80     TARGET_SIGTTIN,
  81     TARGET_SIGTTOU,
  82     TARGET_SIGIO,
  83     TARGET_SIGXCPU,
  84     TARGET_SIGXFSZ,
  85     TARGET_SIGVTALRM,
  86     TARGET_SIGPROF,
  87     TARGET_SIGWINCH,
  88     -1, /* SIGLOST */
  89     TARGET_SIGUSR1,
  90     TARGET_SIGUSR2,
  91 #ifdef TARGET_SIGPWR
  92     TARGET_SIGPWR,
  93 #else
  94     -1,
  95 #endif
  96     -1, /* SIGPOLL */
  97     -1,
  98     -1,
  99     -1,
 100     -1,
 101     -1,
 102     -1,
 103     -1,
 104     -1,
 105     -1,
 106     -1,
 107     -1,
 108 #ifdef __SIGRTMIN
 109     __SIGRTMIN + 1,
 110     __SIGRTMIN + 2,
 111     __SIGRTMIN + 3,
 112     __SIGRTMIN + 4,
 113     __SIGRTMIN + 5,
 114     __SIGRTMIN + 6,
 115     __SIGRTMIN + 7,
 116     __SIGRTMIN + 8,
 117     __SIGRTMIN + 9,
 118     __SIGRTMIN + 10,
 119     __SIGRTMIN + 11,
 120     __SIGRTMIN + 12,
 121     __SIGRTMIN + 13,
 122     __SIGRTMIN + 14,
 123     __SIGRTMIN + 15,
 124     __SIGRTMIN + 16,
 125     __SIGRTMIN + 17,
 126     __SIGRTMIN + 18,
 127     __SIGRTMIN + 19,
 128     __SIGRTMIN + 20,
 129     __SIGRTMIN + 21,
 130     __SIGRTMIN + 22,
 131     __SIGRTMIN + 23,
 132     __SIGRTMIN + 24,
 133     __SIGRTMIN + 25,
 134     __SIGRTMIN + 26,
 135     __SIGRTMIN + 27,
 136     __SIGRTMIN + 28,
 137     __SIGRTMIN + 29,
 138     __SIGRTMIN + 30,
 139     __SIGRTMIN + 31,
 140     -1, /* SIGCANCEL */
 141     __SIGRTMIN,
 142     __SIGRTMIN + 32,
 143     __SIGRTMIN + 33,
 144     __SIGRTMIN + 34,
 145     __SIGRTMIN + 35,
 146     __SIGRTMIN + 36,
 147     __SIGRTMIN + 37,
 148     __SIGRTMIN + 38,
 149     __SIGRTMIN + 39,
 150     __SIGRTMIN + 40,
 151     __SIGRTMIN + 41,
 152     __SIGRTMIN + 42,
 153     __SIGRTMIN + 43,
 154     __SIGRTMIN + 44,
 155     __SIGRTMIN + 45,
 156     __SIGRTMIN + 46,
 157     __SIGRTMIN + 47,
 158     __SIGRTMIN + 48,
 159     __SIGRTMIN + 49,
 160     __SIGRTMIN + 50,
 161     __SIGRTMIN + 51,
 162     __SIGRTMIN + 52,
 163     __SIGRTMIN + 53,
 164     __SIGRTMIN + 54,
 165     __SIGRTMIN + 55,
 166     __SIGRTMIN + 56,
 167     __SIGRTMIN + 57,
 168     __SIGRTMIN + 58,
 169     __SIGRTMIN + 59,
 170     __SIGRTMIN + 60,
 171     __SIGRTMIN + 61,
 172     __SIGRTMIN + 62,
 173     __SIGRTMIN + 63,
 174     __SIGRTMIN + 64,
 175     __SIGRTMIN + 65,
 176     __SIGRTMIN + 66,
 177     __SIGRTMIN + 67,
 178     __SIGRTMIN + 68,
 179     __SIGRTMIN + 69,
 180     __SIGRTMIN + 70,
 181     __SIGRTMIN + 71,
 182     __SIGRTMIN + 72,
 183     __SIGRTMIN + 73,
 184     __SIGRTMIN + 74,
 185     __SIGRTMIN + 75,
 186     __SIGRTMIN + 76,
 187     __SIGRTMIN + 77,
 188     __SIGRTMIN + 78,
 189     __SIGRTMIN + 79,
 190     __SIGRTMIN + 80,
 191     __SIGRTMIN + 81,
 192     __SIGRTMIN + 82,
 193     __SIGRTMIN + 83,
 194     __SIGRTMIN + 84,
 195     __SIGRTMIN + 85,
 196     __SIGRTMIN + 86,
 197     __SIGRTMIN + 87,
 198     __SIGRTMIN + 88,
 199     __SIGRTMIN + 89,
 200     __SIGRTMIN + 90,
 201     __SIGRTMIN + 91,
 202     __SIGRTMIN + 92,
 203     __SIGRTMIN + 93,
 204     __SIGRTMIN + 94,
 205     __SIGRTMIN + 95,
 206     -1, /* SIGINFO */
 207     -1, /* UNKNOWN */
 208     -1, /* DEFAULT */
 209     -1,
 210     -1,
 211     -1,
 212     -1,
 213     -1,
 214     -1
 215 #endif
 216 };
 217 #else
 218 /* In system mode we only need SIGINT and SIGTRAP; other signals
 219    are not yet supported.  */
 220
 221 enum {
 222     TARGET_SIGINT = 2,
 223     TARGET_SIGTRAP = 5
 224 };
 225
 226 static int gdb_signal_table[] = {
 227     -1,
 228     -1,
 229     TARGET_SIGINT,
 230     -1,
 231     -1,
 232     TARGET_SIGTRAP
 233 };
 234 #endif
 235
 236 #ifdef CONFIG_USER_ONLY
 237 static int target_signal_to_gdb (int sig)
 238 {
 239     int i;
 240     for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
 241         if (gdb_signal_table[i] == sig)
 242             return i;
 243     return GDB_SIGNAL_UNKNOWN;
 244 }
 245 #endif
 246
 247 static int gdb_signal_to_target (int sig)
 248 {
 249     if (sig < ARRAY_SIZE (gdb_signal_table))
 250         return gdb_signal_table[sig];
 251     else
 252         return -1;
 253 }
 254
 255 //#define DEBUG_GDB
 256
 257 typedef struct GDBRegisterState {
 258     int base_reg;
 259     int num_regs;
 260     gdb_reg_cb get_reg;
 261     gdb_reg_cb set_reg;
 262     const char *xml;
 263     struct GDBRegisterState *next;
 264 } GDBRegisterState;
 265
 266 enum RSState {
 267     RS_INACTIVE,
 268     RS_IDLE,
 269     RS_GETLINE,
 270     RS_CHKSUM1,
 271     RS_CHKSUM2,
 272     RS_SYSCALL,
 273 };
 274 typedef struct GDBState {
 275     CPUState *c_cpu; /* current CPU for step/continue ops */
 276     CPUState *g_cpu; /* current CPU for other ops */
 277     CPUState *query_cpu; /* for q{f|s}ThreadInfo */
 278     enum RSState state; /* parsing state */
 279     char line_buf[MAX_PACKET_LENGTH];
 280     int line_buf_index;
 281     int line_csum;
 282     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
 283     int last_packet_len;
 284     int signal;
 285 #ifdef CONFIG_USER_ONLY
 286     int fd;
 287     int running_state;
 288 #else
 289     CharDriverState *chr;
 290     CharDriverState *mon_chr;
 291 #endif
 292 } GDBState;
 293
 294 /* By default use no IRQs and no timers while single stepping so as to
 295  * make single stepping like an ICE HW step.
 296  */
 297 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
 298
 299 static GDBState *gdbserver_state;
 300
 301 /* This is an ugly hack to cope with both new and old gdb.
 302    If gdb sends qXfer:features:read then assume we're talking to a newish
 303    gdb that understands target descriptions.  */
 304 static int gdb_has_xml;
 305
 306 #ifdef CONFIG_USER_ONLY
 307 /* XXX: This is not thread safe.  Do we care?  */
 308 static int gdbserver_fd = -1;
 309
 310 static int get_char(GDBState *s)
 311 {
 312     uint8_t ch;
 313     int ret;
 314
 315     for(;;) {
 316         ret = recv(s->fd, &ch, 1, 0);
 317         if (ret < 0) {
 318             if (errno == ECONNRESET)
 319                 s->fd = -1;
 320             if (errno != EINTR && errno != EAGAIN)
 321                 return -1;
 322         } else if (ret == 0) {
 323             close(s->fd);
 324             s->fd = -1;
 325             return -1;
 326         } else {
 327             break;
 328         }
 329     }
 330     return ch;
 331 }
 332 #endif
 333
 334 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 335
 336 static enum {
 337     GDB_SYS_UNKNOWN,
 338     GDB_SYS_ENABLED,
 339     GDB_SYS_DISABLED,
 340 } gdb_syscall_mode;
 341
 342 /* If gdb is connected when the first semihosting syscall occurs then use
 343    remote gdb syscalls.  Otherwise use native file IO.  */
 344 int use_gdb_syscalls(void)
 345 {
 346     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 347         gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
 348                                             : GDB_SYS_DISABLED);
 349     }
 350     return gdb_syscall_mode == GDB_SYS_ENABLED;
 351 }
 352
 353 /* Resume execution.  */
 354 static inline void gdb_continue(GDBState *s)
 355 {
 356 #ifdef CONFIG_USER_ONLY
 357     s->running_state = 1;
 358 #else
 359     vm_start();
 360 #endif
 361 }
 362
 363 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 364 {
 365 #ifdef CONFIG_USER_ONLY
 366     int ret;
 367
 368     while (len > 0) {
 369         ret = send(s->fd, buf, len, 0);
 370         if (ret < 0) {
 371             if (errno != EINTR && errno != EAGAIN)
 372                 return;
 373         } else {
 374             buf += ret;
 375             len -= ret;
 376         }
 377     }
 378 #else
 379     qemu_chr_write(s->chr, buf, len);
 380 #endif
 381 }
 382
 383 static inline int fromhex(int v)
 384 {
 385     if (v >= '0' && v <= '9')
 386         return v - '0';
 387     else if (v >= 'A' && v <= 'F')
 388         return v - 'A' + 10;
 389     else if (v >= 'a' && v <= 'f')
 390         return v - 'a' + 10;
 391     else
 392         return 0;
 393 }
 394
 395 static inline int tohex(int v)
 396 {
 397     if (v < 10)
 398         return v + '0';
 399     else
 400         return v - 10 + 'a';
 401 }
 402
 403 static void memtohex(char *buf, const uint8_t *mem, int len)
 404 {
 405     int i, c;
 406     char *q;
 407     q = buf;
 408     for(i = 0; i < len; i++) {
 409         c = mem[i];
 410         *q++ = tohex(c >> 4);
 411         *q++ = tohex(c & 0xf);
 412     }
 413     *q = '\0';
 414 }
 415
 416 static void hextomem(uint8_t *mem, const char *buf, int len)
 417 {
 418     int i;
 419
 420     for(i = 0; i < len; i++) {
 421         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 422         buf += 2;
 423     }
 424 }
 425
 426 /* return -1 if error, 0 if OK */
 427 static int put_packet_binary(GDBState *s, const char *buf, int len)
 428 {
 429     int csum, i;
 430     uint8_t *p;
 431
 432     for(;;) {
 433         p = s->last_packet;
 434         *(p++) = '$';
 435         memcpy(p, buf, len);
 436         p += len;
 437         csum = 0;
 438         for(i = 0; i < len; i++) {
 439             csum += buf[i];
 440         }
 441         *(p++) = '#';
 442         *(p++) = tohex((csum >> 4) & 0xf);
 443         *(p++) = tohex((csum) & 0xf);
 444
 445         s->last_packet_len = p - s->last_packet;
 446         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 447
 448 #ifdef CONFIG_USER_ONLY
 449         i = get_char(s);
 450         if (i < 0)
 451             return -1;
 452         if (i == '+')
 453             break;
 454 #else
 455         break;
 456 #endif
 457     }
 458     return 0;
 459 }
 460
 461 /* return -1 if error, 0 if OK */
 462 static int put_packet(GDBState *s, const char *buf)
 463 {
 464 #ifdef DEBUG_GDB
 465     printf("reply='%s'\n", buf);
 466 #endif
 467
 468     return put_packet_binary(s, buf, strlen(buf));
 469 }
 470
 471 /* The GDB remote protocol transfers values in target byte order.  This means
 472    we can use the raw memory access routines to access the value buffer.
 473    Conveniently, these also handle the case where the buffer is mis-aligned.
 474  */
 475 #define GET_REG8(val) do { \
 476     stb_p(mem_buf, val); \
 477     return 1; \
 478     } while(0)
 479 #define GET_REG16(val) do { \
 480     stw_p(mem_buf, val); \
 481     return 2; \
 482     } while(0)
 483 #define GET_REG32(val) do { \
 484     stl_p(mem_buf, val); \
 485     return 4; \
 486     } while(0)
 487 #define GET_REG64(val) do { \
 488     stq_p(mem_buf, val); \
 489     return 8; \
 490     } while(0)
 491
 492 #if TARGET_LONG_BITS == 64
 493 #define GET_REGL(val) GET_REG64(val)
 494 #define ldtul_p(addr) ldq_p(addr)
 495 #else
 496 #define GET_REGL(val) GET_REG32(val)
 497 #define ldtul_p(addr) ldl_p(addr)
 498 #endif
 499
 500 #if defined(TARGET_I386)
 501
 502 #ifdef TARGET_X86_64
 503 static const int gpr_map[16] = {
 504     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
 505     8, 9, 10, 11, 12, 13, 14, 15
 506 };
 507 #else
 508 #define gpr_map gpr_map32
 509 #endif
 510 static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
 511
 512 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
 513
 514 #define IDX_IP_REG      CPU_NB_REGS
 515 #define IDX_FLAGS_REG   (IDX_IP_REG + 1)
 516 #define IDX_SEG_REGS    (IDX_FLAGS_REG + 1)
 517 #define IDX_FP_REGS     (IDX_SEG_REGS + 6)
 518 #define IDX_XMM_REGS    (IDX_FP_REGS + 16)
 519 #define IDX_MXCSR_REG   (IDX_XMM_REGS + CPU_NB_REGS)
 520
 521 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 522 {
 523     if (n < CPU_NB_REGS) {
 524         if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 525             GET_REG64(env->regs[gpr_map[n]]);
 526         } else if (n < CPU_NB_REGS32) {
 527             GET_REG32(env->regs[gpr_map32[n]]);
 528         }
 529     } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
 530 #ifdef USE_X86LDOUBLE
 531         /* FIXME: byteswap float values - after fixing fpregs layout. */
 532         memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
 533 #else
 534         memset(mem_buf, 0, 10);
 535 #endif
 536         return 10;
 537     } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
 538         n -= IDX_XMM_REGS;
 539         if (n < CPU_NB_REGS32 ||
 540             (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
 541             stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
 542             stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
 543             return 16;
 544         }
 545     } else {
 546         switch (n) {
 547         case IDX_IP_REG:
 548             if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 549                 GET_REG64(env->eip);
 550             } else {
 551                 GET_REG32(env->eip);
 552             }
 553         case IDX_FLAGS_REG: GET_REG32(env->eflags);
 554
 555         case IDX_SEG_REGS:     GET_REG32(env->segs[R_CS].selector);
 556         case IDX_SEG_REGS + 1: GET_REG32(env->segs[R_SS].selector);
 557         case IDX_SEG_REGS + 2: GET_REG32(env->segs[R_DS].selector);
 558         case IDX_SEG_REGS + 3: GET_REG32(env->segs[R_ES].selector);
 559         case IDX_SEG_REGS + 4: GET_REG32(env->segs[R_FS].selector);
 560         case IDX_SEG_REGS + 5: GET_REG32(env->segs[R_GS].selector);
 561
 562         case IDX_FP_REGS + 8:  GET_REG32(env->fpuc);
 563         case IDX_FP_REGS + 9:  GET_REG32((env->fpus & ~0x3800) |
 564                                          (env->fpstt & 0x7) << 11);
 565         case IDX_FP_REGS + 10: GET_REG32(0); /* ftag */
 566         case IDX_FP_REGS + 11: GET_REG32(0); /* fiseg */
 567         case IDX_FP_REGS + 12: GET_REG32(0); /* fioff */
 568         case IDX_FP_REGS + 13: GET_REG32(0); /* foseg */
 569         case IDX_FP_REGS + 14: GET_REG32(0); /* fooff */
 570         case IDX_FP_REGS + 15: GET_REG32(0); /* fop */
 571
 572         case IDX_MXCSR_REG: GET_REG32(env->mxcsr);
 573         }
 574     }
 575     return 0;
 576 }
 577
 578 static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, uint8_t *mem_buf)
 579 {
 580     uint16_t selector = ldl_p(mem_buf);
 581
 582     if (selector != env->segs[sreg].selector) {
 583 #if defined(CONFIG_USER_ONLY)
 584         cpu_x86_load_seg(env, sreg, selector);
 585 #else
 586         unsigned int limit, flags;
 587         target_ulong base;
 588
 589         if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
 590             base = selector << 4;
 591             limit = 0xffff;
 592             flags = 0;
 593         } else {
 594             if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, &flags))
 595                 return 4;
 596         }
 597         cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags);
 598 #endif
 599     }
 600     return 4;
 601 }
 602
 603 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 604 {
 605     uint32_t tmp;
 606
 607     if (n < CPU_NB_REGS) {
 608         if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 609             env->regs[gpr_map[n]] = ldtul_p(mem_buf);
 610             return sizeof(target_ulong);
 611         } else if (n < CPU_NB_REGS32) {
 612             n = gpr_map32[n];
 613             env->regs[n] &= ~0xffffffffUL;
 614             env->regs[n] |= (uint32_t)ldl_p(mem_buf);
 615             return 4;
 616         }
 617     } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
 618 #ifdef USE_X86LDOUBLE
 619         /* FIXME: byteswap float values - after fixing fpregs layout. */
 620         memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
 621 #endif
 622         return 10;
 623     } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
 624         n -= IDX_XMM_REGS;
 625         if (n < CPU_NB_REGS32 ||
 626             (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
 627             env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf);
 628             env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8);
 629             return 16;
 630         }
 631     } else {
 632         switch (n) {
 633         case IDX_IP_REG:
 634             if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
 635                 env->eip = ldq_p(mem_buf);
 636                 return 8;
 637             } else {
 638                 env->eip &= ~0xffffffffUL;
 639                 env->eip |= (uint32_t)ldl_p(mem_buf);
 640                 return 4;
 641             }
 642         case IDX_FLAGS_REG:
 643             env->eflags = ldl_p(mem_buf);
 644             return 4;
 645
 646         case IDX_SEG_REGS:     return cpu_x86_gdb_load_seg(env, R_CS, mem_buf);
 647         case IDX_SEG_REGS + 1: return cpu_x86_gdb_load_seg(env, R_SS, mem_buf);
 648         case IDX_SEG_REGS + 2: return cpu_x86_gdb_load_seg(env, R_DS, mem_buf);
 649         case IDX_SEG_REGS + 3: return cpu_x86_gdb_load_seg(env, R_ES, mem_buf);
 650         case IDX_SEG_REGS + 4: return cpu_x86_gdb_load_seg(env, R_FS, mem_buf);
 651         case IDX_SEG_REGS + 5: return cpu_x86_gdb_load_seg(env, R_GS, mem_buf);
 652
 653         case IDX_FP_REGS + 8:
 654             env->fpuc = ldl_p(mem_buf);
 655             return 4;
 656         case IDX_FP_REGS + 9:
 657             tmp = ldl_p(mem_buf);
 658             env->fpstt = (tmp >> 11) & 7;
 659             env->fpus = tmp & ~0x3800;
 660             return 4;
 661         case IDX_FP_REGS + 10: /* ftag */  return 4;
 662         case IDX_FP_REGS + 11: /* fiseg */ return 4;
 663         case IDX_FP_REGS + 12: /* fioff */ return 4;
 664         case IDX_FP_REGS + 13: /* foseg */ return 4;
 665         case IDX_FP_REGS + 14: /* fooff */ return 4;
 666         case IDX_FP_REGS + 15: /* fop */   return 4;
 667
 668         case IDX_MXCSR_REG:
 669             env->mxcsr = ldl_p(mem_buf);
 670             return 4;
 671         }
 672     }
 673     /* Unrecognised register.  */
 674     return 0;
 675 }
 676
 677 #elif defined (TARGET_PPC)
 678
 679 /* Old gdb always expects FP registers.  Newer (xml-aware) gdb only
 680    expects whatever the target description contains.  Due to a
 681    historical mishap the FP registers appear in between core integer
 682    regs and PC, MSR, CR, and so forth.  We hack round this by giving the
 683    FP regs zero size when talking to a newer gdb.  */
 684 #define NUM_CORE_REGS 71
 685 #if defined (TARGET_PPC64)
 686 #define GDB_CORE_XML "power64-core.xml"
 687 #else
 688 #define GDB_CORE_XML "power-core.xml"
 689 #endif
 690
 691 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 692 {
 693     if (n < 32) {
 694         /* gprs */
 695         GET_REGL(env->gpr[n]);
 696     } else if (n < 64) {
 697         /* fprs */
 698         if (gdb_has_xml)
 699             return 0;
 700         stfq_p(mem_buf, env->fpr[n-32]);
 701         return 8;
 702     } else {
 703         switch (n) {
 704         case 64: GET_REGL(env->nip);
 705         case 65: GET_REGL(env->msr);
 706         case 66:
 707             {
 708                 uint32_t cr = 0;
 709                 int i;
 710                 for (i = 0; i < 8; i++)
 711                     cr |= env->crf[i] << (32 - ((i + 1) * 4));
 712                 GET_REG32(cr);
 713             }
 714         case 67: GET_REGL(env->lr);
 715         case 68: GET_REGL(env->ctr);
 716         case 69: GET_REGL(env->xer);
 717         case 70:
 718             {
 719                 if (gdb_has_xml)
 720                     return 0;
 721                 GET_REG32(0); /* fpscr */
 722             }
 723         }
 724     }
 725     return 0;
 726 }
 727
 728 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 729 {
 730     if (n < 32) {
 731         /* gprs */
 732         env->gpr[n] = ldtul_p(mem_buf);
 733         return sizeof(target_ulong);
 734     } else if (n < 64) {
 735         /* fprs */
 736         if (gdb_has_xml)
 737             return 0;
 738         env->fpr[n-32] = ldfq_p(mem_buf);
 739         return 8;
 740     } else {
 741         switch (n) {
 742         case 64:
 743             env->nip = ldtul_p(mem_buf);
 744             return sizeof(target_ulong);
 745         case 65:
 746             ppc_store_msr(env, ldtul_p(mem_buf));
 747             return sizeof(target_ulong);
 748         case 66:
 749             {
 750                 uint32_t cr = ldl_p(mem_buf);
 751                 int i;
 752                 for (i = 0; i < 8; i++)
 753                     env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
 754                 return 4;
 755             }
 756         case 67:
 757             env->lr = ldtul_p(mem_buf);
 758             return sizeof(target_ulong);
 759         case 68:
 760             env->ctr = ldtul_p(mem_buf);
 761             return sizeof(target_ulong);
 762         case 69:
 763             env->xer = ldtul_p(mem_buf);
 764             return sizeof(target_ulong);
 765         case 70:
 766             /* fpscr */
 767             if (gdb_has_xml)
 768                 return 0;
 769             return 4;
 770         }
 771     }
 772     return 0;
 773 }
 774
 775 #elif defined (TARGET_SPARC)
 776
 777 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
 778 #define NUM_CORE_REGS 86
 779 #else
 780 #define NUM_CORE_REGS 72
 781 #endif
 782
 783 #ifdef TARGET_ABI32
 784 #define GET_REGA(val) GET_REG32(val)
 785 #else
 786 #define GET_REGA(val) GET_REGL(val)
 787 #endif
 788
 789 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 790 {
 791     if (n < 8) {
 792         /* g0..g7 */
 793         GET_REGA(env->gregs[n]);
 794     }
 795     if (n < 32) {
 796         /* register window */
 797         GET_REGA(env->regwptr[n - 8]);
 798     }
 799 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 800     if (n < 64) {
 801         /* fprs */
 802         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 803     }
 804     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 805     switch (n) {
 806     case 64: GET_REGA(env->y);
 807     case 65: GET_REGA(GET_PSR(env));
 808     case 66: GET_REGA(env->wim);
 809     case 67: GET_REGA(env->tbr);
 810     case 68: GET_REGA(env->pc);
 811     case 69: GET_REGA(env->npc);
 812     case 70: GET_REGA(env->fsr);
 813     case 71: GET_REGA(0); /* csr */
 814     default: GET_REGA(0);
 815     }
 816 #else
 817     if (n < 64) {
 818         /* f0-f31 */
 819         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 820     }
 821     if (n < 80) {
 822         /* f32-f62 (double width, even numbers only) */
 823         uint64_t val;
 824
 825         val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
 826         val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
 827         GET_REG64(val);
 828     }
 829     switch (n) {
 830     case 80: GET_REGL(env->pc);
 831     case 81: GET_REGL(env->npc);
 832     case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
 833                            ((env->asi & 0xff) << 24) |
 834                            ((env->pstate & 0xfff) << 8) |
 835                            GET_CWP64(env));
 836     case 83: GET_REGL(env->fsr);
 837     case 84: GET_REGL(env->fprs);
 838     case 85: GET_REGL(env->y);
 839     }
 840 #endif
 841     return 0;
 842 }
 843
 844 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 845 {
 846 #if defined(TARGET_ABI32)
 847     abi_ulong tmp;
 848
 849     tmp = ldl_p(mem_buf);
 850 #else
 851     target_ulong tmp;
 852
 853     tmp = ldtul_p(mem_buf);
 854 #endif
 855
 856     if (n < 8) {
 857         /* g0..g7 */
 858         env->gregs[n] = tmp;
 859     } else if (n < 32) {
 860         /* register window */
 861         env->regwptr[n - 8] = tmp;
 862     }
 863 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 864     else if (n < 64) {
 865         /* fprs */
 866         *((uint32_t *)&env->fpr[n - 32]) = tmp;
 867     } else {
 868         /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 869         switch (n) {
 870         case 64: env->y = tmp; break;
 871         case 65: PUT_PSR(env, tmp); break;
 872         case 66: env->wim = tmp; break;
 873         case 67: env->tbr = tmp; break;
 874         case 68: env->pc = tmp; break;
 875         case 69: env->npc = tmp; break;
 876         case 70: env->fsr = tmp; break;
 877         default: return 0;
 878         }
 879     }
 880     return 4;
 881 #else
 882     else if (n < 64) {
 883         /* f0-f31 */
 884         env->fpr[n] = ldfl_p(mem_buf);
 885         return 4;
 886     } else if (n < 80) {
 887         /* f32-f62 (double width, even numbers only) */
 888         *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
 889         *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
 890     } else {
 891         switch (n) {
 892         case 80: env->pc = tmp; break;
 893         case 81: env->npc = tmp; break;
 894         case 82:
 895             PUT_CCR(env, tmp >> 32);
 896             env->asi = (tmp >> 24) & 0xff;
 897             env->pstate = (tmp >> 8) & 0xfff;
 898             PUT_CWP64(env, tmp & 0xff);
 899             break;
 900         case 83: env->fsr = tmp; break;
 901         case 84: env->fprs = tmp; break;
 902         case 85: env->y = tmp; break;
 903         default: return 0;
 904         }
 905     }
 906     return 8;
 907 #endif
 908 }
 909 #elif defined (TARGET_ARM)
 910
 911 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
 912    whatever the target description contains.  Due to a historical mishap
 913    the FPA registers appear in between core integer regs and the CPSR.
 914    We hack round this by giving the FPA regs zero size when talking to a
 915    newer gdb.  */
 916 #define NUM_CORE_REGS 26
 917 #define GDB_CORE_XML "arm-core.xml"
 918
 919 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 920 {
 921     if (n < 16) {
 922         /* Core integer register.  */
 923         GET_REG32(env->regs[n]);
 924     }
 925     if (n < 24) {
 926         /* FPA registers.  */
 927         if (gdb_has_xml)
 928             return 0;
 929         memset(mem_buf, 0, 12);
 930         return 12;
 931     }
 932     switch (n) {
 933     case 24:
 934         /* FPA status register.  */
 935         if (gdb_has_xml)
 936             return 0;
 937         GET_REG32(0);
 938     case 25:
 939         /* CPSR */
 940         GET_REG32(cpsr_read(env));
 941     }
 942     /* Unknown register.  */
 943     return 0;
 944 }
 945
 946 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 947 {
 948     uint32_t tmp;
 949
 950     tmp = ldl_p(mem_buf);
 951
 952     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
 953        cause problems if we ever implement the Jazelle DBX extensions.  */
 954     if (n == 15)
 955         tmp &= ~1;
 956
 957     if (n < 16) {
 958         /* Core integer register.  */
 959         env->regs[n] = tmp;
 960         return 4;
 961     }
 962     if (n < 24) { /* 16-23 */
 963         /* FPA registers (ignored).  */
 964         if (gdb_has_xml)
 965             return 0;
 966         return 12;
 967     }
 968     switch (n) {
 969     case 24:
 970         /* FPA status register (ignored).  */
 971         if (gdb_has_xml)
 972             return 0;
 973         return 4;
 974     case 25:
 975         /* CPSR */
 976         cpsr_write (env, tmp, 0xffffffff);
 977         return 4;
 978     }
 979     /* Unknown register.  */
 980     return 0;
 981 }
 982
 983 #elif defined (TARGET_M68K)
 984
 985 #define NUM_CORE_REGS 18
 986
 987 #define GDB_CORE_XML "cf-core.xml"
 988
 989 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 990 {
 991     if (n < 8) {
 992         /* D0-D7 */
 993         GET_REG32(env->dregs[n]);
 994     } else if (n < 16) {
 995         /* A0-A7 */
 996         GET_REG32(env->aregs[n - 8]);
 997     } else {
 998         switch (n) {
 999         case 16: GET_REG32(env->sr);
1000         case 17: GET_REG32(env->pc);
1001         }
1002     }
1003     /* FP registers not included here because they vary between
1004        ColdFire and m68k.  Use XML bits for these.  */
1005     return 0;
1006 }
1007
1008 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1009 {
1010     uint32_t tmp;
1011
1012     tmp = ldl_p(mem_buf);
1013
1014     if (n < 8) {
1015         /* D0-D7 */
1016         env->dregs[n] = tmp;
1017     } else if (n < 8) {
1018         /* A0-A7 */
1019         env->aregs[n - 8] = tmp;
1020     } else {
1021         switch (n) {
1022         case 16: env->sr = tmp; break;
1023         case 17: env->pc = tmp; break;
1024         default: return 0;
1025         }
1026     }
1027     return 4;
1028 }
1029 #elif defined (TARGET_MIPS)
1030
1031 #define NUM_CORE_REGS 73
1032
1033 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1034 {
1035     if (n < 32) {
1036         GET_REGL(env->active_tc.gpr[n]);
1037     }
1038     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
1039         if (n >= 38 && n < 70) {
1040             if (env->CP0_Status & (1 << CP0St_FR))
1041                 GET_REGL(env->active_fpu.fpr[n - 38].d);
1042             else
1043                 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
1044         }
1045         switch (n) {
1046         case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
1047         case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
1048         }
1049     }
1050     switch (n) {
1051     case 32: GET_REGL((int32_t)env->CP0_Status);
1052     case 33: GET_REGL(env->active_tc.LO[0]);
1053     case 34: GET_REGL(env->active_tc.HI[0]);
1054     case 35: GET_REGL(env->CP0_BadVAddr);
1055     case 36: GET_REGL((int32_t)env->CP0_Cause);
1056     case 37: GET_REGL(env->active_tc.PC);
1057     case 72: GET_REGL(0); /* fp */
1058     case 89: GET_REGL((int32_t)env->CP0_PRid);
1059     }
1060     if (n >= 73 && n <= 88) {
1061         /* 16 embedded regs.  */
1062         GET_REGL(0);
1063     }
1064
1065     return 0;
1066 }
1067
1068 /* convert MIPS rounding mode in FCR31 to IEEE library */
1069 static unsigned int ieee_rm[] =
1070   {
1071     float_round_nearest_even,
1072     float_round_to_zero,
1073     float_round_up,
1074     float_round_down
1075   };
1076 #define RESTORE_ROUNDING_MODE \
1077     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1078
1079 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1080 {
1081     target_ulong tmp;
1082
1083     tmp = ldtul_p(mem_buf);
1084
1085     if (n < 32) {
1086         env->active_tc.gpr[n] = tmp;
1087         return sizeof(target_ulong);
1088     }
1089     if (env->CP0_Config1 & (1 << CP0C1_FP)
1090             && n >= 38 && n < 73) {
1091         if (n < 70) {
1092             if (env->CP0_Status & (1 << CP0St_FR))
1093               env->active_fpu.fpr[n - 38].d = tmp;
1094             else
1095               env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1096         }
1097         switch (n) {
1098         case 70:
1099             env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1100             /* set rounding mode */
1101             RESTORE_ROUNDING_MODE;
1102 #ifndef CONFIG_SOFTFLOAT
1103             /* no floating point exception for native float */
1104             SET_FP_ENABLE(env->active_fpu.fcr31, 0);
1105 #endif
1106             break;
1107         case 71: env->active_fpu.fcr0 = tmp; break;
1108         }
1109         return sizeof(target_ulong);
1110     }
1111     switch (n) {
1112     case 32: env->CP0_Status = tmp; break;
1113     case 33: env->active_tc.LO[0] = tmp; break;
1114     case 34: env->active_tc.HI[0] = tmp; break;
1115     case 35: env->CP0_BadVAddr = tmp; break;
1116     case 36: env->CP0_Cause = tmp; break;
1117     case 37: env->active_tc.PC = tmp; break;
1118     case 72: /* fp, ignored */ break;
1119     default:
1120         if (n > 89)
1121             return 0;
1122         /* Other registers are readonly.  Ignore writes.  */
1123         break;
1124     }
1125
1126     return sizeof(target_ulong);
1127 }
1128 #elif defined (TARGET_SH4)
1129
1130 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1131 /* FIXME: We should use XML for this.  */
1132
1133 #define NUM_CORE_REGS 59
1134
1135 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1136 {
1137     if (n < 8) {
1138         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1139             GET_REGL(env->gregs[n + 16]);
1140         } else {
1141             GET_REGL(env->gregs[n]);
1142         }
1143     } else if (n < 16) {
1144         GET_REGL(env->gregs[n - 8]);
1145     } else if (n >= 25 && n < 41) {
1146         GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1147     } else if (n >= 43 && n < 51) {
1148         GET_REGL(env->gregs[n - 43]);
1149     } else if (n >= 51 && n < 59) {
1150         GET_REGL(env->gregs[n - (51 - 16)]);
1151     }
1152     switch (n) {
1153     case 16: GET_REGL(env->pc);
1154     case 17: GET_REGL(env->pr);
1155     case 18: GET_REGL(env->gbr);
1156     case 19: GET_REGL(env->vbr);
1157     case 20: GET_REGL(env->mach);
1158     case 21: GET_REGL(env->macl);
1159     case 22: GET_REGL(env->sr);
1160     case 23: GET_REGL(env->fpul);
1161     case 24: GET_REGL(env->fpscr);
1162     case 41: GET_REGL(env->ssr);
1163     case 42: GET_REGL(env->spc);
1164     }
1165
1166     return 0;
1167 }
1168
1169 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1170 {
1171     uint32_t tmp;
1172
1173     tmp = ldl_p(mem_buf);
1174
1175     if (n < 8) {
1176         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1177             env->gregs[n + 16] = tmp;
1178         } else {
1179             env->gregs[n] = tmp;
1180         }
1181         return 4;
1182     } else if (n < 16) {
1183         env->gregs[n - 8] = tmp;
1184         return 4;
1185     } else if (n >= 25 && n < 41) {
1186         env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1187     } else if (n >= 43 && n < 51) {
1188         env->gregs[n - 43] = tmp;
1189         return 4;
1190     } else if (n >= 51 && n < 59) {
1191         env->gregs[n - (51 - 16)] = tmp;
1192         return 4;
1193     }
1194     switch (n) {
1195     case 16: env->pc = tmp;
1196     case 17: env->pr = tmp;
1197     case 18: env->gbr = tmp;
1198     case 19: env->vbr = tmp;
1199     case 20: env->mach = tmp;
1200     case 21: env->macl = tmp;
1201     case 22: env->sr = tmp;
1202     case 23: env->fpul = tmp;
1203     case 24: env->fpscr = tmp;
1204     case 41: env->ssr = tmp;
1205     case 42: env->spc = tmp;
1206     default: return 0;
1207     }
1208
1209     return 4;
1210 }
1211 #elif defined (TARGET_MICROBLAZE)
1212
1213 #define NUM_CORE_REGS (32 + 5)
1214
1215 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1216 {
1217     if (n < 32) {
1218         GET_REG32(env->regs[n]);
1219     } else {
1220         GET_REG32(env->sregs[n - 32]);
1221     }
1222     return 0;
1223 }
1224
1225 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1226 {
1227     uint32_t tmp;
1228
1229     if (n > NUM_CORE_REGS)
1230         return 0;
1231
1232     tmp = ldl_p(mem_buf);
1233
1234     if (n < 32) {
1235         env->regs[n] = tmp;
1236     } else {
1237         env->sregs[n - 32] = tmp;
1238     }
1239     return 4;
1240 }
1241 #elif defined (TARGET_CRIS)
1242
1243 #define NUM_CORE_REGS 49
1244
1245 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1246 {
1247     uint8_t srs;
1248
1249     srs = env->pregs[PR_SRS];
1250     if (n < 16) {
1251         GET_REG32(env->regs[n]);
1252     }
1253
1254     if (n >= 21 && n < 32) {
1255         GET_REG32(env->pregs[n - 16]);
1256     }
1257     if (n >= 33 && n < 49) {
1258         GET_REG32(env->sregs[srs][n - 33]);
1259     }
1260     switch (n) {
1261     case 16: GET_REG8(env->pregs[0]);
1262     case 17: GET_REG8(env->pregs[1]);
1263     case 18: GET_REG32(env->pregs[2]);
1264     case 19: GET_REG8(srs);
1265     case 20: GET_REG16(env->pregs[4]);
1266     case 32: GET_REG32(env->pc);
1267     }
1268
1269     return 0;
1270 }
1271
1272 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1273 {
1274     uint32_t tmp;
1275
1276     if (n > 49)
1277         return 0;
1278
1279     tmp = ldl_p(mem_buf);
1280
1281     if (n < 16) {
1282         env->regs[n] = tmp;
1283     }
1284
1285     if (n >= 21 && n < 32) {
1286         env->pregs[n - 16] = tmp;
1287     }
1288
1289     /* FIXME: Should support function regs be writable?  */
1290     switch (n) {
1291     case 16: return 1;
1292     case 17: return 1;
1293     case 18: env->pregs[PR_PID] = tmp; break;
1294     case 19: return 1;
1295     case 20: return 2;
1296     case 32: env->pc = tmp; break;
1297     }
1298
1299     return 4;
1300 }
1301 #elif defined (TARGET_ALPHA)
1302
1303 #define NUM_CORE_REGS 65
1304
1305 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1306 {
1307     if (n < 31) {
1308        GET_REGL(env->ir[n]);
1309     }
1310     else if (n == 31) {
1311        GET_REGL(0);
1312     }
1313     else if (n<63) {
1314        uint64_t val;
1315
1316        val = *((uint64_t *)&env->fir[n-32]);
1317        GET_REGL(val);
1318     }
1319     else if (n==63) {
1320        GET_REGL(env->fpcr);
1321     }
1322     else if (n==64) {
1323        GET_REGL(env->pc);
1324     }
1325     else {
1326        GET_REGL(0);
1327     }
1328
1329     return 0;
1330 }
1331
1332 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1333 {
1334     target_ulong tmp;
1335     tmp = ldtul_p(mem_buf);
1336
1337     if (n < 31) {
1338         env->ir[n] = tmp;
1339     }
1340
1341     if (n > 31 && n < 63) {
1342         env->fir[n - 32] = ldfl_p(mem_buf);
1343     }
1344
1345     if (n == 64 ) {
1346        env->pc=tmp;
1347     }
1348
1349     return 8;
1350 }
1351 #else
1352
1353 #define NUM_CORE_REGS 0
1354
1355 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1356 {
1357     return 0;
1358 }
1359
1360 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1361 {
1362     return 0;
1363 }
1364
1365 #endif
1366
1367 static int num_g_regs = NUM_CORE_REGS;
1368
1369 #ifdef GDB_CORE_XML
1370 /* Encode data using the encoding for 'x' packets.  */
1371 static int memtox(char *buf, const char *mem, int len)
1372 {
1373     char *p = buf;
1374     char c;
1375
1376     while (len--) {
1377         c = *(mem++);
1378         switch (c) {
1379         case '#': case '$': case '*': case '}':
1380             *(p++) = '}';
1381             *(p++) = c ^ 0x20;
1382             break;
1383         default:
1384             *(p++) = c;
1385             break;
1386         }
1387     }
1388     return p - buf;
1389 }
1390
1391 static const char *get_feature_xml(const char *p, const char **newp)
1392 {
1393     extern const char *const xml_builtin[][2];
1394     size_t len;
1395     int i;
1396     const char *name;
1397     static char target_xml[1024];
1398
1399     len = 0;
1400     while (p[len] && p[len] != ':')
1401         len++;
1402     *newp = p + len;
1403
1404     name = NULL;
1405     if (strncmp(p, "target.xml", len) == 0) {
1406         /* Generate the XML description for this CPU.  */
1407         if (!target_xml[0]) {
1408             GDBRegisterState *r;
1409
1410             snprintf(target_xml, sizeof(target_xml),
1411                      "<?xml version=\"1.0\"?>"
1412                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1413                      "<target>"
1414                      "<xi:include href=\"%s\"/>",
1415                      GDB_CORE_XML);
1416
1417             for (r = first_cpu->gdb_regs; r; r = r->next) {
1418                 pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
1419                 pstrcat(target_xml, sizeof(target_xml), r->xml);
1420                 pstrcat(target_xml, sizeof(target_xml), "\"/>");
1421             }
1422             pstrcat(target_xml, sizeof(target_xml), "</target>");
1423         }
1424         return target_xml;
1425     }
1426     for (i = 0; ; i++) {
1427         name = xml_builtin[i][0];
1428         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1429             break;
1430     }
1431     return name ? xml_builtin[i][1] : NULL;
1432 }
1433 #endif
1434
1435 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1436 {
1437     GDBRegisterState *r;
1438
1439     if (reg < NUM_CORE_REGS)
1440         return cpu_gdb_read_register(env, mem_buf, reg);
1441
1442     for (r = env->gdb_regs; r; r = r->next) {
1443         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1444             return r->get_reg(env, mem_buf, reg - r->base_reg);
1445         }
1446     }
1447     return 0;
1448 }
1449
1450 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1451 {
1452     GDBRegisterState *r;
1453
1454     if (reg < NUM_CORE_REGS)
1455         return cpu_gdb_write_register(env, mem_buf, reg);
1456
1457     for (r = env->gdb_regs; r; r = r->next) {
1458         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1459             return r->set_reg(env, mem_buf, reg - r->base_reg);
1460         }
1461     }
1462     return 0;
1463 }
1464
1465 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
1466    specifies the first register number and these registers are included in
1467    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
1468    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1469  */
1470
1471 void gdb_register_coprocessor(CPUState * env,
1472                              gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1473                              int num_regs, const char *xml, int g_pos)
1474 {
1475     GDBRegisterState *s;
1476     GDBRegisterState **p;
1477     static int last_reg = NUM_CORE_REGS;
1478
1479     s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1480     s->base_reg = last_reg;
1481     s->num_regs = num_regs;
1482     s->get_reg = get_reg;
1483     s->set_reg = set_reg;
1484     s->xml = xml;
1485     p = &env->gdb_regs;
1486     while (*p) {
1487         /* Check for duplicates.  */
1488         if (strcmp((*p)->xml, xml) == 0)
1489             return;
1490         p = &(*p)->next;
1491     }
1492     /* Add to end of list.  */
1493     last_reg += num_regs;
1494     *p = s;
1495     if (g_pos) {
1496         if (g_pos != s->base_reg) {
1497             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1498                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
1499         } else {
1500             num_g_regs = last_reg;
1501         }
1502     }
1503 }
1504
1505 #ifndef CONFIG_USER_ONLY
1506 static const int xlat_gdb_type[] = {
1507     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
1508     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
1509     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1510 };
1511 #endif
1512
1513 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1514 {
1515     CPUState *env;
1516     int err = 0;
1517
1518     if (kvm_enabled())
1519         return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1520
1521     switch (type) {
1522     case GDB_BREAKPOINT_SW:
1523     case GDB_BREAKPOINT_HW:
1524         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1525             err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1526             if (err)
1527                 break;
1528         }
1529         return err;
1530 #ifndef CONFIG_USER_ONLY
1531     case GDB_WATCHPOINT_WRITE:
1532     case GDB_WATCHPOINT_READ:
1533     case GDB_WATCHPOINT_ACCESS:
1534         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1535             err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1536                                         NULL);
1537             if (err)
1538                 break;
1539         }
1540         return err;
1541 #endif
1542     default:
1543         return -ENOSYS;
1544     }
1545 }
1546
1547 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1548 {
1549     CPUState *env;
1550     int err = 0;
1551
1552     if (kvm_enabled())
1553         return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1554
1555     switch (type) {
1556     case GDB_BREAKPOINT_SW:
1557     case GDB_BREAKPOINT_HW:
1558         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1559             err = cpu_breakpoint_remove(env, addr, BP_GDB);
1560             if (err)
1561                 break;
1562         }
1563         return err;
1564 #ifndef CONFIG_USER_ONLY
1565     case GDB_WATCHPOINT_WRITE:
1566     case GDB_WATCHPOINT_READ:
1567     case GDB_WATCHPOINT_ACCESS:
1568         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1569             err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1570             if (err)
1571                 break;
1572         }
1573         return err;
1574 #endif
1575     default:
1576         return -ENOSYS;
1577     }
1578 }
1579
1580 static void gdb_breakpoint_remove_all(void)
1581 {
1582     CPUState *env;
1583
1584     if (kvm_enabled()) {
1585         kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1586         return;
1587     }
1588
1589     for (env = first_cpu; env != NULL; env = env->next_cpu) {
1590         cpu_breakpoint_remove_all(env, BP_GDB);
1591 #ifndef CONFIG_USER_ONLY
1592         cpu_watchpoint_remove_all(env, BP_GDB);
1593 #endif
1594     }
1595 }
1596
1597 static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
1598 {
1599 #if defined(TARGET_I386)
1600     cpu_synchronize_state(s->c_cpu);
1601     s->c_cpu->eip = pc;
1602 #elif defined (TARGET_PPC)
1603     s->c_cpu->nip = pc;
1604 #elif defined (TARGET_SPARC)
1605     s->c_cpu->pc = pc;
1606     s->c_cpu->npc = pc + 4;
1607 #elif defined (TARGET_ARM)
1608     s->c_cpu->regs[15] = pc;
1609 #elif defined (TARGET_SH4)
1610     s->c_cpu->pc = pc;
1611 #elif defined (TARGET_MIPS)
1612     s->c_cpu->active_tc.PC = pc;
1613 #elif defined (TARGET_MICROBLAZE)
1614     s->c_cpu->sregs[SR_PC] = pc;
1615 #elif defined (TARGET_CRIS)
1616     s->c_cpu->pc = pc;
1617 #elif defined (TARGET_ALPHA)
1618     s->c_cpu->pc = pc;
1619 #endif
1620 }
1621
1622 static inline int gdb_id(CPUState *env)
1623 {
1624 #if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_NPTL)
1625     return env->host_tid;
1626 #else
1627     return env->cpu_index + 1;
1628 #endif
1629 }
1630
1631 static CPUState *find_cpu(uint32_t thread_id)
1632 {
1633     CPUState *env;
1634
1635     for (env = first_cpu; env != NULL; env = env->next_cpu) {
1636         if (gdb_id(env) == thread_id) {
1637             return env;
1638         }
1639     }
1640
1641     return NULL;
1642 }
1643
1644 static int gdb_handle_packet(GDBState *s, const char *line_buf)
1645 {
1646     CPUState *env;
1647     const char *p;
1648     uint32_t thread;
1649     int ch, reg_size, type, res;
1650     char buf[MAX_PACKET_LENGTH];
1651     uint8_t mem_buf[MAX_PACKET_LENGTH];
1652     uint8_t *registers;
1653     target_ulong addr, len;
1654
1655 #ifdef DEBUG_GDB
1656     printf("command='%s'\n", line_buf);
1657 #endif
1658     p = line_buf;
1659     ch = *p++;
1660     switch(ch) {
1661     case '?':
1662         /* TODO: Make this return the correct value for user-mode.  */
1663         snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1664                  gdb_id(s->c_cpu));
1665         put_packet(s, buf);
1666         /* Remove all the breakpoints when this query is issued,
1667          * because gdb is doing and initial connect and the state
1668          * should be cleaned up.
1669          */
1670         gdb_breakpoint_remove_all();
1671         break;
1672     case 'c':
1673         if (*p != '\0') {
1674             addr = strtoull(p, (char **)&p, 16);
1675             gdb_set_cpu_pc(s, addr);
1676         }
1677         s->signal = 0;
1678         gdb_continue(s);
1679         return RS_IDLE;
1680     case 'C':
1681         s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1682         if (s->signal == -1)
1683             s->signal = 0;
1684         gdb_continue(s);
1685         return RS_IDLE;
1686     case 'v':
1687         if (strncmp(p, "Cont", 4) == 0) {
1688             int res_signal, res_thread;
1689
1690             p += 4;
1691             if (*p == '?') {
1692                 put_packet(s, "vCont;c;C;s;S");
1693                 break;
1694             }
1695             res = 0;
1696             res_signal = 0;
1697             res_thread = 0;
1698             while (*p) {
1699                 int action, signal;
1700
1701                 if (*p++ != ';') {
1702                     res = 0;
1703                     break;
1704                 }
1705                 action = *p++;
1706                 signal = 0;
1707                 if (action == 'C' || action == 'S') {
1708                     signal = strtoul(p, (char **)&p, 16);
1709                 } else if (action != 'c' && action != 's') {
1710                     res = 0;
1711                     break;
1712                 }
1713                 thread = 0;
1714                 if (*p == ':') {
1715                     thread = strtoull(p+1, (char **)&p, 16);
1716                 }
1717                 action = tolower(action);
1718                 if (res == 0 || (res == 'c' && action == 's')) {
1719                     res = action;
1720                     res_signal = signal;
1721                     res_thread = thread;
1722                 }
1723             }
1724             if (res) {
1725                 if (res_thread != -1 && res_thread != 0) {
1726                     env = find_cpu(res_thread);
1727                     if (env == NULL) {
1728                         put_packet(s, "E22");
1729                         break;
1730                     }
1731                     s->c_cpu = env;
1732                 }
1733                 if (res == 's') {
1734                     cpu_single_step(s->c_cpu, sstep_flags);
1735                 }
1736                 s->signal = res_signal;
1737                 gdb_continue(s);
1738                 return RS_IDLE;
1739             }
1740             break;
1741         } else {
1742             goto unknown_command;
1743         }
1744     case 'k':
1745         /* Kill the target */
1746         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1747         exit(0);
1748     case 'D':
1749         /* Detach packet */
1750         gdb_breakpoint_remove_all();
1751         gdb_continue(s);
1752         put_packet(s, "OK");
1753         break;
1754     case 's':
1755         if (*p != '\0') {
1756             addr = strtoull(p, (char **)&p, 16);
1757             gdb_set_cpu_pc(s, addr);
1758         }
1759         cpu_single_step(s->c_cpu, sstep_flags);
1760         gdb_continue(s);
1761         return RS_IDLE;
1762     case 'F':
1763         {
1764             target_ulong ret;
1765             target_ulong err;
1766
1767             ret = strtoull(p, (char **)&p, 16);
1768             if (*p == ',') {
1769                 p++;
1770                 err = strtoull(p, (char **)&p, 16);
1771             } else {
1772                 err = 0;
1773             }
1774             if (*p == ',')
1775                 p++;
1776             type = *p;
1777             if (gdb_current_syscall_cb)
1778                 gdb_current_syscall_cb(s->c_cpu, ret, err);
1779             if (type == 'C') {
1780                 put_packet(s, "T02");
1781             } else {
1782                 gdb_continue(s);
1783             }
1784         }
1785         break;
1786     case 'g':
1787         cpu_synchronize_state(s->g_cpu);
1788         len = 0;
1789         for (addr = 0; addr < num_g_regs; addr++) {
1790             reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1791             len += reg_size;
1792         }
1793         memtohex(buf, mem_buf, len);
1794         put_packet(s, buf);
1795         break;
1796     case 'G':
1797         cpu_synchronize_state(s->g_cpu);
1798         registers = mem_buf;
1799         len = strlen(p) / 2;
1800         hextomem((uint8_t *)registers, p, len);
1801         for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1802             reg_size = gdb_write_register(s->g_cpu, registers, addr);
1803             len -= reg_size;
1804             registers += reg_size;
1805         }
1806         put_packet(s, "OK");
1807         break;
1808     case 'm':
1809         addr = strtoull(p, (char **)&p, 16);
1810         if (*p == ',')
1811             p++;
1812         len = strtoull(p, NULL, 16);
1813         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
1814             put_packet (s, "E14");
1815         } else {
1816             memtohex(buf, mem_buf, len);
1817             put_packet(s, buf);
1818         }
1819         break;
1820     case 'M':
1821         addr = strtoull(p, (char **)&p, 16);
1822         if (*p == ',')
1823             p++;
1824         len = strtoull(p, (char **)&p, 16);
1825         if (*p == ':')
1826             p++;
1827         hextomem(mem_buf, p, len);
1828         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
1829             put_packet(s, "E14");
1830         else
1831             put_packet(s, "OK");
1832         break;
1833     case 'p':
1834         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1835            This works, but can be very slow.  Anything new enough to
1836            understand XML also knows how to use this properly.  */
1837         if (!gdb_has_xml)
1838             goto unknown_command;
1839         addr = strtoull(p, (char **)&p, 16);
1840         reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1841         if (reg_size) {
1842             memtohex(buf, mem_buf, reg_size);
1843             put_packet(s, buf);
1844         } else {
1845             put_packet(s, "E14");
1846         }
1847         break;
1848     case 'P':
1849         if (!gdb_has_xml)
1850             goto unknown_command;
1851         addr = strtoull(p, (char **)&p, 16);
1852         if (*p == '=')
1853             p++;
1854         reg_size = strlen(p) / 2;
1855         hextomem(mem_buf, p, reg_size);
1856         gdb_write_register(s->g_cpu, mem_buf, addr);
1857         put_packet(s, "OK");
1858         break;
1859     case 'Z':
1860     case 'z':
1861         type = strtoul(p, (char **)&p, 16);
1862         if (*p == ',')
1863             p++;
1864         addr = strtoull(p, (char **)&p, 16);
1865         if (*p == ',')
1866             p++;
1867         len = strtoull(p, (char **)&p, 16);
1868         if (ch == 'Z')
1869             res = gdb_breakpoint_insert(addr, len, type);
1870         else
1871             res = gdb_breakpoint_remove(addr, len, type);
1872         if (res >= 0)
1873              put_packet(s, "OK");
1874         else if (res == -ENOSYS)
1875             put_packet(s, "");
1876         else
1877             put_packet(s, "E22");
1878         break;
1879     case 'H':
1880         type = *p++;
1881         thread = strtoull(p, (char **)&p, 16);
1882         if (thread == -1 || thread == 0) {
1883             put_packet(s, "OK");
1884             break;
1885         }
1886         env = find_cpu(thread);
1887         if (env == NULL) {
1888             put_packet(s, "E22");
1889             break;
1890         }
1891         switch (type) {
1892         case 'c':
1893             s->c_cpu = env;
1894             put_packet(s, "OK");
1895             break;
1896         case 'g':
1897             s->g_cpu = env;
1898             put_packet(s, "OK");
1899             break;
1900         default:
1901              put_packet(s, "E22");
1902              break;
1903         }
1904         break;
1905     case 'T':
1906         thread = strtoull(p, (char **)&p, 16);
1907         env = find_cpu(thread);
1908
1909         if (env != NULL) {
1910             put_packet(s, "OK");
1911         } else {
1912             put_packet(s, "E22");
1913         }
1914         break;
1915     case 'q':
1916     case 'Q':
1917         /* parse any 'q' packets here */
1918         if (!strcmp(p,"qemu.sstepbits")) {
1919             /* Query Breakpoint bit definitions */
1920             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1921                      SSTEP_ENABLE,
1922                      SSTEP_NOIRQ,
1923                      SSTEP_NOTIMER);
1924             put_packet(s, buf);
1925             break;
1926         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1927             /* Display or change the sstep_flags */
1928             p += 10;
1929             if (*p != '=') {
1930                 /* Display current setting */
1931                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1932                 put_packet(s, buf);
1933                 break;
1934             }
1935             p++;
1936             type = strtoul(p, (char **)&p, 16);
1937             sstep_flags = type;
1938             put_packet(s, "OK");
1939             break;
1940         } else if (strcmp(p,"C") == 0) {
1941             /* "Current thread" remains vague in the spec, so always return
1942              *  the first CPU (gdb returns the first thread). */
1943             put_packet(s, "QC1");
1944             break;
1945         } else if (strcmp(p,"fThreadInfo") == 0) {
1946             s->query_cpu = first_cpu;
1947             goto report_cpuinfo;
1948         } else if (strcmp(p,"sThreadInfo") == 0) {
1949         report_cpuinfo:
1950             if (s->query_cpu) {
1951                 snprintf(buf, sizeof(buf), "m%x", gdb_id(s->query_cpu));
1952                 put_packet(s, buf);
1953                 s->query_cpu = s->query_cpu->next_cpu;
1954             } else
1955                 put_packet(s, "l");
1956             break;
1957         } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
1958             thread = strtoull(p+16, (char **)&p, 16);
1959             env = find_cpu(thread);
1960             if (env != NULL) {
1961                 cpu_synchronize_state(env);
1962                 len = snprintf((char *)mem_buf, sizeof(mem_buf),
1963                                "CPU#%d [%s]", env->cpu_index,
1964                                env->halted ? "halted " : "running");
1965                 memtohex(buf, mem_buf, len);
1966                 put_packet(s, buf);
1967             }
1968             break;
1969         }
1970 #ifdef CONFIG_USER_ONLY
1971         else if (strncmp(p, "Offsets", 7) == 0) {
1972             TaskState *ts = s->c_cpu->opaque;
1973
1974             snprintf(buf, sizeof(buf),
1975                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1976                      ";Bss=" TARGET_ABI_FMT_lx,
1977                      ts->info->code_offset,
1978                      ts->info->data_offset,
1979                      ts->info->data_offset);
1980             put_packet(s, buf);
1981             break;
1982         }
1983 #else /* !CONFIG_USER_ONLY */
1984         else if (strncmp(p, "Rcmd,", 5) == 0) {
1985             int len = strlen(p + 5);
1986
1987             if ((len % 2) != 0) {
1988                 put_packet(s, "E01");
1989                 break;
1990             }
1991             hextomem(mem_buf, p + 5, len);
1992             len = len / 2;
1993             mem_buf[len++] = 0;
1994             qemu_chr_read(s->mon_chr, mem_buf, len);
1995             put_packet(s, "OK");
1996             break;
1997         }
1998 #endif /* !CONFIG_USER_ONLY */
1999         if (strncmp(p, "Supported", 9) == 0) {
2000             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
2001 #ifdef GDB_CORE_XML
2002             pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
2003 #endif
2004             put_packet(s, buf);
2005             break;
2006         }
2007 #ifdef GDB_CORE_XML
2008         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
2009             const char *xml;
2010             target_ulong total_len;
2011
2012             gdb_has_xml = 1;
2013             p += 19;
2014             xml = get_feature_xml(p, &p);
2015             if (!xml) {
2016                 snprintf(buf, sizeof(buf), "E00");
2017                 put_packet(s, buf);
2018                 break;
2019             }
2020
2021             if (*p == ':')
2022                 p++;
2023             addr = strtoul(p, (char **)&p, 16);
2024             if (*p == ',')
2025                 p++;
2026             len = strtoul(p, (char **)&p, 16);
2027
2028             total_len = strlen(xml);
2029             if (addr > total_len) {
2030                 snprintf(buf, sizeof(buf), "E00");
2031                 put_packet(s, buf);
2032                 break;
2033             }
2034             if (len > (MAX_PACKET_LENGTH - 5) / 2)
2035                 len = (MAX_PACKET_LENGTH - 5) / 2;
2036             if (len < total_len - addr) {
2037                 buf[0] = 'm';
2038                 len = memtox(buf + 1, xml + addr, len);
2039             } else {
2040                 buf[0] = 'l';
2041                 len = memtox(buf + 1, xml + addr, total_len - addr);
2042             }
2043             put_packet_binary(s, buf, len + 1);
2044             break;
2045         }
2046 #endif
2047         /* Unrecognised 'q' command.  */
2048         goto unknown_command;
2049
2050     default:
2051     unknown_command:
2052         /* put empty packet */
2053         buf[0] = '\0';
2054         put_packet(s, buf);
2055         break;
2056     }
2057     return RS_IDLE;
2058 }
2059
2060 void gdb_set_stop_cpu(CPUState *env)
2061 {
2062     gdbserver_state->c_cpu = env;
2063     gdbserver_state->g_cpu = env;
2064 }
2065
2066 #ifndef CONFIG_USER_ONLY
2067 static void gdb_vm_state_change(void *opaque, int running, int reason)
2068 {
2069     GDBState *s = gdbserver_state;
2070     CPUState *env = s->c_cpu;
2071     char buf[256];
2072     const char *type;
2073     int ret;
2074
2075     if (running || (reason != EXCP_DEBUG && reason != EXCP_INTERRUPT) ||
2076         s->state == RS_INACTIVE || s->state == RS_SYSCALL)
2077         return;
2078
2079     /* disable single step if it was enable */
2080     cpu_single_step(env, 0);
2081
2082     if (reason == EXCP_DEBUG) {
2083         if (env->watchpoint_hit) {
2084             switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
2085             case BP_MEM_READ:
2086                 type = "r";
2087                 break;
2088             case BP_MEM_ACCESS:
2089                 type = "a";
2090                 break;
2091             default:
2092                 type = "";
2093                 break;
2094             }
2095             snprintf(buf, sizeof(buf),
2096                      "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
2097                      GDB_SIGNAL_TRAP, gdb_id(env), type,
2098                      env->watchpoint_hit->vaddr);
2099             put_packet(s, buf);
2100             env->watchpoint_hit = NULL;
2101             return;
2102         }
2103         tb_flush(env);
2104         ret = GDB_SIGNAL_TRAP;
2105     } else {
2106         ret = GDB_SIGNAL_INT;
2107     }
2108     snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, gdb_id(env));
2109     put_packet(s, buf);
2110 }
2111 #endif
2112
2113 /* Send a gdb syscall request.
2114    This accepts limited printf-style format specifiers, specifically:
2115     %x  - target_ulong argument printed in hex.
2116     %lx - 64-bit argument printed in hex.
2117     %s  - string pointer (target_ulong) and length (int) pair.  */
2118 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
2119 {
2120     va_list va;
2121     char buf[256];
2122     char *p;
2123     target_ulong addr;
2124     uint64_t i64;
2125     GDBState *s;
2126
2127     s = gdbserver_state;
2128     if (!s)
2129         return;
2130     gdb_current_syscall_cb = cb;
2131     s->state = RS_SYSCALL;
2132 #ifndef CONFIG_USER_ONLY
2133     vm_stop(EXCP_DEBUG);
2134 #endif
2135     s->state = RS_IDLE;
2136     va_start(va, fmt);
2137     p = buf;
2138     *(p++) = 'F';
2139     while (*fmt) {
2140         if (*fmt == '%') {
2141             fmt++;
2142             switch (*fmt++) {
2143             case 'x':
2144                 addr = va_arg(va, target_ulong);
2145                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
2146                 break;
2147             case 'l':
2148                 if (*(fmt++) != 'x')
2149                     goto bad_format;
2150                 i64 = va_arg(va, uint64_t);
2151                 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
2152                 break;
2153             case 's':
2154                 addr = va_arg(va, target_ulong);
2155                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
2156                               addr, va_arg(va, int));
2157                 break;
2158             default:
2159             bad_format:
2160                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
2161                         fmt - 1);
2162                 break;
2163             }
2164         } else {
2165             *(p++) = *(fmt++);
2166         }
2167     }
2168     *p = 0;
2169     va_end(va);
2170     put_packet(s, buf);
2171 #ifdef CONFIG_USER_ONLY
2172     gdb_handlesig(s->c_cpu, 0);
2173 #else
2174     cpu_exit(s->c_cpu);
2175 #endif
2176 }
2177
2178 static void gdb_read_byte(GDBState *s, int ch)
2179 {
2180     int i, csum;
2181     uint8_t reply;
2182
2183 #ifndef CONFIG_USER_ONLY
2184     if (s->last_packet_len) {
2185         /* Waiting for a response to the last packet.  If we see the start
2186            of a new command then abandon the previous response.  */
2187         if (ch == '-') {
2188 #ifdef DEBUG_GDB
2189             printf("Got NACK, retransmitting\n");
2190 #endif
2191             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
2192         }
2193 #ifdef DEBUG_GDB
2194         else if (ch == '+')
2195             printf("Got ACK\n");
2196         else
2197             printf("Got '%c' when expecting ACK/NACK\n", ch);
2198 #endif
2199         if (ch == '+' || ch == '$')
2200             s->last_packet_len = 0;
2201         if (ch != '$')
2202             return;
2203     }
2204     if (vm_running) {
2205         /* when the CPU is running, we cannot do anything except stop
2206            it when receiving a char */
2207         vm_stop(EXCP_INTERRUPT);
2208     } else
2209 #endif
2210     {
2211         switch(s->state) {
2212         case RS_IDLE:
2213             if (ch == '$') {
2214                 s->line_buf_index = 0;
2215                 s->state = RS_GETLINE;
2216             }
2217             break;
2218         case RS_GETLINE:
2219             if (ch == '#') {
2220             s->state = RS_CHKSUM1;
2221             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2222                 s->state = RS_IDLE;
2223             } else {
2224             s->line_buf[s->line_buf_index++] = ch;
2225             }
2226             break;
2227         case RS_CHKSUM1:
2228             s->line_buf[s->line_buf_index] = '\0';
2229             s->line_csum = fromhex(ch) << 4;
2230             s->state = RS_CHKSUM2;
2231             break;
2232         case RS_CHKSUM2:
2233             s->line_csum |= fromhex(ch);
2234             csum = 0;
2235             for(i = 0; i < s->line_buf_index; i++) {
2236                 csum += s->line_buf[i];
2237             }
2238             if (s->line_csum != (csum & 0xff)) {
2239                 reply = '-';
2240                 put_buffer(s, &reply, 1);
2241                 s->state = RS_IDLE;
2242             } else {
2243                 reply = '+';
2244                 put_buffer(s, &reply, 1);
2245                 s->state = gdb_handle_packet(s, s->line_buf);
2246             }
2247             break;
2248         default:
2249             abort();
2250         }
2251     }
2252 }
2253
2254 #ifdef CONFIG_USER_ONLY
2255 int
2256 gdb_queuesig (void)
2257 {
2258     GDBState *s;
2259
2260     s = gdbserver_state;
2261
2262     if (gdbserver_fd < 0 || s->fd < 0)
2263         return 0;
2264     else
2265         return 1;
2266 }
2267
2268 int
2269 gdb_handlesig (CPUState *env, int sig)
2270 {
2271   GDBState *s;
2272   char buf[256];
2273   int n;
2274
2275   s = gdbserver_state;
2276   if (gdbserver_fd < 0 || s->fd < 0)
2277     return sig;
2278
2279   /* disable single step if it was enabled */
2280   cpu_single_step(env, 0);
2281   tb_flush(env);
2282
2283   if (sig != 0)
2284     {
2285       snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
2286       put_packet(s, buf);
2287     }
2288   /* put_packet() might have detected that the peer terminated the
2289      connection.  */
2290   if (s->fd < 0)
2291       return sig;
2292
2293   sig = 0;
2294   s->state = RS_IDLE;
2295   s->running_state = 0;
2296   while (s->running_state == 0) {
2297       n = read (s->fd, buf, 256);
2298       if (n > 0)
2299         {
2300           int i;
2301
2302           for (i = 0; i < n; i++)
2303             gdb_read_byte (s, buf[i]);
2304         }
2305       else if (n == 0 || errno != EAGAIN)
2306         {
2307           /* XXX: Connection closed.  Should probably wait for annother
2308              connection before continuing.  */
2309           return sig;
2310         }
2311   }
2312   sig = s->signal;
2313   s->signal = 0;
2314   return sig;
2315 }
2316
2317 /* Tell the remote gdb that the process has exited.  */
2318 void gdb_exit(CPUState *env, int code)
2319 {
2320   GDBState *s;
2321   char buf[4];
2322
2323   s = gdbserver_state;
2324   if (gdbserver_fd < 0 || s->fd < 0)
2325     return;
2326
2327   snprintf(buf, sizeof(buf), "W%02x", code);
2328   put_packet(s, buf);
2329 }
2330
2331 /* Tell the remote gdb that the process has exited due to SIG.  */
2332 void gdb_signalled(CPUState *env, int sig)
2333 {
2334   GDBState *s;
2335   char buf[4];
2336
2337   s = gdbserver_state;
2338   if (gdbserver_fd < 0 || s->fd < 0)
2339     return;
2340
2341   snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
2342   put_packet(s, buf);
2343 }
2344
2345 static void gdb_accept(void)
2346 {
2347     GDBState *s;
2348     struct sockaddr_in sockaddr;
2349     socklen_t len;
2350     int val, fd;
2351
2352     for(;;) {
2353         len = sizeof(sockaddr);
2354         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2355         if (fd < 0 && errno != EINTR) {
2356             perror("accept");
2357             return;
2358         } else if (fd >= 0) {
2359             break;
2360         }
2361     }
2362
2363     /* set short latency */
2364     val = 1;
2365     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
2366
2367     s = qemu_mallocz(sizeof(GDBState));
2368     s->c_cpu = first_cpu;
2369     s->g_cpu = first_cpu;
2370     s->fd = fd;
2371     gdb_has_xml = 0;
2372
2373     gdbserver_state = s;
2374
2375     fcntl(fd, F_SETFL, O_NONBLOCK);
2376 }
2377
2378 static int gdbserver_open(int port)
2379 {
2380     struct sockaddr_in sockaddr;
2381     int fd, val, ret;
2382
2383     fd = socket(PF_INET, SOCK_STREAM, 0);
2384     if (fd < 0) {
2385         perror("socket");
2386         return -1;
2387     }
2388
2389     /* allow fast reuse */
2390     val = 1;
2391     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
2392
2393     sockaddr.sin_family = AF_INET;
2394     sockaddr.sin_port = htons(port);
2395     sockaddr.sin_addr.s_addr = 0;
2396     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2397     if (ret < 0) {
2398         perror("bind");
2399         return -1;
2400     }
2401     ret = listen(fd, 0);
2402     if (ret < 0) {
2403         perror("listen");
2404         return -1;
2405     }
2406     return fd;
2407 }
2408
2409 int gdbserver_start(int port)
2410 {
2411     gdbserver_fd = gdbserver_open(port);
2412     if (gdbserver_fd < 0)
2413         return -1;
2414     /* accept connections */
2415     gdb_accept();
2416     return 0;
2417 }
2418
2419 /* Disable gdb stub for child processes.  */
2420 void gdbserver_fork(CPUState *env)
2421 {
2422     GDBState *s = gdbserver_state;
2423     if (gdbserver_fd < 0 || s->fd < 0)
2424       return;
2425     close(s->fd);
2426     s->fd = -1;
2427     cpu_breakpoint_remove_all(env, BP_GDB);
2428     cpu_watchpoint_remove_all(env, BP_GDB);
2429 }
2430 #else
2431 static int gdb_chr_can_receive(void *opaque)
2432 {
2433   /* We can handle an arbitrarily large amount of data.
2434    Pick the maximum packet size, which is as good as anything.  */
2435   return MAX_PACKET_LENGTH;
2436 }
2437
2438 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2439 {
2440     int i;
2441
2442     for (i = 0; i < size; i++) {
2443         gdb_read_byte(gdbserver_state, buf[i]);
2444     }
2445 }
2446
2447 static void gdb_chr_event(void *opaque, int event)
2448 {
2449     switch (event) {
2450     case CHR_EVENT_OPENED:
2451         vm_stop(EXCP_INTERRUPT);
2452         gdb_has_xml = 0;
2453         break;
2454     default:
2455         break;
2456     }
2457 }
2458
2459 static void gdb_monitor_output(GDBState *s, const char *msg, int len)
2460 {
2461     char buf[MAX_PACKET_LENGTH];
2462
2463     buf[0] = 'O';
2464     if (len > (MAX_PACKET_LENGTH/2) - 1)
2465         len = (MAX_PACKET_LENGTH/2) - 1;
2466     memtohex(buf + 1, (uint8_t *)msg, len);
2467     put_packet(s, buf);
2468 }
2469
2470 static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len)
2471 {
2472     const char *p = (const char *)buf;
2473     int max_sz;
2474
2475     max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2476     for (;;) {
2477         if (len <= max_sz) {
2478             gdb_monitor_output(gdbserver_state, p, len);
2479             break;
2480         }
2481         gdb_monitor_output(gdbserver_state, p, max_sz);
2482         p += max_sz;
2483         len -= max_sz;
2484     }
2485     return len;
2486 }
2487
2488 #ifndef _WIN32
2489 static void gdb_sigterm_handler(int signal)
2490 {
2491     if (vm_running)
2492         vm_stop(EXCP_INTERRUPT);
2493 }
2494 #endif
2495
2496 int gdbserver_start(const char *device)
2497 {
2498     GDBState *s;
2499     char gdbstub_device_name[128];
2500     CharDriverState *chr = NULL;
2501     CharDriverState *mon_chr;
2502
2503     if (!device)
2504         return -1;
2505     if (strcmp(device, "none") != 0) {
2506         if (strstart(device, "tcp:", NULL)) {
2507             /* enforce required TCP attributes */
2508             snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
2509                      "%s,nowait,nodelay,server", device);
2510             device = gdbstub_device_name;
2511         }
2512 #ifndef _WIN32
2513         else if (strcmp(device, "stdio") == 0) {
2514             struct sigaction act;
2515
2516             memset(&act, 0, sizeof(act));
2517             act.sa_handler = gdb_sigterm_handler;
2518             sigaction(SIGINT, &act, NULL);
2519         }
2520 #endif
2521         chr = qemu_chr_open("gdb", device, NULL);
2522         if (!chr)
2523             return -1;
2524
2525         qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2526                               gdb_chr_event, NULL);
2527     }
2528
2529     s = gdbserver_state;
2530     if (!s) {
2531         s = qemu_mallocz(sizeof(GDBState));
2532         gdbserver_state = s;
2533
2534         qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2535
2536         /* Initialize a monitor terminal for gdb */
2537         mon_chr = qemu_mallocz(sizeof(*mon_chr));
2538         mon_chr->chr_write = gdb_monitor_write;
2539         monitor_init(mon_chr, 0);
2540     } else {
2541         if (s->chr)
2542             qemu_chr_close(s->chr);
2543         mon_chr = s->mon_chr;
2544         memset(s, 0, sizeof(GDBState));
2545     }
2546     s->c_cpu = first_cpu;
2547     s->g_cpu = first_cpu;
2548     s->chr = chr;
2549     s->state = chr ? RS_IDLE : RS_INACTIVE;
2550     s->mon_chr = mon_chr;
2551
2552     return 0;
2553 }
2554 #endif