configure: expand ${prefix} in create_config
[qemu/mdroth.git] / hw / pc_piix.c
blob70f563a67e5540a2eb872edf0b33a859e0c74211
1 /*
2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "hw.h"
26 #include "pc.h"
27 #include "apic.h"
28 #include "pci.h"
29 #include "usb-uhci.h"
30 #include "usb-ohci.h"
31 #include "net.h"
32 #include "boards.h"
33 #include "ide.h"
34 #include "kvm.h"
36 #define MAX_IDE_BUS 2
38 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
39 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
40 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
42 /* PC hardware initialisation */
43 static void pc_init1(ram_addr_t ram_size,
44 const char *boot_device,
45 const char *kernel_filename,
46 const char *kernel_cmdline,
47 const char *initrd_filename,
48 const char *cpu_model,
49 int pci_enabled)
51 int i;
52 ram_addr_t below_4g_mem_size, above_4g_mem_size;
53 PCIBus *pci_bus;
54 PCII440FXState *i440fx_state;
55 int piix3_devfn = -1;
56 qemu_irq *cpu_irq;
57 qemu_irq *isa_irq;
58 qemu_irq *i8259;
59 qemu_irq *cmos_s3;
60 qemu_irq *smi_irq;
61 IsaIrqState *isa_irq_state;
62 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
63 FDCtrl *floppy_controller;
64 ISADevice *rtc_state;
66 pc_cpus_init(cpu_model);
68 vmport_init();
70 /* allocate ram and load rom/bios */
71 pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
72 &below_4g_mem_size, &above_4g_mem_size);
74 cpu_irq = pc_allocate_cpu_irq();
75 i8259 = i8259_init(cpu_irq[0]);
76 isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
77 isa_irq_state->i8259 = i8259;
78 if (pci_enabled) {
79 isa_irq_state->ioapic = ioapic_init();
81 isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
83 if (pci_enabled) {
84 pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
85 } else {
86 pci_bus = NULL;
87 isa_bus_new(NULL);
89 isa_bus_irqs(isa_irq);
91 pc_register_ferr_irq(isa_reserve_irq(13));
93 pc_vga_init(pci_enabled? pci_bus: NULL);
95 /* init basic PC hardware */
96 pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
98 for(i = 0; i < nb_nics; i++) {
99 NICInfo *nd = &nd_table[i];
101 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
102 pc_init_ne2k_isa(nd);
103 else
104 pci_nic_init_nofail(nd, "e1000", NULL);
107 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
108 fprintf(stderr, "qemu: too many IDE bus\n");
109 exit(1);
112 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
113 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
116 if (pci_enabled) {
117 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
118 } else {
119 for(i = 0; i < MAX_IDE_BUS; i++) {
120 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
121 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
125 #ifdef HAS_AUDIO
126 pc_audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
127 #endif
129 pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
130 floppy_controller, rtc_state);
132 if (pci_enabled && usb_enabled) {
133 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
136 if (pci_enabled && acpi_enabled) {
137 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
138 i2c_bus *smbus;
140 cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
141 smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
142 /* TODO: Populate SPD eeprom data. */
143 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
144 isa_reserve_irq(9), *cmos_s3, *smi_irq,
145 kvm_enabled());
146 for (i = 0; i < 8; i++) {
147 DeviceState *eeprom;
148 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
149 qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
150 qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
151 qdev_init_nofail(eeprom);
155 if (i440fx_state) {
156 i440fx_init_memory_mappings(i440fx_state);
159 if (pci_enabled) {
160 pc_pci_device_init(pci_bus);
164 static void pc_init_pci(ram_addr_t ram_size,
165 const char *boot_device,
166 const char *kernel_filename,
167 const char *kernel_cmdline,
168 const char *initrd_filename,
169 const char *cpu_model)
171 pc_init1(ram_size, boot_device,
172 kernel_filename, kernel_cmdline,
173 initrd_filename, cpu_model, 1);
176 static void pc_init_isa(ram_addr_t ram_size,
177 const char *boot_device,
178 const char *kernel_filename,
179 const char *kernel_cmdline,
180 const char *initrd_filename,
181 const char *cpu_model)
183 if (cpu_model == NULL)
184 cpu_model = "486";
185 pc_init1(ram_size, boot_device,
186 kernel_filename, kernel_cmdline,
187 initrd_filename, cpu_model, 0);
190 static QEMUMachine pc_machine = {
191 .name = "pc-0.13",
192 .alias = "pc",
193 .desc = "Standard PC",
194 .init = pc_init_pci,
195 .max_cpus = 255,
196 .is_default = 1,
199 static QEMUMachine pc_machine_v0_12 = {
200 .name = "pc-0.12",
201 .desc = "Standard PC",
202 .init = pc_init_pci,
203 .max_cpus = 255,
204 .compat_props = (GlobalProperty[]) {
206 .driver = "virtio-serial-pci",
207 .property = "max_nr_ports",
208 .value = stringify(1),
210 .driver = "virtio-serial-pci",
211 .property = "vectors",
212 .value = stringify(0),
214 { /* end of list */ }
218 static QEMUMachine pc_machine_v0_11 = {
219 .name = "pc-0.11",
220 .desc = "Standard PC, qemu 0.11",
221 .init = pc_init_pci,
222 .max_cpus = 255,
223 .compat_props = (GlobalProperty[]) {
225 .driver = "virtio-blk-pci",
226 .property = "vectors",
227 .value = stringify(0),
229 .driver = "virtio-serial-pci",
230 .property = "max_nr_ports",
231 .value = stringify(1),
233 .driver = "virtio-serial-pci",
234 .property = "vectors",
235 .value = stringify(0),
237 .driver = "ide-drive",
238 .property = "ver",
239 .value = "0.11",
241 .driver = "scsi-disk",
242 .property = "ver",
243 .value = "0.11",
245 .driver = "PCI",
246 .property = "rombar",
247 .value = stringify(0),
249 { /* end of list */ }
253 static QEMUMachine pc_machine_v0_10 = {
254 .name = "pc-0.10",
255 .desc = "Standard PC, qemu 0.10",
256 .init = pc_init_pci,
257 .max_cpus = 255,
258 .compat_props = (GlobalProperty[]) {
260 .driver = "virtio-blk-pci",
261 .property = "class",
262 .value = stringify(PCI_CLASS_STORAGE_OTHER),
264 .driver = "virtio-serial-pci",
265 .property = "class",
266 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
268 .driver = "virtio-serial-pci",
269 .property = "max_nr_ports",
270 .value = stringify(1),
272 .driver = "virtio-serial-pci",
273 .property = "vectors",
274 .value = stringify(0),
276 .driver = "virtio-net-pci",
277 .property = "vectors",
278 .value = stringify(0),
280 .driver = "virtio-blk-pci",
281 .property = "vectors",
282 .value = stringify(0),
284 .driver = "ide-drive",
285 .property = "ver",
286 .value = "0.10",
288 .driver = "scsi-disk",
289 .property = "ver",
290 .value = "0.10",
292 .driver = "PCI",
293 .property = "rombar",
294 .value = stringify(0),
296 { /* end of list */ }
300 static QEMUMachine isapc_machine = {
301 .name = "isapc",
302 .desc = "ISA-only PC",
303 .init = pc_init_isa,
304 .max_cpus = 1,
307 static void pc_machine_init(void)
309 qemu_register_machine(&pc_machine);
310 qemu_register_machine(&pc_machine_v0_12);
311 qemu_register_machine(&pc_machine_v0_11);
312 qemu_register_machine(&pc_machine_v0_10);
313 qemu_register_machine(&isapc_machine);
316 machine_init(pc_machine_init);