PCI: Bus number from the bridge, not the device
[qemu/mdroth.git] / hw / arm_pic.c
blobf44568cebbf9a44541293a0c7f2da5603b5b035d
1 /*
2 * Generic ARM Programmable Interrupt Controller support.
4 * Copyright (c) 2006 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the LGPL
8 */
10 #include "hw.h"
11 #include "pc.h"
12 #include "arm-misc.h"
14 /* Stub functions for hardware that doesn't exist. */
15 void pic_info(Monitor *mon)
19 void irq_info(Monitor *mon)
24 /* Input 0 is IRQ and input 1 is FIQ. */
25 static void arm_pic_cpu_handler(void *opaque, int irq, int level)
27 CPUState *env = (CPUState *)opaque;
28 switch (irq) {
29 case ARM_PIC_CPU_IRQ:
30 if (level)
31 cpu_interrupt(env, CPU_INTERRUPT_HARD);
32 else
33 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
34 break;
35 case ARM_PIC_CPU_FIQ:
36 if (level)
37 cpu_interrupt(env, CPU_INTERRUPT_FIQ);
38 else
39 cpu_reset_interrupt(env, CPU_INTERRUPT_FIQ);
40 break;
41 default:
42 hw_error("arm_pic_cpu_handler: Bad interrput line %d\n", irq);
46 qemu_irq *arm_pic_init_cpu(CPUState *env)
48 return qemu_allocate_irqs(arm_pic_cpu_handler, env, 2);