target-arm: Don't update base register on abort in Thumb T1 LDM
[qemu/mdroth.git] / target-arm / op_helper.c
blob8334fbcf6d987515a52b22251631b21a61f3e730
1 /*
2 * ARM helper routines
4 * Copyright (c) 2005-2007 CodeSourcery, LLC
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "exec.h"
20 #include "helper.h"
22 #define SIGNBIT (uint32_t)0x80000000
23 #define SIGNBIT64 ((uint64_t)1 << 63)
25 void raise_exception(int tt)
27 env->exception_index = tt;
28 cpu_loop_exit();
31 uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
32 uint32_t rn, uint32_t maxindex)
34 uint32_t val;
35 uint32_t tmp;
36 int index;
37 int shift;
38 uint64_t *table;
39 table = (uint64_t *)&env->vfp.regs[rn];
40 val = 0;
41 for (shift = 0; shift < 32; shift += 8) {
42 index = (ireg >> shift) & 0xff;
43 if (index < maxindex) {
44 tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
45 val |= tmp << shift;
46 } else {
47 val |= def & (0xff << shift);
50 return val;
53 #if !defined(CONFIG_USER_ONLY)
55 #define MMUSUFFIX _mmu
57 #define SHIFT 0
58 #include "softmmu_template.h"
60 #define SHIFT 1
61 #include "softmmu_template.h"
63 #define SHIFT 2
64 #include "softmmu_template.h"
66 #define SHIFT 3
67 #include "softmmu_template.h"
69 /* try to fill the TLB and return an exception if error. If retaddr is
70 NULL, it means that the function was called in C code (i.e. not
71 from generated code or from helper.c) */
72 /* XXX: fix it to restore all registers */
73 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
75 TranslationBlock *tb;
76 CPUState *saved_env;
77 unsigned long pc;
78 int ret;
80 /* XXX: hack to restore env in all cases, even if not called from
81 generated code */
82 saved_env = env;
83 env = cpu_single_env;
84 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
85 if (unlikely(ret)) {
86 if (retaddr) {
87 /* now we have a real cpu fault */
88 pc = (unsigned long)retaddr;
89 tb = tb_find_pc(pc);
90 if (tb) {
91 /* the PC is inside the translated code. It means that we have
92 a virtual CPU fault */
93 cpu_restore_state(tb, env, pc);
96 raise_exception(env->exception_index);
98 env = saved_env;
100 #endif
102 /* FIXME: Pass an axplicit pointer to QF to CPUState, and move saturating
103 instructions into helper.c */
104 uint32_t HELPER(add_setq)(uint32_t a, uint32_t b)
106 uint32_t res = a + b;
107 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
108 env->QF = 1;
109 return res;
112 uint32_t HELPER(add_saturate)(uint32_t a, uint32_t b)
114 uint32_t res = a + b;
115 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
116 env->QF = 1;
117 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
119 return res;
122 uint32_t HELPER(sub_saturate)(uint32_t a, uint32_t b)
124 uint32_t res = a - b;
125 if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
126 env->QF = 1;
127 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
129 return res;
132 uint32_t HELPER(double_saturate)(int32_t val)
134 uint32_t res;
135 if (val >= 0x40000000) {
136 res = ~SIGNBIT;
137 env->QF = 1;
138 } else if (val <= (int32_t)0xc0000000) {
139 res = SIGNBIT;
140 env->QF = 1;
141 } else {
142 res = val << 1;
144 return res;
147 uint32_t HELPER(add_usaturate)(uint32_t a, uint32_t b)
149 uint32_t res = a + b;
150 if (res < a) {
151 env->QF = 1;
152 res = ~0;
154 return res;
157 uint32_t HELPER(sub_usaturate)(uint32_t a, uint32_t b)
159 uint32_t res = a - b;
160 if (res > a) {
161 env->QF = 1;
162 res = 0;
164 return res;
167 /* Signed saturation. */
168 static inline uint32_t do_ssat(int32_t val, int shift)
170 int32_t top;
171 uint32_t mask;
173 top = val >> shift;
174 mask = (1u << shift) - 1;
175 if (top > 0) {
176 env->QF = 1;
177 return mask;
178 } else if (top < -1) {
179 env->QF = 1;
180 return ~mask;
182 return val;
185 /* Unsigned saturation. */
186 static inline uint32_t do_usat(int32_t val, int shift)
188 uint32_t max;
190 max = (1u << shift) - 1;
191 if (val < 0) {
192 env->QF = 1;
193 return 0;
194 } else if (val > max) {
195 env->QF = 1;
196 return max;
198 return val;
201 /* Signed saturate. */
202 uint32_t HELPER(ssat)(uint32_t x, uint32_t shift)
204 return do_ssat(x, shift);
207 /* Dual halfword signed saturate. */
208 uint32_t HELPER(ssat16)(uint32_t x, uint32_t shift)
210 uint32_t res;
212 res = (uint16_t)do_ssat((int16_t)x, shift);
213 res |= do_ssat(((int32_t)x) >> 16, shift) << 16;
214 return res;
217 /* Unsigned saturate. */
218 uint32_t HELPER(usat)(uint32_t x, uint32_t shift)
220 return do_usat(x, shift);
223 /* Dual halfword unsigned saturate. */
224 uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
226 uint32_t res;
228 res = (uint16_t)do_usat((int16_t)x, shift);
229 res |= do_usat(((int32_t)x) >> 16, shift) << 16;
230 return res;
233 void HELPER(wfi)(void)
235 env->exception_index = EXCP_HLT;
236 env->halted = 1;
237 cpu_loop_exit();
240 void HELPER(exception)(uint32_t excp)
242 env->exception_index = excp;
243 cpu_loop_exit();
246 uint32_t HELPER(cpsr_read)(void)
248 return cpsr_read(env) & ~CPSR_EXEC;
251 void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
253 cpsr_write(env, val, mask);
256 /* Access to user mode registers from privileged modes. */
257 uint32_t HELPER(get_user_reg)(uint32_t regno)
259 uint32_t val;
261 if (regno == 13) {
262 val = env->banked_r13[0];
263 } else if (regno == 14) {
264 val = env->banked_r14[0];
265 } else if (regno >= 8
266 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
267 val = env->usr_regs[regno - 8];
268 } else {
269 val = env->regs[regno];
271 return val;
274 void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
276 if (regno == 13) {
277 env->banked_r13[0] = val;
278 } else if (regno == 14) {
279 env->banked_r14[0] = val;
280 } else if (regno >= 8
281 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
282 env->usr_regs[regno - 8] = val;
283 } else {
284 env->regs[regno] = val;
288 /* ??? Flag setting arithmetic is awkward because we need to do comparisons.
289 The only way to do that in TCG is a conditional branch, which clobbers
290 all our temporaries. For now implement these as helper functions. */
292 uint32_t HELPER (add_cc)(uint32_t a, uint32_t b)
294 uint32_t result;
295 result = a + b;
296 env->NF = env->ZF = result;
297 env->CF = result < a;
298 env->VF = (a ^ b ^ -1) & (a ^ result);
299 return result;
302 uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b)
304 uint32_t result;
305 if (!env->CF) {
306 result = a + b;
307 env->CF = result < a;
308 } else {
309 result = a + b + 1;
310 env->CF = result <= a;
312 env->VF = (a ^ b ^ -1) & (a ^ result);
313 env->NF = env->ZF = result;
314 return result;
317 uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b)
319 uint32_t result;
320 result = a - b;
321 env->NF = env->ZF = result;
322 env->CF = a >= b;
323 env->VF = (a ^ b) & (a ^ result);
324 return result;
327 uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b)
329 uint32_t result;
330 if (!env->CF) {
331 result = a - b - 1;
332 env->CF = a > b;
333 } else {
334 result = a - b;
335 env->CF = a >= b;
337 env->VF = (a ^ b) & (a ^ result);
338 env->NF = env->ZF = result;
339 return result;
342 /* Similarly for variable shift instructions. */
344 uint32_t HELPER(shl)(uint32_t x, uint32_t i)
346 int shift = i & 0xff;
347 if (shift >= 32)
348 return 0;
349 return x << shift;
352 uint32_t HELPER(shr)(uint32_t x, uint32_t i)
354 int shift = i & 0xff;
355 if (shift >= 32)
356 return 0;
357 return (uint32_t)x >> shift;
360 uint32_t HELPER(sar)(uint32_t x, uint32_t i)
362 int shift = i & 0xff;
363 if (shift >= 32)
364 shift = 31;
365 return (int32_t)x >> shift;
368 uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i)
370 int shift = i & 0xff;
371 if (shift >= 32) {
372 if (shift == 32)
373 env->CF = x & 1;
374 else
375 env->CF = 0;
376 return 0;
377 } else if (shift != 0) {
378 env->CF = (x >> (32 - shift)) & 1;
379 return x << shift;
381 return x;
384 uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i)
386 int shift = i & 0xff;
387 if (shift >= 32) {
388 if (shift == 32)
389 env->CF = (x >> 31) & 1;
390 else
391 env->CF = 0;
392 return 0;
393 } else if (shift != 0) {
394 env->CF = (x >> (shift - 1)) & 1;
395 return x >> shift;
397 return x;
400 uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i)
402 int shift = i & 0xff;
403 if (shift >= 32) {
404 env->CF = (x >> 31) & 1;
405 return (int32_t)x >> 31;
406 } else if (shift != 0) {
407 env->CF = (x >> (shift - 1)) & 1;
408 return (int32_t)x >> shift;
410 return x;
413 uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i)
415 int shift1, shift;
416 shift1 = i & 0xff;
417 shift = shift1 & 0x1f;
418 if (shift == 0) {
419 if (shift1 != 0)
420 env->CF = (x >> 31) & 1;
421 return x;
422 } else {
423 env->CF = (x >> (shift - 1)) & 1;
424 return ((uint32_t)x >> shift) | (x << (32 - shift));