target-i386/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "hw/pc.h"
   4 #include "hw/isa.h"
   5
   6 #include "cpu.h"
   7 #include "kvm.h"
   8
   9 static const VMStateDescription vmstate_segment = {
  10     .name = "segment",
  11     .version_id = 1,
  12     .minimum_version_id = 1,
  13     .minimum_version_id_old = 1,
  14     .fields      = (VMStateField []) {
  15         VMSTATE_UINT32(selector, SegmentCache),
  16         VMSTATE_UINTTL(base, SegmentCache),
  17         VMSTATE_UINT32(limit, SegmentCache),
  18         VMSTATE_UINT32(flags, SegmentCache),
  19         VMSTATE_END_OF_LIST()
  20     }
  21 };
  22
  23 #define VMSTATE_SEGMENT(_field, _state) {                            \
  24     .name       = (stringify(_field)),                               \
  25     .size       = sizeof(SegmentCache),                              \
  26     .vmsd       = &vmstate_segment,                                  \
  27     .flags      = VMS_STRUCT,                                        \
  28     .offset     = offsetof(_state, _field)                           \
  29             + type_check(SegmentCache,typeof_field(_state, _field))  \
  30 }
  31
  32 #define VMSTATE_SEGMENT_ARRAY(_field, _state, _n)                    \
  33     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
  34
  35 static const VMStateDescription vmstate_xmm_reg = {
  36     .name = "xmm_reg",
  37     .version_id = 1,
  38     .minimum_version_id = 1,
  39     .minimum_version_id_old = 1,
  40     .fields      = (VMStateField []) {
  41         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  42         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  43         VMSTATE_END_OF_LIST()
  44     }
  45 };
  46
  47 #define VMSTATE_XMM_REGS(_field, _state, _n)                         \
  48     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
  49
  50 /* YMMH format is the same as XMM */
  51 static const VMStateDescription vmstate_ymmh_reg = {
  52     .name = "ymmh_reg",
  53     .version_id = 1,
  54     .minimum_version_id = 1,
  55     .minimum_version_id_old = 1,
  56     .fields      = (VMStateField []) {
  57         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  58         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  59         VMSTATE_END_OF_LIST()
  60     }
  61 };
  62
  63 #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)                         \
  64     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
  65
  66 static const VMStateDescription vmstate_mtrr_var = {
  67     .name = "mtrr_var",
  68     .version_id = 1,
  69     .minimum_version_id = 1,
  70     .minimum_version_id_old = 1,
  71     .fields      = (VMStateField []) {
  72         VMSTATE_UINT64(base, MTRRVar),
  73         VMSTATE_UINT64(mask, MTRRVar),
  74         VMSTATE_END_OF_LIST()
  75     }
  76 };
  77
  78 #define VMSTATE_MTRR_VARS(_field, _state, _n, _v)                    \
  79     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
  80
  81 static void put_fpreg_error(Visitor *v, const char *name, void *opaque,
  82                             size_t size, Error **err)
  83 {
  84     fprintf(stderr, "call put_fpreg() with invalid arguments\n");
  85     exit(0);
  86 }
  87
  88 /* XXX: add that in a FPU generic layer */
  89 union x86_longdouble {
  90     uint64_t mant;
  91     uint16_t exp;
  92 };
  93
  94 #define MANTD1(fp)      (fp & ((1LL << 52) - 1))
  95 #define EXPBIAS1 1023
  96 #define EXPD1(fp)       ((fp >> 52) & 0x7FF)
  97 #define SIGND1(fp)      ((fp >> 32) & 0x80000000)
  98
  99 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
 100 {
 101     int e;
 102     /* mantissa */
 103     p->mant = (MANTD1(temp) << 11) | (1LL << 63);
 104     /* exponent + sign */
 105     e = EXPD1(temp) - EXPBIAS1 + 16383;
 106     e |= SIGND1(temp) >> 16;
 107     p->exp = e;
 108 }
 109
 110 static int get_fpreg(Visitor *v, const char *name, void *opaque,
 111                      size_t size, Error **err)
 112 {
 113     FPReg *fp_reg = opaque;
 114     uint64_t mant;
 115     uint16_t exp;
 116
 117     visit_start_struct(v, NULL, NULL, name, 0, err);
 118     visit_type_uint64(v, &mant, "mant", err);
 119     visit_type_uint16(v, &exp, "exp", err);
 120     visit_end_struct(v, err);
 121     fp_reg->d = cpu_set_fp80(mant, exp);
 122     return 0;
 123 }
 124
 125 static void put_fpreg(Visitor *v, const char *name, void *opaque,
 126                       size_t size, Error **err)
 127 {
 128     FPReg *fp_reg = opaque;
 129     uint64_t mant;
 130     uint16_t exp;
 131     /* we save the real CPU data (in case of MMX usage only 'mant'
 132        contains the MMX register */
 133     cpu_get_fp80(&mant, &exp, fp_reg->d);
 134     visit_start_struct(v, NULL, NULL, name, 0, err);
 135     visit_type_uint64(v, &mant, "mant", err);
 136     visit_type_uint16(v, &exp, "exp", err);
 137     visit_end_struct(v, err);
 138 }
 139
 140 static const VMStateInfo vmstate_fpreg = {
 141     .name = "fpreg",
 142     .get  = get_fpreg,
 143     .put  = put_fpreg,
 144 };
 145
 146 static int get_fpreg_1_mmx(Visitor *v, const char *name, void *opaque,
 147                            size_t size, Error **err)
 148 {
 149     union x86_longdouble *p = opaque;
 150     uint64_t mant;
 151
 152     visit_type_uint64(v, &mant, name, err);
 153     p->mant = mant;
 154     p->exp = 0xffff;
 155     return 0;
 156 }
 157
 158 static const VMStateInfo vmstate_fpreg_1_mmx = {
 159     .name = "fpreg_1_mmx",
 160     .get  = get_fpreg_1_mmx,
 161     .put  = put_fpreg_error,
 162 };
 163
 164 static int get_fpreg_1_no_mmx(Visitor *v, const char *name, void *opaque,
 165                               size_t size, Error **err)
 166 {
 167     union x86_longdouble *p = opaque;
 168     uint64_t mant;
 169
 170     visit_type_uint64(v, &mant, name, err);
 171     fp64_to_fp80(p, mant);
 172     return 0;
 173 }
 174
 175 static const VMStateInfo vmstate_fpreg_1_no_mmx = {
 176     .name = "fpreg_1_no_mmx",
 177     .get  = get_fpreg_1_no_mmx,
 178     .put  = put_fpreg_error,
 179 };
 180
 181 static bool fpregs_is_0(void *opaque, int version_id)
 182 {
 183     CPUState *env = opaque;
 184
 185     return (env->fpregs_format_vmstate == 0);
 186 }
 187
 188 static bool fpregs_is_1_mmx(void *opaque, int version_id)
 189 {
 190     CPUState *env = opaque;
 191     int guess_mmx;
 192
 193     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 194                  (env->fpus_vmstate & 0x3800) == 0);
 195     return (guess_mmx && (env->fpregs_format_vmstate == 1));
 196 }
 197
 198 static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
 199 {
 200     CPUState *env = opaque;
 201     int guess_mmx;
 202
 203     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 204                  (env->fpus_vmstate & 0x3800) == 0);
 205     return (!guess_mmx && (env->fpregs_format_vmstate == 1));
 206 }
 207
 208 #define VMSTATE_FP_REGS(_field, _state, _n)                               \
 209     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
 210     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
 211     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
 212
 213 static bool version_is_5(void *opaque, int version_id)
 214 {
 215     return version_id == 5;
 216 }
 217
 218 #ifdef TARGET_X86_64
 219 static bool less_than_7(void *opaque, int version_id)
 220 {
 221     return version_id < 7;
 222 }
 223
 224 static int get_uint64_as_uint32(Visitor *v, const char *name, void *pv,
 225                                 size_t size, Error **err)
 226 {
 227     uint64_t *val1 = pv;
 228     uint32_t val2;
 229     visit_type_uint32(v, &val2, name, err);
 230     *val1 = val2;
 231     return 0;
 232 }
 233
 234 static void put_uint64_as_uint32(Visitor *v, const char *name, void *pv,
 235                                  size_t size, Error **err)
 236 {
 237     uint64_t *val1 = pv;
 238     uint32_t val2;
 239     visit_type_uint32(v, &val2, name, err);
 240     *val1 = val2;
 241 }
 242
 243 static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
 244     .name = "uint64_as_uint32",
 245     .get  = get_uint64_as_uint32,
 246     .put  = put_uint64_as_uint32,
 247 };
 248
 249 #define VMSTATE_HACK_UINT32(_f, _s, _t)                                  \
 250     VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
 251 #endif
 252
 253 static void cpu_pre_save(void *opaque)
 254 {
 255     CPUState *env = opaque;
 256     int i;
 257
 258     /* FPU */
 259     env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 260     env->fptag_vmstate = 0;
 261     for(i = 0; i < 8; i++) {
 262         env->fptag_vmstate |= ((!env->fptags[i]) << i);
 263     }
 264
 265     env->fpregs_format_vmstate = 0;
 266 }
 267
 268 static int cpu_post_load(void *opaque, int version_id)
 269 {
 270     CPUState *env = opaque;
 271     int i;
 272
 273     /* XXX: restore FPU round state */
 274     env->fpstt = (env->fpus_vmstate >> 11) & 7;
 275     env->fpus = env->fpus_vmstate & ~0x3800;
 276     env->fptag_vmstate ^= 0xff;
 277     for(i = 0; i < 8; i++) {
 278         env->fptags[i] = (env->fptag_vmstate >> i) & 1;
 279     }
 280
 281     cpu_breakpoint_remove_all(env, BP_CPU);
 282     cpu_watchpoint_remove_all(env, BP_CPU);
 283     for (i = 0; i < 4; i++)
 284         hw_breakpoint_insert(env, i);
 285
 286     tlb_flush(env, 1);
 287     return 0;
 288 }
 289
 290 static bool async_pf_msr_needed(void *opaque)
 291 {
 292     CPUState *cpu = opaque;
 293
 294     return cpu->async_pf_en_msr != 0;
 295 }
 296
 297 static const VMStateDescription vmstate_async_pf_msr = {
 298     .name = "cpu/async_pf_msr",
 299     .version_id = 1,
 300     .minimum_version_id = 1,
 301     .minimum_version_id_old = 1,
 302     .fields      = (VMStateField []) {
 303         VMSTATE_UINT64(async_pf_en_msr, CPUState),
 304         VMSTATE_END_OF_LIST()
 305     }
 306 };
 307
 308 static bool fpop_ip_dp_needed(void *opaque)
 309 {
 310     CPUState *env = opaque;
 311
 312     return env->fpop != 0 || env->fpip != 0 || env->fpdp != 0;
 313 }
 314
 315 static const VMStateDescription vmstate_fpop_ip_dp = {
 316     .name = "cpu/fpop_ip_dp",
 317     .version_id = 1,
 318     .minimum_version_id = 1,
 319     .minimum_version_id_old = 1,
 320     .fields      = (VMStateField []) {
 321         VMSTATE_UINT16(fpop, CPUState),
 322         VMSTATE_UINT64(fpip, CPUState),
 323         VMSTATE_UINT64(fpdp, CPUState),
 324         VMSTATE_END_OF_LIST()
 325     }
 326 };
 327
 328 static const VMStateDescription vmstate_cpu = {
 329     .name = "cpu",
 330     .version_id = CPU_SAVE_VERSION,
 331     .minimum_version_id = 3,
 332     .minimum_version_id_old = 3,
 333     .pre_save = cpu_pre_save,
 334     .post_load = cpu_post_load,
 335     .fields      = (VMStateField []) {
 336         VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
 337         VMSTATE_UINTTL(eip, CPUState),
 338         VMSTATE_UINTTL(eflags, CPUState),
 339         VMSTATE_UINT32(hflags, CPUState),
 340         /* FPU */
 341         VMSTATE_UINT16(fpuc, CPUState),
 342         VMSTATE_UINT16(fpus_vmstate, CPUState),
 343         VMSTATE_UINT16(fptag_vmstate, CPUState),
 344         VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
 345         VMSTATE_FP_REGS(fpregs, CPUState, 8),
 346
 347         VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
 348         VMSTATE_SEGMENT(ldt, CPUState),
 349         VMSTATE_SEGMENT(tr, CPUState),
 350         VMSTATE_SEGMENT(gdt, CPUState),
 351         VMSTATE_SEGMENT(idt, CPUState),
 352
 353         VMSTATE_UINT32(sysenter_cs, CPUState),
 354 #ifdef TARGET_X86_64
 355         /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
 356         VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
 357         VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
 358         VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
 359         VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
 360 #else
 361         VMSTATE_UINTTL(sysenter_esp, CPUState),
 362         VMSTATE_UINTTL(sysenter_eip, CPUState),
 363 #endif
 364
 365         VMSTATE_UINTTL(cr[0], CPUState),
 366         VMSTATE_UINTTL(cr[2], CPUState),
 367         VMSTATE_UINTTL(cr[3], CPUState),
 368         VMSTATE_UINTTL(cr[4], CPUState),
 369         VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
 370         /* MMU */
 371         VMSTATE_INT32(a20_mask, CPUState),
 372         /* XMM */
 373         VMSTATE_UINT32(mxcsr, CPUState),
 374         VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
 375
 376 #ifdef TARGET_X86_64
 377         VMSTATE_UINT64(efer, CPUState),
 378         VMSTATE_UINT64(star, CPUState),
 379         VMSTATE_UINT64(lstar, CPUState),
 380         VMSTATE_UINT64(cstar, CPUState),
 381         VMSTATE_UINT64(fmask, CPUState),
 382         VMSTATE_UINT64(kernelgsbase, CPUState),
 383 #endif
 384         VMSTATE_UINT32_V(smbase, CPUState, 4),
 385
 386         VMSTATE_UINT64_V(pat, CPUState, 5),
 387         VMSTATE_UINT32_V(hflags2, CPUState, 5),
 388
 389         VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
 390         VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
 391         VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
 392         VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
 393         VMSTATE_UINT64_V(intercept, CPUState, 5),
 394         VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
 395         VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
 396         VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
 397         VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
 398         VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
 399         VMSTATE_UINT8_V(v_tpr, CPUState, 5),
 400         /* MTRRs */
 401         VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
 402         VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
 403         VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
 404         /* KVM-related states */
 405         VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
 406         VMSTATE_UINT32_V(mp_state, CPUState, 9),
 407         VMSTATE_UINT64_V(tsc, CPUState, 9),
 408         VMSTATE_INT32_V(exception_injected, CPUState, 11),
 409         VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
 410         VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
 411         VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
 412         VMSTATE_UINT8_V(has_error_code, CPUState, 11),
 413         VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
 414         /* MCE */
 415         VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
 416         VMSTATE_UINT64_V(mcg_status, CPUState, 10),
 417         VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
 418         VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
 419         /* rdtscp */
 420         VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
 421         /* KVM pvclock msr */
 422         VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
 423         VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
 424         /* XSAVE related fields */
 425         VMSTATE_UINT64_V(xcr0, CPUState, 12),
 426         VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
 427         VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
 428         VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
 429         VMSTATE_END_OF_LIST()
 430         /* The above list is not sorted /wrt version numbers, watch out! */
 431     },
 432     .subsections = (VMStateSubsection []) {
 433         {
 434             .vmsd = &vmstate_async_pf_msr,
 435             .needed = async_pf_msr_needed,
 436         } , {
 437             .vmsd = &vmstate_fpop_ip_dp,
 438             .needed = fpop_ip_dp_needed,
 439         } , {
 440             /* empty */
 441         }
 442     }
 443 };
 444
 445 void cpu_save(QEMUFile *f, void *opaque)
 446 {
 447     vmstate_save_state(f, &vmstate_cpu, opaque);
 448 }
 449
 450 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 451 {
 452     return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
 453 }