2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "qemu/cache-utils.h"
41 #include "qemu/host-utils.h"
42 #include "qemu/timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
55 # define ELF_CLASS ELFCLASS32
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(uint8_t *code_ptr
, int type
,
69 tcg_target_long value
, tcg_target_long addend
);
71 static void tcg_register_jit_int(void *buf
, size_t size
,
72 void *debug_frame
, size_t debug_frame_size
)
73 __attribute__((unused
));
75 /* Forward declarations for functions declared and used in tcg-target.c. */
76 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
77 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
78 tcg_target_long arg2
);
79 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
80 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
81 TCGReg ret
, tcg_target_long arg
);
82 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
83 const int *const_args
);
84 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
85 tcg_target_long arg2
);
86 static int tcg_target_const_match(tcg_target_long val
,
87 const TCGArgConstraint
*arg_ct
);
89 TCGOpDef tcg_op_defs
[] = {
90 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
94 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
96 static TCGRegSet tcg_target_available_regs
[2];
97 static TCGRegSet tcg_target_call_clobber_regs
;
99 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
104 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
106 *(uint16_t *)s
->code_ptr
= v
;
110 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
112 *(uint32_t *)s
->code_ptr
= v
;
116 /* label relocation processing */
118 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
119 int label_index
, long addend
)
124 l
= &s
->labels
[label_index
];
126 /* FIXME: This may break relocations on RISC targets that
127 modify instruction fields in place. The caller may not have
128 written the initial value. */
129 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
131 /* add a new relocation entry */
132 r
= tcg_malloc(sizeof(TCGRelocation
));
136 r
->next
= l
->u
.first_reloc
;
137 l
->u
.first_reloc
= r
;
141 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
145 tcg_target_long value
= (tcg_target_long
)ptr
;
147 l
= &s
->labels
[label_index
];
150 r
= l
->u
.first_reloc
;
152 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
159 int gen_new_label(void)
161 TCGContext
*s
= &tcg_ctx
;
165 if (s
->nb_labels
>= TCG_MAX_LABELS
)
167 idx
= s
->nb_labels
++;
170 l
->u
.first_reloc
= NULL
;
174 #include "tcg-target.c"
176 /* pool based memory allocation */
177 void *tcg_malloc_internal(TCGContext
*s
, int size
)
182 if (size
> TCG_POOL_CHUNK_SIZE
) {
183 /* big malloc: insert a new pool (XXX: could optimize) */
184 p
= g_malloc(sizeof(TCGPool
) + size
);
186 p
->next
= s
->pool_first_large
;
187 s
->pool_first_large
= p
;
198 pool_size
= TCG_POOL_CHUNK_SIZE
;
199 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
203 s
->pool_current
->next
= p
;
212 s
->pool_cur
= p
->data
+ size
;
213 s
->pool_end
= p
->data
+ p
->size
;
217 void tcg_pool_reset(TCGContext
*s
)
220 for (p
= s
->pool_first_large
; p
; p
= t
) {
224 s
->pool_first_large
= NULL
;
225 s
->pool_cur
= s
->pool_end
= NULL
;
226 s
->pool_current
= NULL
;
229 void tcg_context_init(TCGContext
*s
)
231 int op
, total_args
, n
;
233 TCGArgConstraint
*args_ct
;
236 memset(s
, 0, sizeof(*s
));
239 /* Count total number of arguments and allocate the corresponding
242 for(op
= 0; op
< NB_OPS
; op
++) {
243 def
= &tcg_op_defs
[op
];
244 n
= def
->nb_iargs
+ def
->nb_oargs
;
248 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
249 sorted_args
= g_malloc(sizeof(int) * total_args
);
251 for(op
= 0; op
< NB_OPS
; op
++) {
252 def
= &tcg_op_defs
[op
];
253 def
->args_ct
= args_ct
;
254 def
->sorted_args
= sorted_args
;
255 n
= def
->nb_iargs
+ def
->nb_oargs
;
263 void tcg_prologue_init(TCGContext
*s
)
265 /* init global prologue and epilogue */
266 s
->code_buf
= code_gen_prologue
;
267 s
->code_ptr
= s
->code_buf
;
268 tcg_target_qemu_prologue(s
);
269 flush_icache_range((tcg_target_ulong
)s
->code_buf
,
270 (tcg_target_ulong
)s
->code_ptr
);
273 void tcg_set_frame(TCGContext
*s
, int reg
,
274 tcg_target_long start
, tcg_target_long size
)
276 s
->frame_start
= start
;
277 s
->frame_end
= start
+ size
;
281 void tcg_func_start(TCGContext
*s
)
285 s
->nb_temps
= s
->nb_globals
;
286 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
287 s
->first_free_temp
[i
] = -1;
288 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
290 s
->current_frame_offset
= s
->frame_start
;
292 #ifdef CONFIG_DEBUG_TCG
293 s
->goto_tb_issue_mask
= 0;
296 s
->gen_opc_ptr
= s
->gen_opc_buf
;
297 s
->gen_opparam_ptr
= s
->gen_opparam_buf
;
299 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
300 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
301 for TLB miss cases at the end of TB */
302 s
->qemu_ldst_labels
= tcg_malloc(sizeof(TCGLabelQemuLdst
) *
304 s
->nb_qemu_ldst_labels
= 0;
308 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
310 if (n
> TCG_MAX_TEMPS
)
314 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
317 TCGContext
*s
= &tcg_ctx
;
321 #if TCG_TARGET_REG_BITS == 32
322 if (type
!= TCG_TYPE_I32
)
325 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
328 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
329 ts
= &s
->temps
[s
->nb_globals
];
330 ts
->base_type
= type
;
336 tcg_regset_set_reg(s
->reserved_regs
, reg
);
340 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
344 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
345 return MAKE_TCGV_I32(idx
);
348 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
352 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
353 return MAKE_TCGV_I64(idx
);
356 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
357 tcg_target_long offset
,
360 TCGContext
*s
= &tcg_ctx
;
365 #if TCG_TARGET_REG_BITS == 32
366 if (type
== TCG_TYPE_I64
) {
368 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
369 ts
= &s
->temps
[s
->nb_globals
];
370 ts
->base_type
= type
;
371 ts
->type
= TCG_TYPE_I32
;
373 ts
->mem_allocated
= 1;
375 #ifdef TCG_TARGET_WORDS_BIGENDIAN
376 ts
->mem_offset
= offset
+ 4;
378 ts
->mem_offset
= offset
;
380 pstrcpy(buf
, sizeof(buf
), name
);
381 pstrcat(buf
, sizeof(buf
), "_0");
382 ts
->name
= strdup(buf
);
385 ts
->base_type
= type
;
386 ts
->type
= TCG_TYPE_I32
;
388 ts
->mem_allocated
= 1;
390 #ifdef TCG_TARGET_WORDS_BIGENDIAN
391 ts
->mem_offset
= offset
;
393 ts
->mem_offset
= offset
+ 4;
395 pstrcpy(buf
, sizeof(buf
), name
);
396 pstrcat(buf
, sizeof(buf
), "_1");
397 ts
->name
= strdup(buf
);
403 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
404 ts
= &s
->temps
[s
->nb_globals
];
405 ts
->base_type
= type
;
408 ts
->mem_allocated
= 1;
410 ts
->mem_offset
= offset
;
417 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
422 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
423 return MAKE_TCGV_I32(idx
);
426 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
431 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
432 return MAKE_TCGV_I64(idx
);
435 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
437 TCGContext
*s
= &tcg_ctx
;
444 idx
= s
->first_free_temp
[k
];
446 /* There is already an available temp with the
449 s
->first_free_temp
[k
] = ts
->next_free_temp
;
450 ts
->temp_allocated
= 1;
451 assert(ts
->temp_local
== temp_local
);
454 #if TCG_TARGET_REG_BITS == 32
455 if (type
== TCG_TYPE_I64
) {
456 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
457 ts
= &s
->temps
[s
->nb_temps
];
458 ts
->base_type
= type
;
459 ts
->type
= TCG_TYPE_I32
;
460 ts
->temp_allocated
= 1;
461 ts
->temp_local
= temp_local
;
464 ts
->base_type
= TCG_TYPE_I32
;
465 ts
->type
= TCG_TYPE_I32
;
466 ts
->temp_allocated
= 1;
467 ts
->temp_local
= temp_local
;
473 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
474 ts
= &s
->temps
[s
->nb_temps
];
475 ts
->base_type
= type
;
477 ts
->temp_allocated
= 1;
478 ts
->temp_local
= temp_local
;
484 #if defined(CONFIG_DEBUG_TCG)
490 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
494 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
495 return MAKE_TCGV_I32(idx
);
498 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
502 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
503 return MAKE_TCGV_I64(idx
);
506 static inline void tcg_temp_free_internal(int idx
)
508 TCGContext
*s
= &tcg_ctx
;
512 #if defined(CONFIG_DEBUG_TCG)
514 if (s
->temps_in_use
< 0) {
515 fprintf(stderr
, "More temporaries freed than allocated!\n");
519 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
521 assert(ts
->temp_allocated
!= 0);
522 ts
->temp_allocated
= 0;
526 ts
->next_free_temp
= s
->first_free_temp
[k
];
527 s
->first_free_temp
[k
] = idx
;
530 void tcg_temp_free_i32(TCGv_i32 arg
)
532 tcg_temp_free_internal(GET_TCGV_I32(arg
));
535 void tcg_temp_free_i64(TCGv_i64 arg
)
537 tcg_temp_free_internal(GET_TCGV_I64(arg
));
540 TCGv_i32
tcg_const_i32(int32_t val
)
543 t0
= tcg_temp_new_i32();
544 tcg_gen_movi_i32(t0
, val
);
548 TCGv_i64
tcg_const_i64(int64_t val
)
551 t0
= tcg_temp_new_i64();
552 tcg_gen_movi_i64(t0
, val
);
556 TCGv_i32
tcg_const_local_i32(int32_t val
)
559 t0
= tcg_temp_local_new_i32();
560 tcg_gen_movi_i32(t0
, val
);
564 TCGv_i64
tcg_const_local_i64(int64_t val
)
567 t0
= tcg_temp_local_new_i64();
568 tcg_gen_movi_i64(t0
, val
);
572 #if defined(CONFIG_DEBUG_TCG)
573 void tcg_clear_temp_count(void)
575 TCGContext
*s
= &tcg_ctx
;
579 int tcg_check_temp_count(void)
581 TCGContext
*s
= &tcg_ctx
;
582 if (s
->temps_in_use
) {
583 /* Clear the count so that we don't give another
584 * warning immediately next time around.
593 void tcg_register_helper(void *func
, const char *name
)
595 TCGContext
*s
= &tcg_ctx
;
597 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
598 n
= s
->allocated_helpers
;
604 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
605 s
->allocated_helpers
= n
;
607 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
608 s
->helpers
[s
->nb_helpers
].name
= name
;
612 /* Note: we convert the 64 bit args to 32 bit and do some alignment
613 and endian swap. Maybe it would be better to do the alignment
614 and endian swap in tcg_reg_alloc_call(). */
615 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
616 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
623 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
624 for (i
= 0; i
< nargs
; ++i
) {
625 int is_64bit
= sizemask
& (1 << (i
+1)*2);
626 int is_signed
= sizemask
& (2 << (i
+1)*2);
628 TCGv_i64 temp
= tcg_temp_new_i64();
629 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
631 tcg_gen_ext32s_i64(temp
, orig
);
633 tcg_gen_ext32u_i64(temp
, orig
);
635 args
[i
] = GET_TCGV_I64(temp
);
638 #endif /* TCG_TARGET_EXTEND_ARGS */
640 *s
->gen_opc_ptr
++ = INDEX_op_call
;
641 nparam
= s
->gen_opparam_ptr
++;
642 if (ret
!= TCG_CALL_DUMMY_ARG
) {
643 #if TCG_TARGET_REG_BITS < 64
645 #ifdef TCG_TARGET_WORDS_BIGENDIAN
646 *s
->gen_opparam_ptr
++ = ret
+ 1;
647 *s
->gen_opparam_ptr
++ = ret
;
649 *s
->gen_opparam_ptr
++ = ret
;
650 *s
->gen_opparam_ptr
++ = ret
+ 1;
656 *s
->gen_opparam_ptr
++ = ret
;
663 for (i
= 0; i
< nargs
; i
++) {
664 #if TCG_TARGET_REG_BITS < 64
665 int is_64bit
= sizemask
& (1 << (i
+1)*2);
667 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
668 /* some targets want aligned 64 bit args */
670 *s
->gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
674 /* If stack grows up, then we will be placing successive
675 arguments at lower addresses, which means we need to
676 reverse the order compared to how we would normally
677 treat either big or little-endian. For those arguments
678 that will wind up in registers, this still works for
679 HPPA (the only current STACK_GROWSUP target) since the
680 argument registers are *also* allocated in decreasing
681 order. If another such target is added, this logic may
682 have to get more complicated to differentiate between
683 stack arguments and register arguments. */
684 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
685 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
686 *s
->gen_opparam_ptr
++ = args
[i
];
688 *s
->gen_opparam_ptr
++ = args
[i
];
689 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
694 #endif /* TCG_TARGET_REG_BITS < 64 */
696 *s
->gen_opparam_ptr
++ = args
[i
];
699 *s
->gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
701 *s
->gen_opparam_ptr
++ = flags
;
703 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
705 /* total parameters, needed to go backward in the instruction stream */
706 *s
->gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
708 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
709 for (i
= 0; i
< nargs
; ++i
) {
710 int is_64bit
= sizemask
& (1 << (i
+1)*2);
712 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
713 tcg_temp_free_i64(temp
);
716 #endif /* TCG_TARGET_EXTEND_ARGS */
719 #if TCG_TARGET_REG_BITS == 32
720 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
721 int c
, int right
, int arith
)
724 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
725 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
726 } else if (c
>= 32) {
730 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
731 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
733 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
734 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
737 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
738 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
743 t0
= tcg_temp_new_i32();
744 t1
= tcg_temp_new_i32();
746 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
748 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
750 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
751 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
752 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
753 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
755 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
756 /* Note: ret can be the same as arg1, so we use t1 */
757 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
758 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
759 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
760 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
762 tcg_temp_free_i32(t0
);
763 tcg_temp_free_i32(t1
);
769 static void tcg_reg_alloc_start(TCGContext
*s
)
773 for(i
= 0; i
< s
->nb_globals
; i
++) {
776 ts
->val_type
= TEMP_VAL_REG
;
778 ts
->val_type
= TEMP_VAL_MEM
;
781 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
783 if (ts
->temp_local
) {
784 ts
->val_type
= TEMP_VAL_MEM
;
786 ts
->val_type
= TEMP_VAL_DEAD
;
788 ts
->mem_allocated
= 0;
791 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
792 s
->reg_to_temp
[i
] = -1;
796 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
801 assert(idx
>= 0 && idx
< s
->nb_temps
);
803 if (idx
< s
->nb_globals
) {
804 pstrcpy(buf
, buf_size
, ts
->name
);
807 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
809 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
814 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
816 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
819 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
821 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
824 static int helper_cmp(const void *p1
, const void *p2
)
826 const TCGHelperInfo
*th1
= p1
;
827 const TCGHelperInfo
*th2
= p2
;
828 if (th1
->func
< th2
->func
)
830 else if (th1
->func
== th2
->func
)
836 /* find helper definition (Note: A hash table would be better) */
837 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
843 if (unlikely(!s
->helpers_sorted
)) {
844 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
846 s
->helpers_sorted
= 1;
851 m_max
= s
->nb_helpers
- 1;
852 while (m_min
<= m_max
) {
853 m
= (m_min
+ m_max
) >> 1;
867 static const char * const cond_name
[] =
869 [TCG_COND_NEVER
] = "never",
870 [TCG_COND_ALWAYS
] = "always",
871 [TCG_COND_EQ
] = "eq",
872 [TCG_COND_NE
] = "ne",
873 [TCG_COND_LT
] = "lt",
874 [TCG_COND_GE
] = "ge",
875 [TCG_COND_LE
] = "le",
876 [TCG_COND_GT
] = "gt",
877 [TCG_COND_LTU
] = "ltu",
878 [TCG_COND_GEU
] = "geu",
879 [TCG_COND_LEU
] = "leu",
880 [TCG_COND_GTU
] = "gtu"
883 void tcg_dump_ops(TCGContext
*s
)
885 const uint16_t *opc_ptr
;
889 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
894 opc_ptr
= s
->gen_opc_buf
;
895 args
= s
->gen_opparam_buf
;
896 while (opc_ptr
< s
->gen_opc_ptr
) {
898 def
= &tcg_op_defs
[c
];
899 if (c
== INDEX_op_debug_insn_start
) {
901 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
902 pc
= ((uint64_t)args
[1] << 32) | args
[0];
909 qemu_log(" ---- 0x%" PRIx64
, pc
);
911 nb_oargs
= def
->nb_oargs
;
912 nb_iargs
= def
->nb_iargs
;
913 nb_cargs
= def
->nb_cargs
;
914 } else if (c
== INDEX_op_call
) {
917 /* variable number of arguments */
919 nb_oargs
= arg
>> 16;
920 nb_iargs
= arg
& 0xffff;
921 nb_cargs
= def
->nb_cargs
;
923 qemu_log(" %s ", def
->name
);
927 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
928 args
[nb_oargs
+ nb_iargs
- 1]));
930 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
932 qemu_log(",$%d", nb_oargs
);
933 for(i
= 0; i
< nb_oargs
; i
++) {
935 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
938 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
940 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
943 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
944 args
[nb_oargs
+ i
]));
947 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
948 tcg_target_ulong val
;
951 nb_oargs
= def
->nb_oargs
;
952 nb_iargs
= def
->nb_iargs
;
953 nb_cargs
= def
->nb_cargs
;
954 qemu_log(" %s %s,$", def
->name
,
955 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
957 th
= tcg_find_helper(s
, val
);
959 qemu_log("%s", th
->name
);
961 if (c
== INDEX_op_movi_i32
) {
962 qemu_log("0x%x", (uint32_t)val
);
964 qemu_log("0x%" PRIx64
, (uint64_t)val
);
968 qemu_log(" %s ", def
->name
);
969 if (c
== INDEX_op_nopn
) {
970 /* variable number of arguments */
975 nb_oargs
= def
->nb_oargs
;
976 nb_iargs
= def
->nb_iargs
;
977 nb_cargs
= def
->nb_cargs
;
981 for(i
= 0; i
< nb_oargs
; i
++) {
985 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
988 for(i
= 0; i
< nb_iargs
; i
++) {
992 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
996 case INDEX_op_brcond_i32
:
997 case INDEX_op_setcond_i32
:
998 case INDEX_op_movcond_i32
:
999 case INDEX_op_brcond2_i32
:
1000 case INDEX_op_setcond2_i32
:
1001 case INDEX_op_brcond_i64
:
1002 case INDEX_op_setcond_i64
:
1003 case INDEX_op_movcond_i64
:
1004 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1005 qemu_log(",%s", cond_name
[args
[k
++]]);
1007 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1015 for(; i
< nb_cargs
; i
++) {
1020 qemu_log("$0x%" TCG_PRIlx
, arg
);
1024 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1028 /* we give more priority to constraints with less registers */
1029 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1031 const TCGArgConstraint
*arg_ct
;
1034 arg_ct
= &def
->args_ct
[k
];
1035 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1036 /* an alias is equivalent to a single register */
1039 if (!(arg_ct
->ct
& TCG_CT_REG
))
1042 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1043 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1047 return TCG_TARGET_NB_REGS
- n
+ 1;
1050 /* sort from highest priority to lowest */
1051 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1053 int i
, j
, p1
, p2
, tmp
;
1055 for(i
= 0; i
< n
; i
++)
1056 def
->sorted_args
[start
+ i
] = start
+ i
;
1059 for(i
= 0; i
< n
- 1; i
++) {
1060 for(j
= i
+ 1; j
< n
; j
++) {
1061 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1062 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1064 tmp
= def
->sorted_args
[start
+ i
];
1065 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1066 def
->sorted_args
[start
+ j
] = tmp
;
1072 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1080 if (tdefs
->op
== (TCGOpcode
)-1)
1083 assert((unsigned)op
< NB_OPS
);
1084 def
= &tcg_op_defs
[op
];
1085 #if defined(CONFIG_DEBUG_TCG)
1086 /* Duplicate entry in op definitions? */
1090 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1091 for(i
= 0; i
< nb_args
; i
++) {
1092 ct_str
= tdefs
->args_ct_str
[i
];
1093 /* Incomplete TCGTargetOpDef entry? */
1094 assert(ct_str
!= NULL
);
1095 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1096 def
->args_ct
[i
].ct
= 0;
1097 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1099 oarg
= ct_str
[0] - '0';
1100 assert(oarg
< def
->nb_oargs
);
1101 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1102 /* TCG_CT_ALIAS is for the output arguments. The input
1103 argument is tagged with TCG_CT_IALIAS. */
1104 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1105 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1106 def
->args_ct
[oarg
].alias_index
= i
;
1107 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1108 def
->args_ct
[i
].alias_index
= oarg
;
1111 if (*ct_str
== '\0')
1115 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1119 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1120 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1121 ct_str
, i
, def
->name
);
1129 /* TCGTargetOpDef entry with too much information? */
1130 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1132 /* sort the constraints (XXX: this is just an heuristic) */
1133 sort_constraints(def
, 0, def
->nb_oargs
);
1134 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1140 printf("%s: sorted=", def
->name
);
1141 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1142 printf(" %d", def
->sorted_args
[i
]);
1149 #if defined(CONFIG_DEBUG_TCG)
1151 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1152 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1153 if (op
< INDEX_op_call
1154 || op
== INDEX_op_debug_insn_start
1155 || (def
->flags
& TCG_OPF_NOT_PRESENT
)) {
1156 /* Wrong entry in op definitions? */
1158 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1162 /* Missing entry in op definitions? */
1164 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1175 #ifdef USE_LIVENESS_ANALYSIS
1177 /* set a nop for an operation using 'nb_args' */
1178 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1179 TCGArg
*args
, int nb_args
)
1182 *opc_ptr
= INDEX_op_nop
;
1184 *opc_ptr
= INDEX_op_nopn
;
1186 args
[nb_args
- 1] = nb_args
;
1190 /* liveness analysis: end of function: all temps are dead, and globals
1191 should be in memory. */
1192 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1195 memset(dead_temps
, 1, s
->nb_temps
);
1196 memset(mem_temps
, 1, s
->nb_globals
);
1197 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1200 /* liveness analysis: end of basic block: all temps are dead, globals
1201 and local temps should be in memory. */
1202 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1207 memset(dead_temps
, 1, s
->nb_temps
);
1208 memset(mem_temps
, 1, s
->nb_globals
);
1209 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1210 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1214 /* Liveness analysis : update the opc_dead_args array to tell if a
1215 given input arguments is dead. Instructions updating dead
1216 temporaries are removed. */
1217 static void tcg_liveness_analysis(TCGContext
*s
)
1219 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1222 const TCGOpDef
*def
;
1223 uint8_t *dead_temps
, *mem_temps
;
1227 s
->gen_opc_ptr
++; /* skip end */
1229 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1231 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1232 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1234 dead_temps
= tcg_malloc(s
->nb_temps
);
1235 mem_temps
= tcg_malloc(s
->nb_temps
);
1236 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1238 args
= s
->gen_opparam_ptr
;
1239 op_index
= nb_ops
- 1;
1240 while (op_index
>= 0) {
1241 op
= s
->gen_opc_buf
[op_index
];
1242 def
= &tcg_op_defs
[op
];
1250 nb_iargs
= args
[0] & 0xffff;
1251 nb_oargs
= args
[0] >> 16;
1253 call_flags
= args
[nb_oargs
+ nb_iargs
];
1255 /* pure functions can be removed if their result is not
1257 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1258 for(i
= 0; i
< nb_oargs
; i
++) {
1260 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1261 goto do_not_remove_call
;
1264 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
,
1269 /* output args are dead */
1272 for(i
= 0; i
< nb_oargs
; i
++) {
1274 if (dead_temps
[arg
]) {
1275 dead_args
|= (1 << i
);
1277 if (mem_temps
[arg
]) {
1278 sync_args
|= (1 << i
);
1280 dead_temps
[arg
] = 1;
1284 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1285 /* globals should be synced to memory */
1286 memset(mem_temps
, 1, s
->nb_globals
);
1288 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1289 TCG_CALL_NO_READ_GLOBALS
))) {
1290 /* globals should go back to memory */
1291 memset(dead_temps
, 1, s
->nb_globals
);
1294 /* input args are live */
1295 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1297 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1298 if (dead_temps
[arg
]) {
1299 dead_args
|= (1 << i
);
1301 dead_temps
[arg
] = 0;
1304 s
->op_dead_args
[op_index
] = dead_args
;
1305 s
->op_sync_args
[op_index
] = sync_args
;
1310 case INDEX_op_debug_insn_start
:
1311 args
-= def
->nb_args
;
1317 case INDEX_op_discard
:
1319 /* mark the temporary as dead */
1320 dead_temps
[args
[0]] = 1;
1321 mem_temps
[args
[0]] = 0;
1326 case INDEX_op_add2_i32
:
1327 case INDEX_op_sub2_i32
:
1331 /* Test if the high part of the operation is dead, but not
1332 the low part. The result can be optimized to a simple
1333 add or sub. This happens often for x86_64 guest when the
1334 cpu mode is set to 32 bit. */
1335 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1336 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1339 /* Create the single operation plus nop. */
1340 if (op
== INDEX_op_add2_i32
) {
1341 op
= INDEX_op_add_i32
;
1343 op
= INDEX_op_sub_i32
;
1345 s
->gen_opc_buf
[op_index
] = op
;
1348 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1349 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 3);
1350 /* Fall through and mark the single-word operation live. */
1356 case INDEX_op_mulu2_i32
:
1360 /* Likewise, test for the high part of the operation dead. */
1361 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1362 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1365 s
->gen_opc_buf
[op_index
] = op
= INDEX_op_mul_i32
;
1368 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1369 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 1);
1370 /* Fall through and mark the single-word operation live. */
1376 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1377 args
-= def
->nb_args
;
1378 nb_iargs
= def
->nb_iargs
;
1379 nb_oargs
= def
->nb_oargs
;
1381 /* Test if the operation can be removed because all
1382 its outputs are dead. We assume that nb_oargs == 0
1383 implies side effects */
1384 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1385 for(i
= 0; i
< nb_oargs
; i
++) {
1387 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1392 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1393 #ifdef CONFIG_PROFILER
1399 /* output args are dead */
1402 for(i
= 0; i
< nb_oargs
; i
++) {
1404 if (dead_temps
[arg
]) {
1405 dead_args
|= (1 << i
);
1407 if (mem_temps
[arg
]) {
1408 sync_args
|= (1 << i
);
1410 dead_temps
[arg
] = 1;
1414 /* if end of basic block, update */
1415 if (def
->flags
& TCG_OPF_BB_END
) {
1416 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1417 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1418 /* globals should be synced to memory */
1419 memset(mem_temps
, 1, s
->nb_globals
);
1422 /* input args are live */
1423 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1425 if (dead_temps
[arg
]) {
1426 dead_args
|= (1 << i
);
1428 dead_temps
[arg
] = 0;
1430 s
->op_dead_args
[op_index
] = dead_args
;
1431 s
->op_sync_args
[op_index
] = sync_args
;
1438 if (args
!= s
->gen_opparam_buf
) {
1443 /* dummy liveness analysis */
1444 static void tcg_liveness_analysis(TCGContext
*s
)
1447 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1449 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1450 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1451 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1452 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1457 static void dump_regs(TCGContext
*s
)
1463 for(i
= 0; i
< s
->nb_temps
; i
++) {
1465 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1466 switch(ts
->val_type
) {
1468 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1471 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1473 case TEMP_VAL_CONST
:
1474 printf("$0x%" TCG_PRIlx
, ts
->val
);
1486 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1487 if (s
->reg_to_temp
[i
] >= 0) {
1489 tcg_target_reg_names
[i
],
1490 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1495 static void check_regs(TCGContext
*s
)
1501 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1502 k
= s
->reg_to_temp
[reg
];
1505 if (ts
->val_type
!= TEMP_VAL_REG
||
1507 printf("Inconsistency for register %s:\n",
1508 tcg_target_reg_names
[reg
]);
1513 for(k
= 0; k
< s
->nb_temps
; k
++) {
1515 if (ts
->val_type
== TEMP_VAL_REG
&&
1517 s
->reg_to_temp
[ts
->reg
] != k
) {
1518 printf("Inconsistency for temp %s:\n",
1519 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1521 printf("reg state:\n");
1529 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1532 ts
= &s
->temps
[temp
];
1533 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1534 /* Sparc64 stack is accessed with offset of 2047 */
1535 s
->current_frame_offset
= (s
->current_frame_offset
+
1536 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1537 ~(sizeof(tcg_target_long
) - 1);
1539 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1543 ts
->mem_offset
= s
->current_frame_offset
;
1544 ts
->mem_reg
= s
->frame_reg
;
1545 ts
->mem_allocated
= 1;
1546 s
->current_frame_offset
+= (tcg_target_long
)sizeof(tcg_target_long
);
1549 /* sync register 'reg' by saving it to the corresponding temporary */
1550 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1555 temp
= s
->reg_to_temp
[reg
];
1556 ts
= &s
->temps
[temp
];
1557 assert(ts
->val_type
== TEMP_VAL_REG
);
1558 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1559 if (!ts
->mem_allocated
) {
1560 temp_allocate_frame(s
, temp
);
1562 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1564 ts
->mem_coherent
= 1;
1567 /* free register 'reg' by spilling the corresponding temporary if necessary */
1568 static void tcg_reg_free(TCGContext
*s
, int reg
)
1572 temp
= s
->reg_to_temp
[reg
];
1574 tcg_reg_sync(s
, reg
);
1575 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1576 s
->reg_to_temp
[reg
] = -1;
1580 /* Allocate a register belonging to reg1 & ~reg2 */
1581 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1586 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1588 /* first try free registers */
1589 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1590 reg
= tcg_target_reg_alloc_order
[i
];
1591 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1595 /* XXX: do better spill choice */
1596 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1597 reg
= tcg_target_reg_alloc_order
[i
];
1598 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1599 tcg_reg_free(s
, reg
);
1607 /* mark a temporary as dead. */
1608 static inline void temp_dead(TCGContext
*s
, int temp
)
1612 ts
= &s
->temps
[temp
];
1613 if (!ts
->fixed_reg
) {
1614 if (ts
->val_type
== TEMP_VAL_REG
) {
1615 s
->reg_to_temp
[ts
->reg
] = -1;
1617 if (temp
< s
->nb_globals
|| ts
->temp_local
) {
1618 ts
->val_type
= TEMP_VAL_MEM
;
1620 ts
->val_type
= TEMP_VAL_DEAD
;
1625 /* sync a temporary to memory. 'allocated_regs' is used in case a
1626 temporary registers needs to be allocated to store a constant. */
1627 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1631 ts
= &s
->temps
[temp
];
1632 if (!ts
->fixed_reg
) {
1633 switch(ts
->val_type
) {
1634 case TEMP_VAL_CONST
:
1635 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1637 ts
->val_type
= TEMP_VAL_REG
;
1638 s
->reg_to_temp
[ts
->reg
] = temp
;
1639 ts
->mem_coherent
= 0;
1640 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1643 tcg_reg_sync(s
, ts
->reg
);
1654 /* save a temporary to memory. 'allocated_regs' is used in case a
1655 temporary registers needs to be allocated to store a constant. */
1656 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1658 #ifdef USE_LIVENESS_ANALYSIS
1659 /* The liveness analysis already ensures that globals are back
1660 in memory. Keep an assert for safety. */
1661 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1663 temp_sync(s
, temp
, allocated_regs
);
1668 /* save globals to their canonical location and assume they can be
1669 modified be the following code. 'allocated_regs' is used in case a
1670 temporary registers needs to be allocated to store a constant. */
1671 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1675 for(i
= 0; i
< s
->nb_globals
; i
++) {
1676 temp_save(s
, i
, allocated_regs
);
1680 /* sync globals to their canonical location and assume they can be
1681 read by the following code. 'allocated_regs' is used in case a
1682 temporary registers needs to be allocated to store a constant. */
1683 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1687 for (i
= 0; i
< s
->nb_globals
; i
++) {
1688 #ifdef USE_LIVENESS_ANALYSIS
1689 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1690 s
->temps
[i
].mem_coherent
);
1692 temp_sync(s
, i
, allocated_regs
);
1697 /* at the end of a basic block, we assume all temporaries are dead and
1698 all globals are stored at their canonical location. */
1699 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1704 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1706 if (ts
->temp_local
) {
1707 temp_save(s
, i
, allocated_regs
);
1709 #ifdef USE_LIVENESS_ANALYSIS
1710 /* The liveness analysis already ensures that temps are dead.
1711 Keep an assert for safety. */
1712 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1719 save_globals(s
, allocated_regs
);
1722 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1723 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1725 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1726 uint16_t dead_args
, uint8_t sync_args
)
1729 tcg_target_ulong val
;
1731 ots
= &s
->temps
[args
[0]];
1734 if (ots
->fixed_reg
) {
1735 /* for fixed registers, we do not do any constant
1737 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1739 /* The movi is not explicitly generated here */
1740 if (ots
->val_type
== TEMP_VAL_REG
)
1741 s
->reg_to_temp
[ots
->reg
] = -1;
1742 ots
->val_type
= TEMP_VAL_CONST
;
1745 if (NEED_SYNC_ARG(0)) {
1746 temp_sync(s
, args
[0], s
->reserved_regs
);
1748 if (IS_DEAD_ARG(0)) {
1749 temp_dead(s
, args
[0]);
1753 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1754 const TCGArg
*args
, uint16_t dead_args
,
1757 TCGRegSet allocated_regs
;
1759 const TCGArgConstraint
*arg_ct
, *oarg_ct
;
1761 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1762 ots
= &s
->temps
[args
[0]];
1763 ts
= &s
->temps
[args
[1]];
1764 oarg_ct
= &def
->args_ct
[0];
1765 arg_ct
= &def
->args_ct
[1];
1767 /* If the source value is not in a register, and we're going to be
1768 forced to have it in a register in order to perform the copy,
1769 then copy the SOURCE value into its own register first. That way
1770 we don't have to reload SOURCE the next time it is used. */
1771 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1772 || ts
->val_type
== TEMP_VAL_MEM
) {
1773 ts
->reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1774 if (ts
->val_type
== TEMP_VAL_MEM
) {
1775 tcg_out_ld(s
, ts
->type
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1776 ts
->mem_coherent
= 1;
1777 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1778 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1780 s
->reg_to_temp
[ts
->reg
] = args
[1];
1781 ts
->val_type
= TEMP_VAL_REG
;
1784 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1785 /* mov to a non-saved dead register makes no sense (even with
1786 liveness analysis disabled). */
1787 assert(NEED_SYNC_ARG(0));
1788 /* The code above should have moved the temp to a register. */
1789 assert(ts
->val_type
== TEMP_VAL_REG
);
1790 if (!ots
->mem_allocated
) {
1791 temp_allocate_frame(s
, args
[0]);
1793 tcg_out_st(s
, ots
->type
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1794 if (IS_DEAD_ARG(1)) {
1795 temp_dead(s
, args
[1]);
1797 temp_dead(s
, args
[0]);
1798 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1799 /* propagate constant */
1800 if (ots
->val_type
== TEMP_VAL_REG
) {
1801 s
->reg_to_temp
[ots
->reg
] = -1;
1803 ots
->val_type
= TEMP_VAL_CONST
;
1806 /* The code in the first if block should have moved the
1807 temp to a register. */
1808 assert(ts
->val_type
== TEMP_VAL_REG
);
1809 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1810 /* the mov can be suppressed */
1811 if (ots
->val_type
== TEMP_VAL_REG
) {
1812 s
->reg_to_temp
[ots
->reg
] = -1;
1815 temp_dead(s
, args
[1]);
1817 if (ots
->val_type
!= TEMP_VAL_REG
) {
1818 /* When allocating a new register, make sure to not spill the
1820 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1821 ots
->reg
= tcg_reg_alloc(s
, oarg_ct
->u
.regs
, allocated_regs
);
1823 tcg_out_mov(s
, ots
->type
, ots
->reg
, ts
->reg
);
1825 ots
->val_type
= TEMP_VAL_REG
;
1826 ots
->mem_coherent
= 0;
1827 s
->reg_to_temp
[ots
->reg
] = args
[0];
1828 if (NEED_SYNC_ARG(0)) {
1829 tcg_reg_sync(s
, ots
->reg
);
1834 static void tcg_reg_alloc_op(TCGContext
*s
,
1835 const TCGOpDef
*def
, TCGOpcode opc
,
1836 const TCGArg
*args
, uint16_t dead_args
,
1839 TCGRegSet allocated_regs
;
1840 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1842 const TCGArgConstraint
*arg_ct
;
1844 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1845 int const_args
[TCG_MAX_OP_ARGS
];
1847 nb_oargs
= def
->nb_oargs
;
1848 nb_iargs
= def
->nb_iargs
;
1850 /* copy constants */
1851 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1852 args
+ nb_oargs
+ nb_iargs
,
1853 sizeof(TCGArg
) * def
->nb_cargs
);
1855 /* satisfy input constraints */
1856 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1857 for(k
= 0; k
< nb_iargs
; k
++) {
1858 i
= def
->sorted_args
[nb_oargs
+ k
];
1860 arg_ct
= &def
->args_ct
[i
];
1861 ts
= &s
->temps
[arg
];
1862 if (ts
->val_type
== TEMP_VAL_MEM
) {
1863 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1864 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1865 ts
->val_type
= TEMP_VAL_REG
;
1867 ts
->mem_coherent
= 1;
1868 s
->reg_to_temp
[reg
] = arg
;
1869 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1870 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1871 /* constant is OK for instruction */
1873 new_args
[i
] = ts
->val
;
1876 /* need to move to a register */
1877 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1878 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1879 ts
->val_type
= TEMP_VAL_REG
;
1881 ts
->mem_coherent
= 0;
1882 s
->reg_to_temp
[reg
] = arg
;
1885 assert(ts
->val_type
== TEMP_VAL_REG
);
1886 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1887 if (ts
->fixed_reg
) {
1888 /* if fixed register, we must allocate a new register
1889 if the alias is not the same register */
1890 if (arg
!= args
[arg_ct
->alias_index
])
1891 goto allocate_in_reg
;
1893 /* if the input is aliased to an output and if it is
1894 not dead after the instruction, we must allocate
1895 a new register and move it */
1896 if (!IS_DEAD_ARG(i
)) {
1897 goto allocate_in_reg
;
1902 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1903 /* nothing to do : the constraint is satisfied */
1906 /* allocate a new register matching the constraint
1907 and move the temporary register into it */
1908 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1909 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1913 tcg_regset_set_reg(allocated_regs
, reg
);
1917 /* mark dead temporaries and free the associated registers */
1918 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1919 if (IS_DEAD_ARG(i
)) {
1920 temp_dead(s
, args
[i
]);
1924 if (def
->flags
& TCG_OPF_BB_END
) {
1925 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1927 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1928 /* XXX: permit generic clobber register list ? */
1929 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1930 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1931 tcg_reg_free(s
, reg
);
1935 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1936 /* sync globals if the op has side effects and might trigger
1938 sync_globals(s
, allocated_regs
);
1941 /* satisfy the output constraints */
1942 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1943 for(k
= 0; k
< nb_oargs
; k
++) {
1944 i
= def
->sorted_args
[k
];
1946 arg_ct
= &def
->args_ct
[i
];
1947 ts
= &s
->temps
[arg
];
1948 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1949 reg
= new_args
[arg_ct
->alias_index
];
1951 /* if fixed register, we try to use it */
1953 if (ts
->fixed_reg
&&
1954 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1957 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1959 tcg_regset_set_reg(allocated_regs
, reg
);
1960 /* if a fixed register is used, then a move will be done afterwards */
1961 if (!ts
->fixed_reg
) {
1962 if (ts
->val_type
== TEMP_VAL_REG
) {
1963 s
->reg_to_temp
[ts
->reg
] = -1;
1965 ts
->val_type
= TEMP_VAL_REG
;
1967 /* temp value is modified, so the value kept in memory is
1968 potentially not the same */
1969 ts
->mem_coherent
= 0;
1970 s
->reg_to_temp
[reg
] = arg
;
1977 /* emit instruction */
1978 tcg_out_op(s
, opc
, new_args
, const_args
);
1980 /* move the outputs in the correct register if needed */
1981 for(i
= 0; i
< nb_oargs
; i
++) {
1982 ts
= &s
->temps
[args
[i
]];
1984 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1985 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
1987 if (NEED_SYNC_ARG(i
)) {
1988 tcg_reg_sync(s
, reg
);
1990 if (IS_DEAD_ARG(i
)) {
1991 temp_dead(s
, args
[i
]);
1996 #ifdef TCG_TARGET_STACK_GROWSUP
1997 #define STACK_DIR(x) (-(x))
1999 #define STACK_DIR(x) (x)
2002 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
2003 TCGOpcode opc
, const TCGArg
*args
,
2004 uint16_t dead_args
, uint8_t sync_args
)
2006 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
2007 TCGArg arg
, func_arg
;
2009 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
2010 int const_func_arg
, allocate_args
;
2011 TCGRegSet allocated_regs
;
2012 const TCGArgConstraint
*arg_ct
;
2016 nb_oargs
= arg
>> 16;
2017 nb_iargs
= arg
& 0xffff;
2018 nb_params
= nb_iargs
- 1;
2020 flags
= args
[nb_oargs
+ nb_iargs
];
2022 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2023 if (nb_regs
> nb_params
)
2024 nb_regs
= nb_params
;
2026 /* assign stack slots first */
2027 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
2028 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2029 ~(TCG_TARGET_STACK_ALIGN
- 1);
2030 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2031 if (allocate_args
) {
2032 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2033 preallocate call stack */
2037 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2038 for(i
= nb_regs
; i
< nb_params
; i
++) {
2039 arg
= args
[nb_oargs
+ i
];
2040 #ifdef TCG_TARGET_STACK_GROWSUP
2041 stack_offset
-= sizeof(tcg_target_long
);
2043 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2044 ts
= &s
->temps
[arg
];
2045 if (ts
->val_type
== TEMP_VAL_REG
) {
2046 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2047 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2048 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2050 /* XXX: not correct if reading values from the stack */
2051 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2052 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2053 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2054 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2056 /* XXX: sign extend may be needed on some targets */
2057 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2058 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2063 #ifndef TCG_TARGET_STACK_GROWSUP
2064 stack_offset
+= sizeof(tcg_target_long
);
2068 /* assign input registers */
2069 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2070 for(i
= 0; i
< nb_regs
; i
++) {
2071 arg
= args
[nb_oargs
+ i
];
2072 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2073 ts
= &s
->temps
[arg
];
2074 reg
= tcg_target_call_iarg_regs
[i
];
2075 tcg_reg_free(s
, reg
);
2076 if (ts
->val_type
== TEMP_VAL_REG
) {
2077 if (ts
->reg
!= reg
) {
2078 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2080 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2081 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2082 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2083 /* XXX: sign extend ? */
2084 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2088 tcg_regset_set_reg(allocated_regs
, reg
);
2092 /* assign function address */
2093 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
2094 arg_ct
= &def
->args_ct
[0];
2095 ts
= &s
->temps
[func_arg
];
2096 func_addr
= ts
->val
;
2098 if (ts
->val_type
== TEMP_VAL_MEM
) {
2099 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2100 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2102 tcg_regset_set_reg(allocated_regs
, reg
);
2103 } else if (ts
->val_type
== TEMP_VAL_REG
) {
2105 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2106 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2107 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2110 tcg_regset_set_reg(allocated_regs
, reg
);
2111 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2112 if (tcg_target_const_match(func_addr
, arg_ct
)) {
2114 func_arg
= func_addr
;
2116 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2117 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
2119 tcg_regset_set_reg(allocated_regs
, reg
);
2126 /* mark dead temporaries and free the associated registers */
2127 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2128 if (IS_DEAD_ARG(i
)) {
2129 temp_dead(s
, args
[i
]);
2133 /* clobber call registers */
2134 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2135 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2136 tcg_reg_free(s
, reg
);
2140 /* Save globals if they might be written by the helper, sync them if
2141 they might be read. */
2142 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2144 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2145 sync_globals(s
, allocated_regs
);
2147 save_globals(s
, allocated_regs
);
2150 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
2152 /* assign output registers and emit moves if needed */
2153 for(i
= 0; i
< nb_oargs
; i
++) {
2155 ts
= &s
->temps
[arg
];
2156 reg
= tcg_target_call_oarg_regs
[i
];
2157 assert(s
->reg_to_temp
[reg
] == -1);
2158 if (ts
->fixed_reg
) {
2159 if (ts
->reg
!= reg
) {
2160 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2163 if (ts
->val_type
== TEMP_VAL_REG
) {
2164 s
->reg_to_temp
[ts
->reg
] = -1;
2166 ts
->val_type
= TEMP_VAL_REG
;
2168 ts
->mem_coherent
= 0;
2169 s
->reg_to_temp
[reg
] = arg
;
2170 if (NEED_SYNC_ARG(i
)) {
2171 tcg_reg_sync(s
, reg
);
2173 if (IS_DEAD_ARG(i
)) {
2174 temp_dead(s
, args
[i
]);
2179 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2182 #ifdef CONFIG_PROFILER
2184 static int64_t tcg_table_op_count
[NB_OPS
];
2186 static void dump_op_count(void)
2190 f
= fopen("/tmp/op.log", "w");
2191 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2192 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2199 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2204 const TCGOpDef
*def
;
2208 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2215 #ifdef CONFIG_PROFILER
2216 s
->opt_time
-= profile_getclock();
2219 #ifdef USE_TCG_OPTIMIZATIONS
2220 s
->gen_opparam_ptr
=
2221 tcg_optimize(s
, s
->gen_opc_ptr
, s
->gen_opparam_buf
, tcg_op_defs
);
2224 #ifdef CONFIG_PROFILER
2225 s
->opt_time
+= profile_getclock();
2226 s
->la_time
-= profile_getclock();
2229 tcg_liveness_analysis(s
);
2231 #ifdef CONFIG_PROFILER
2232 s
->la_time
+= profile_getclock();
2236 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2237 qemu_log("OP after optimization and liveness analysis:\n");
2243 tcg_reg_alloc_start(s
);
2245 s
->code_buf
= gen_code_buf
;
2246 s
->code_ptr
= gen_code_buf
;
2248 args
= s
->gen_opparam_buf
;
2252 opc
= s
->gen_opc_buf
[op_index
];
2253 #ifdef CONFIG_PROFILER
2254 tcg_table_op_count
[opc
]++;
2256 def
= &tcg_op_defs
[opc
];
2258 printf("%s: %d %d %d\n", def
->name
,
2259 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2263 case INDEX_op_mov_i32
:
2264 case INDEX_op_mov_i64
:
2265 tcg_reg_alloc_mov(s
, def
, args
, s
->op_dead_args
[op_index
],
2266 s
->op_sync_args
[op_index
]);
2268 case INDEX_op_movi_i32
:
2269 case INDEX_op_movi_i64
:
2270 tcg_reg_alloc_movi(s
, args
, s
->op_dead_args
[op_index
],
2271 s
->op_sync_args
[op_index
]);
2273 case INDEX_op_debug_insn_start
:
2274 /* debug instruction */
2284 case INDEX_op_discard
:
2285 temp_dead(s
, args
[0]);
2287 case INDEX_op_set_label
:
2288 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2289 tcg_out_label(s
, args
[0], s
->code_ptr
);
2292 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
,
2293 s
->op_dead_args
[op_index
],
2294 s
->op_sync_args
[op_index
]);
2299 /* Sanity check that we've not introduced any unhandled opcodes. */
2300 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2303 /* Note: in order to speed up the code, it would be much
2304 faster to have specialized register allocator functions for
2305 some common argument patterns */
2306 tcg_reg_alloc_op(s
, def
, opc
, args
, s
->op_dead_args
[op_index
],
2307 s
->op_sync_args
[op_index
]);
2310 args
+= def
->nb_args
;
2312 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2321 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2322 /* Generate TB finalization at the end of block */
2323 tcg_out_tb_finalize(s
);
2328 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2330 #ifdef CONFIG_PROFILER
2333 n
= (s
->gen_opc_ptr
- s
->gen_opc_buf
);
2335 if (n
> s
->op_count_max
)
2336 s
->op_count_max
= n
;
2338 s
->temp_count
+= s
->nb_temps
;
2339 if (s
->nb_temps
> s
->temp_count_max
)
2340 s
->temp_count_max
= s
->nb_temps
;
2344 tcg_gen_code_common(s
, gen_code_buf
, -1);
2346 /* flush instruction cache */
2347 flush_icache_range((tcg_target_ulong
)gen_code_buf
,
2348 (tcg_target_ulong
)s
->code_ptr
);
2350 return s
->code_ptr
- gen_code_buf
;
2353 /* Return the index of the micro operation such as the pc after is <
2354 offset bytes from the start of the TB. The contents of gen_code_buf must
2355 not be changed, though writing the same values is ok.
2356 Return -1 if not found. */
2357 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2359 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2362 #ifdef CONFIG_PROFILER
2363 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2365 TCGContext
*s
= &tcg_ctx
;
2368 tot
= s
->interm_time
+ s
->code_time
;
2369 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2371 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2373 s
->tb_count1
- s
->tb_count
,
2374 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2375 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2376 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2377 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2379 (double)s
->del_op_count
/ s
->tb_count
: 0);
2380 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2382 (double)s
->temp_count
/ s
->tb_count
: 0,
2385 cpu_fprintf(f
, "cycles/op %0.1f\n",
2386 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2387 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2388 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2389 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2390 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2393 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2394 (double)s
->interm_time
/ tot
* 100.0);
2395 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2396 (double)s
->code_time
/ tot
* 100.0);
2397 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2398 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2400 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2401 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2402 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2404 cpu_fprintf(f
, " avg cycles %0.1f\n",
2405 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2410 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2412 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2416 #ifdef ELF_HOST_MACHINE
2417 /* In order to use this feature, the backend needs to do three things:
2419 (1) Define ELF_HOST_MACHINE to indicate both what value to
2420 put into the ELF image and to indicate support for the feature.
2422 (2) Define tcg_register_jit. This should create a buffer containing
2423 the contents of a .debug_frame section that describes the post-
2424 prologue unwind info for the tcg machine.
2426 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2429 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2436 struct jit_code_entry
{
2437 struct jit_code_entry
*next_entry
;
2438 struct jit_code_entry
*prev_entry
;
2439 const void *symfile_addr
;
2440 uint64_t symfile_size
;
2443 struct jit_descriptor
{
2445 uint32_t action_flag
;
2446 struct jit_code_entry
*relevant_entry
;
2447 struct jit_code_entry
*first_entry
;
2450 void __jit_debug_register_code(void) __attribute__((noinline
));
2451 void __jit_debug_register_code(void)
2456 /* Must statically initialize the version, because GDB may check
2457 the version before we can set it. */
2458 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2460 /* End GDB interface. */
2462 static int find_string(const char *strtab
, const char *str
)
2464 const char *p
= strtab
+ 1;
2467 if (strcmp(p
, str
) == 0) {
2474 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2475 void *debug_frame
, size_t debug_frame_size
)
2477 struct __attribute__((packed
)) DebugInfo
{
2484 uintptr_t cu_low_pc
;
2485 uintptr_t cu_high_pc
;
2488 uintptr_t fn_low_pc
;
2489 uintptr_t fn_high_pc
;
2498 struct DebugInfo di
;
2503 struct ElfImage
*img
;
2505 static const struct ElfImage img_template
= {
2507 .e_ident
[EI_MAG0
] = ELFMAG0
,
2508 .e_ident
[EI_MAG1
] = ELFMAG1
,
2509 .e_ident
[EI_MAG2
] = ELFMAG2
,
2510 .e_ident
[EI_MAG3
] = ELFMAG3
,
2511 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2512 .e_ident
[EI_DATA
] = ELF_DATA
,
2513 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2515 .e_machine
= ELF_HOST_MACHINE
,
2516 .e_version
= EV_CURRENT
,
2517 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2518 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2519 .e_ehsize
= sizeof(ElfW(Shdr
)),
2520 .e_phentsize
= sizeof(ElfW(Phdr
)),
2522 .e_shentsize
= sizeof(ElfW(Shdr
)),
2523 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2524 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2525 #ifdef ELF_HOST_FLAGS
2526 .e_flags
= ELF_HOST_FLAGS
,
2529 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2537 [0] = { .sh_type
= SHT_NULL
},
2538 /* Trick: The contents of code_gen_buffer are not present in
2539 this fake ELF file; that got allocated elsewhere. Therefore
2540 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2541 will not look for contents. We can record any address. */
2543 .sh_type
= SHT_NOBITS
,
2544 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2546 [2] = { /* .debug_info */
2547 .sh_type
= SHT_PROGBITS
,
2548 .sh_offset
= offsetof(struct ElfImage
, di
),
2549 .sh_size
= sizeof(struct DebugInfo
),
2551 [3] = { /* .debug_abbrev */
2552 .sh_type
= SHT_PROGBITS
,
2553 .sh_offset
= offsetof(struct ElfImage
, da
),
2554 .sh_size
= sizeof(img
->da
),
2556 [4] = { /* .debug_frame */
2557 .sh_type
= SHT_PROGBITS
,
2558 .sh_offset
= sizeof(struct ElfImage
),
2560 [5] = { /* .symtab */
2561 .sh_type
= SHT_SYMTAB
,
2562 .sh_offset
= offsetof(struct ElfImage
, sym
),
2563 .sh_size
= sizeof(img
->sym
),
2565 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2566 .sh_entsize
= sizeof(ElfW(Sym
)),
2568 [6] = { /* .strtab */
2569 .sh_type
= SHT_STRTAB
,
2570 .sh_offset
= offsetof(struct ElfImage
, str
),
2571 .sh_size
= sizeof(img
->str
),
2575 [1] = { /* code_gen_buffer */
2576 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2581 .len
= sizeof(struct DebugInfo
) - 4,
2583 .ptr_size
= sizeof(void *),
2585 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2587 .fn_name
= "code_gen_buffer"
2590 1, /* abbrev number (the cu) */
2591 0x11, 1, /* DW_TAG_compile_unit, has children */
2592 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2593 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2594 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2595 0, 0, /* end of abbrev */
2596 2, /* abbrev number (the fn) */
2597 0x2e, 0, /* DW_TAG_subprogram, no children */
2598 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2599 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2600 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2601 0, 0, /* end of abbrev */
2602 0 /* no more abbrev */
2604 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2605 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2608 /* We only need a single jit entry; statically allocate it. */
2609 static struct jit_code_entry one_entry
;
2611 uintptr_t buf
= (uintptr_t)buf_ptr
;
2612 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2614 img
= g_malloc(img_size
);
2615 *img
= img_template
;
2616 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2618 img
->phdr
.p_vaddr
= buf
;
2619 img
->phdr
.p_paddr
= buf
;
2620 img
->phdr
.p_memsz
= buf_size
;
2622 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2623 img
->shdr
[1].sh_addr
= buf
;
2624 img
->shdr
[1].sh_size
= buf_size
;
2626 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2627 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2629 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2630 img
->shdr
[4].sh_size
= debug_frame_size
;
2632 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2633 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2635 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2636 img
->sym
[1].st_value
= buf
;
2637 img
->sym
[1].st_size
= buf_size
;
2639 img
->di
.cu_low_pc
= buf
;
2640 img
->di
.cu_high_pc
= buf_size
;
2641 img
->di
.fn_low_pc
= buf
;
2642 img
->di
.fn_high_pc
= buf_size
;
2645 /* Enable this block to be able to debug the ELF image file creation.
2646 One can use readelf, objdump, or other inspection utilities. */
2648 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2650 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2651 /* Avoid stupid unused return value warning for fwrite. */
2658 one_entry
.symfile_addr
= img
;
2659 one_entry
.symfile_size
= img_size
;
2661 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2662 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2663 __jit_debug_descriptor
.first_entry
= &one_entry
;
2664 __jit_debug_register_code();
2667 /* No support for the feature. Provide the entry point expected by exec.c,
2668 and implement the internal function we declared earlier. */
2670 static void tcg_register_jit_int(void *buf
, size_t size
,
2671 void *debug_frame
, size_t debug_frame_size
)
2675 void tcg_register_jit(void *buf
, size_t buf_size
)
2678 #endif /* ELF_HOST_MACHINE */